lib/media_fill_gen8.c

   1 #include "media_fill.h"
   2 #include "gen8_media.h"
   3 #include "intel_reg.h"
   4
   5 #include <assert.h>
   6
   7 #define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
   8
   9 static const uint32_t media_kernel[][4] = {
  10         { 0x00400001, 0x20202288, 0x00000020, 0x00000000 },
  11         { 0x00600001, 0x20800208, 0x008d0000, 0x00000000 },
  12         { 0x00200001, 0x20800208, 0x00450040, 0x00000000 },
  13         { 0x00000001, 0x20880608, 0x00000000, 0x000f000f },
  14         { 0x00800001, 0x20a00208, 0x00000020, 0x00000000 },
  15         { 0x00800001, 0x20e00208, 0x00000020, 0x00000000 },
  16         { 0x00800001, 0x21200208, 0x00000020, 0x00000000 },
  17         { 0x00800001, 0x21600208, 0x00000020, 0x00000000 },
  18         { 0x0c800031, 0x24000a40, 0x0e000080, 0x120a8000 },
  19         { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 },
  20         { 0x07800031, 0x20000a40, 0x0e000e00, 0x82000010 },
  21 };
  22
  23 static uint32_t
  24 batch_used(struct intel_batchbuffer *batch)
  25 {
  26         return batch->ptr - batch->buffer;
  27 }
  28
  29 static uint32_t
  30 batch_align(struct intel_batchbuffer *batch, uint32_t align)
  31 {
  32         uint32_t offset = batch_used(batch);
  33         offset = ALIGN(offset, align);
  34         batch->ptr = batch->buffer + offset;
  35         return offset;
  36 }
  37
  38 static void *
  39 batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align)
  40 {
  41         uint32_t offset = batch_align(batch, align);
  42         batch->ptr += size;
  43         return memset(batch->buffer + offset, 0, size);
  44 }
  45
  46 static uint32_t
  47 batch_offset(struct intel_batchbuffer *batch, void *ptr)
  48 {
  49         return (uint8_t *)ptr - batch->buffer;
  50 }
  51
  52 static uint32_t
  53 batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align)
  54 {
  55         return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size));
  56 }
  57
  58 static void
  59 gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
  60 {
  61         int ret;
  62
  63         ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
  64         if (ret == 0)
  65                 ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
  66                                         NULL, 0, 0, 0);
  67         assert(ret == 0);
  68 }
  69
  70 static uint32_t
  71 gen8_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
  72                         uint8_t color)
  73 {
  74         uint8_t *curbe_buffer;
  75         uint32_t offset;
  76
  77         curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64);
  78         offset = batch_offset(batch, curbe_buffer);
  79         *curbe_buffer = color;
  80
  81         return offset;
  82 }
  83
  84 static uint32_t
  85 gen8_fill_surface_state(struct intel_batchbuffer *batch,
  86                         struct igt_buf *buf,
  87                         uint32_t format,
  88                         int is_dst)
  89 {
  90         struct gen8_surface_state *ss;
  91         uint32_t write_domain, read_domain, offset;
  92         int ret;
  93
  94         if (is_dst) {
  95                 write_domain = read_domain = I915_GEM_DOMAIN_RENDER;
  96         } else {
  97                 write_domain = 0;
  98                 read_domain = I915_GEM_DOMAIN_SAMPLER;
  99         }
 100
 101         ss = batch_alloc(batch, sizeof(*ss), 64);
 102         offset = batch_offset(batch, ss);
 103
 104         ss->ss0.surface_type = GEN8_SURFACE_2D;
 105         ss->ss0.surface_format = format;
 106         ss->ss0.render_cache_read_write = 1;
 107         ss->ss0.vertical_alignment = 1; /* align 4 */
 108         ss->ss0.horizontal_alignment = 1; /* align 4 */
 109
 110         if (buf->tiling == I915_TILING_X)
 111                 ss->ss0.tiled_mode = 2;
 112         else if (buf->tiling == I915_TILING_Y)
 113                 ss->ss0.tiled_mode = 3;
 114
 115         ss->ss8.base_addr = buf->bo->offset;
 116
 117         ret = drm_intel_bo_emit_reloc(batch->bo,
 118                                 batch_offset(batch, ss) + 8 * 4,
 119                                 buf->bo, 0,
 120                                 read_domain, write_domain);
 121         assert(ret == 0);
 122
 123         ss->ss2.height = igt_buf_height(buf) - 1;
 124         ss->ss2.width  = igt_buf_width(buf) - 1;
 125         ss->ss3.pitch  = buf->stride - 1;
 126
 127         ss->ss7.shader_chanel_select_r = 4;
 128         ss->ss7.shader_chanel_select_g = 5;
 129         ss->ss7.shader_chanel_select_b = 6;
 130         ss->ss7.shader_chanel_select_a = 7;
 131
 132         return offset;
 133 }
 134
 135 static uint32_t
 136 gen8_fill_binding_table(struct intel_batchbuffer *batch,
 137                         struct igt_buf *dst)
 138 {
 139         uint32_t *binding_table, offset;
 140
 141         binding_table = batch_alloc(batch, 32, 64);
 142         offset = batch_offset(batch, binding_table);
 143
 144         binding_table[0] = gen8_fill_surface_state(batch, dst, GEN8_SURFACEFORMAT_R8_UNORM, 1);
 145
 146         return offset;
 147 }
 148
 149 static uint32_t
 150 gen8_fill_media_kernel(struct intel_batchbuffer *batch,
 151                 const uint32_t kernel[][4],
 152                 size_t size)
 153 {
 154         uint32_t offset;
 155
 156         offset = batch_copy(batch, kernel, size, 64);
 157
 158         return offset;
 159 }
 160
 161 static uint32_t
 162 gen8_fill_interface_descriptor(struct intel_batchbuffer *batch, struct igt_buf *dst)
 163 {
 164         struct gen8_interface_descriptor_data *idd;
 165         uint32_t offset;
 166         uint32_t binding_table_offset, kernel_offset;
 167
 168         binding_table_offset = gen8_fill_binding_table(batch, dst);
 169         kernel_offset = gen8_fill_media_kernel(batch, media_kernel, sizeof(media_kernel));
 170
 171         idd = batch_alloc(batch, sizeof(*idd), 64);
 172         offset = batch_offset(batch, idd);
 173
 174         idd->desc0.kernel_start_pointer = (kernel_offset >> 6);
 175
 176         idd->desc2.single_program_flow = 1;
 177         idd->desc2.floating_point_mode = GEN8_FLOATING_POINT_IEEE_754;
 178
 179         idd->desc3.sampler_count = 0;      /* 0 samplers used */
 180         idd->desc3.sampler_state_pointer = 0;
 181
 182         idd->desc4.binding_table_entry_count = 0;
 183         idd->desc4.binding_table_pointer = (binding_table_offset >> 5);
 184
 185         idd->desc5.constant_urb_entry_read_offset = 0;
 186         idd->desc5.constant_urb_entry_read_length = 1; /* grf 1 */
 187
 188         return offset;
 189 }
 190
 191 static void
 192 gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 193 {
 194         OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2));
 195
 196         /* general */
 197         OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
 198         OUT_BATCH(0);
 199
 200         /* stateless data port */
 201         OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
 202
 203         /* surface */
 204         OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
 205         OUT_BATCH(0);
 206
 207         /* dynamic */
 208         OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
 209                 0, BASE_ADDRESS_MODIFY);
 210         OUT_BATCH(0);
 211
 212         /* indirect */
 213         OUT_BATCH(0);
 214         OUT_BATCH(0);
 215
 216         /* instruction */
 217         OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
 218         OUT_BATCH(0);
 219
 220         /* general state buffer size */
 221         OUT_BATCH(0xfffff000 | 1);
 222         /* dynamic state buffer size */
 223         OUT_BATCH(1 << 12 | 1);
 224         /* indirect object buffer size */
 225         OUT_BATCH(0xfffff000 | 1);
 226         /* intruction buffer size, must set modify enable bit, otherwise it may result in GPU hang */
 227         OUT_BATCH(1 << 12 | 1);
 228 }
 229
 230 static void
 231 gen8_emit_vfe_state(struct intel_batchbuffer *batch)
 232 {
 233         OUT_BATCH(GEN8_MEDIA_VFE_STATE | (9 - 2));
 234
 235         /* scratch buffer */
 236         OUT_BATCH(0);
 237         OUT_BATCH(0);
 238
 239         /* number of threads & urb entries */
 240         OUT_BATCH(1 << 16 |
 241                 2 << 8);
 242
 243         OUT_BATCH(0);
 244
 245         /* urb entry size & curbe size */
 246         OUT_BATCH(2 << 16 |
 247                 2);
 248
 249         /* scoreboard */
 250         OUT_BATCH(0);
 251         OUT_BATCH(0);
 252         OUT_BATCH(0);
 253 }
 254
 255 static void
 256 gen8_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
 257 {
 258         OUT_BATCH(GEN8_MEDIA_CURBE_LOAD | (4 - 2));
 259         OUT_BATCH(0);
 260         /* curbe total data length */
 261         OUT_BATCH(64);
 262         /* curbe data start address, is relative to the dynamics base address */
 263         OUT_BATCH(curbe_buffer);
 264 }
 265
 266 static void
 267 gen8_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
 268 {
 269         OUT_BATCH(GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
 270         OUT_BATCH(0);
 271         /* interface descriptor data length */
 272         OUT_BATCH(sizeof(struct gen8_interface_descriptor_data));
 273         /* interface descriptor address, is relative to the dynamics base address */
 274         OUT_BATCH(interface_descriptor);
 275 }
 276
 277 static void
 278 gen8_emit_media_state_flush(struct intel_batchbuffer *batch)
 279 {
 280         OUT_BATCH(GEN8_MEDIA_STATE_FLUSH | (2 - 2));
 281         OUT_BATCH(0);
 282 }
 283
 284 static void
 285 gen8_emit_media_objects(struct intel_batchbuffer *batch,
 286                         unsigned x, unsigned y,
 287                         unsigned width, unsigned height)
 288 {
 289         int i, j;
 290
 291         for (i = 0; i < width / 16; i++) {
 292                 for (j = 0; j < height / 16; j++) {
 293                         OUT_BATCH(GEN8_MEDIA_OBJECT | (8 - 2));
 294
 295                         /* interface descriptor offset */
 296                         OUT_BATCH(0);
 297
 298                         /* without indirect data */
 299                         OUT_BATCH(0);
 300                         OUT_BATCH(0);
 301
 302                         /* scoreboard */
 303                         OUT_BATCH(0);
 304                         OUT_BATCH(0);
 305
 306                         /* inline data (xoffset, yoffset) */
 307                         OUT_BATCH(x + i * 16);
 308                         OUT_BATCH(y + j * 16);
 309                         gen8_emit_media_state_flush(batch);
 310                 }
 311         }
 312 }
 313
 314 /*
 315  * This sets up the media pipeline,
 316  *
 317  * +---------------+ <---- 4096
 318  * |       ^       |
 319  * |       |       |
 320  * |    various    |
 321  * |      state    |
 322  * |       |       |
 323  * |_______|_______| <---- 2048 + ?
 324  * |       ^       |
 325  * |       |       |
 326  * |   batch       |
 327  * |    commands   |
 328  * |       |       |
 329  * |       |       |
 330  * +---------------+ <---- 0 + ?
 331  *
 332  */
 333
 334 #define BATCH_STATE_SPLIT 2048
 335
 336 void
 337 gen8_media_fillfunc(struct intel_batchbuffer *batch,
 338                 struct igt_buf *dst,
 339                 unsigned x, unsigned y,
 340                 unsigned width, unsigned height,
 341                 uint8_t color)
 342 {
 343         uint32_t curbe_buffer, interface_descriptor;
 344         uint32_t batch_end;
 345
 346         intel_batchbuffer_flush(batch);
 347
 348         /* setup states */
 349         batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
 350
 351         curbe_buffer = gen8_fill_curbe_buffer_data(batch, color);
 352         interface_descriptor = gen8_fill_interface_descriptor(batch, dst);
 353         assert(batch->ptr < &batch->buffer[4095]);
 354
 355         /* media pipeline */
 356         batch->ptr = batch->buffer;
 357         OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
 358         gen8_emit_state_base_address(batch);
 359
 360         gen8_emit_vfe_state(batch);
 361
 362         gen8_emit_curbe_load(batch, curbe_buffer);
 363
 364         gen8_emit_interface_descriptor_load(batch, interface_descriptor);
 365
 366         gen8_emit_media_objects(batch, x, y, width, height);
 367
 368         OUT_BATCH(MI_BATCH_BUFFER_END);
 369
 370         batch_end = batch_align(batch, 8);
 371         assert(batch_end < BATCH_STATE_SPLIT);
 372
 373         gen8_render_flush(batch, batch_end);
 374         intel_batchbuffer_reset(batch);
 375 }