2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/sections.h>
14 #include <linux/ctype.h>
16 DECLARE_GLOBAL_DATA_PTR;
19 * Here are the type we know about. One day we might allow drivers to
20 * register. For now we just put them here. The COMPAT macro allows us to
21 * turn this into a sparse list later, and keeps the ID with the name.
23 #define COMPAT(id, name) name
24 static const char * const compat_names[COMPAT_COUNT] = {
25 COMPAT(UNKNOWN, "<none>"),
26 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
27 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
28 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
29 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
30 COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"),
31 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
32 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
33 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
34 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
35 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
36 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
37 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
38 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
39 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
40 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
41 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
42 COMPAT(GOOGLE_CROS_EC_KEYB, "google,cros-ec-keyb"),
43 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
44 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
45 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
46 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
47 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
48 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
49 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
50 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
51 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
52 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
53 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
54 COMPAT(INTEL_MICROCODE, "intel,microcode"),
55 COMPAT(AMS_AS3722, "ams,as3722"),
56 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
57 COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
58 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
59 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
60 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
61 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
62 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
63 COMPAT(COMPAT_INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
66 const char *fdtdec_get_compatible(enum fdt_compat_id id)
68 /* We allow reading of the 'unknown' ID for testing purposes */
69 assert(id >= 0 && id < COMPAT_COUNT);
70 return compat_names[id];
73 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
74 const char *prop_name, int index, int na, int ns,
77 const fdt32_t *prop, *prop_end;
78 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
82 debug("%s: %s: ", __func__, prop_name);
84 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
85 debug("(na too large for fdt_addr_t type)\n");
86 return FDT_ADDR_T_NONE;
89 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
90 debug("(ns too large for fdt_size_t type)\n");
91 return FDT_ADDR_T_NONE;
94 prop = fdt_getprop(blob, node, prop_name, &len);
96 debug("(not found)\n");
97 return FDT_ADDR_T_NONE;
99 prop_end = prop + (len / sizeof(*prop));
101 prop_addr = prop + (index * (na + ns));
102 prop_size = prop_addr + na;
103 prop_after_size = prop_size + ns;
104 if (prop_after_size > prop_end) {
105 debug("(not enough data: expected >= %d cells, got %d cells)\n",
106 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
107 return FDT_ADDR_T_NONE;
110 addr = fdtdec_get_number(prop_addr, na);
113 *sizep = fdtdec_get_number(prop_size, ns);
114 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
115 (unsigned long long)*sizep);
117 debug("addr=%08llx\n", (unsigned long long)addr);
123 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
124 int node, const char *prop_name, int index, fdt_size_t *sizep)
128 debug("%s: ", __func__);
130 na = fdt_address_cells(blob, parent);
132 debug("(bad #address-cells)\n");
133 return FDT_ADDR_T_NONE;
136 ns = fdt_size_cells(blob, parent);
138 debug("(bad #size-cells)\n");
139 return FDT_ADDR_T_NONE;
142 debug("na=%d, ns=%d, ", na, ns);
144 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
148 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
149 const char *prop_name, int index, fdt_size_t *sizep)
153 debug("%s: ", __func__);
155 parent = fdt_parent_offset(blob, node);
157 debug("(no parent found)\n");
158 return FDT_ADDR_T_NONE;
161 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
165 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
166 const char *prop_name, fdt_size_t *sizep)
168 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
170 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
171 sizeof(fdt_addr_t) / sizeof(fdt32_t),
175 fdt_addr_t fdtdec_get_addr(const void *blob, int node,
176 const char *prop_name)
178 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
181 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
182 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
183 const char *prop_name, struct fdt_pci_addr *addr)
189 debug("%s: %s: ", __func__, prop_name);
192 * If we follow the pci bus bindings strictly, we should check
193 * the value of the node's parent node's #address-cells and
194 * #size-cells. They need to be 3 and 2 accordingly. However,
195 * for simplicity we skip the check here.
197 cell = fdt_getprop(blob, node, prop_name, &len);
201 if ((len % FDT_PCI_REG_SIZE) == 0) {
202 int num = len / FDT_PCI_REG_SIZE;
205 for (i = 0; i < num; i++) {
206 debug("pci address #%d: %08lx %08lx %08lx\n", i,
207 (ulong)fdt32_to_cpu(cell[0]),
208 (ulong)fdt32_to_cpu(cell[1]),
209 (ulong)fdt32_to_cpu(cell[2]));
210 if ((fdt32_to_cpu(*cell) & type) == type) {
211 addr->phys_hi = fdt32_to_cpu(cell[0]);
212 addr->phys_mid = fdt32_to_cpu(cell[1]);
213 addr->phys_lo = fdt32_to_cpu(cell[1]);
216 cell += (FDT_PCI_ADDR_CELLS +
232 debug("(not found)\n");
236 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
238 const char *list, *end;
241 list = fdt_getprop(blob, node, "compatible", &len);
250 if (len >= strlen("pciVVVV,DDDD")) {
251 s = strstr(list, "pci");
254 * check if the string is something like pciVVVV,DDDD.RR
255 * or just pciVVVV,DDDD
257 if (s && s[7] == ',' &&
258 (s[12] == '.' || s[12] == 0)) {
260 *vendor = simple_strtol(s, NULL, 16);
263 *device = simple_strtol(s, NULL, 16);
274 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
279 /* extract the bar number from fdt_pci_addr */
280 barnum = addr->phys_hi & 0xff;
281 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
284 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
285 *bar = dm_pci_read_bar32(dev, barnum);
291 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
292 uint64_t default_val)
294 const uint64_t *cell64;
297 cell64 = fdt_getprop(blob, node, prop_name, &length);
298 if (!cell64 || length < sizeof(*cell64))
301 return fdt64_to_cpu(*cell64);
304 int fdtdec_get_is_enabled(const void *blob, int node)
309 * It should say "okay", so only allow that. Some fdts use "ok" but
310 * this is a bug. Please fix your device tree source file. See here
313 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
315 cell = fdt_getprop(blob, node, "status", NULL);
317 return 0 == strcmp(cell, "okay");
321 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
323 enum fdt_compat_id id;
325 /* Search our drivers */
326 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
327 if (0 == fdt_node_check_compatible(blob, node,
330 return COMPAT_UNKNOWN;
333 int fdtdec_next_compatible(const void *blob, int node,
334 enum fdt_compat_id id)
336 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
339 int fdtdec_next_compatible_subnode(const void *blob, int node,
340 enum fdt_compat_id id, int *depthp)
343 node = fdt_next_node(blob, node, depthp);
344 } while (*depthp > 1);
346 /* If this is a direct subnode, and compatible, return it */
347 if (*depthp == 1 && 0 == fdt_node_check_compatible(
348 blob, node, compat_names[id]))
351 return -FDT_ERR_NOTFOUND;
354 int fdtdec_next_alias(const void *blob, const char *name,
355 enum fdt_compat_id id, int *upto)
357 #define MAX_STR_LEN 20
358 char str[MAX_STR_LEN + 20];
361 /* snprintf() is not available */
362 assert(strlen(name) < MAX_STR_LEN);
363 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
364 node = fdt_path_offset(blob, str);
367 err = fdt_node_check_compatible(blob, node, compat_names[id]);
371 return -FDT_ERR_NOTFOUND;
376 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
377 enum fdt_compat_id id, int *node_list, int maxcount)
379 memset(node_list, '\0', sizeof(*node_list) * maxcount);
381 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
384 /* TODO: Can we tighten this code up a little? */
385 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
386 enum fdt_compat_id id, int *node_list, int maxcount)
388 int name_len = strlen(name);
396 /* find the alias node if present */
397 alias_node = fdt_path_offset(blob, "/aliases");
400 * start with nothing, and we can assume that the root node can't
403 memset(nodes, '\0', sizeof(nodes));
405 /* First find all the compatible nodes */
406 for (node = count = 0; node >= 0 && count < maxcount;) {
407 node = fdtdec_next_compatible(blob, node, id);
409 nodes[count++] = node;
412 debug("%s: warning: maxcount exceeded with alias '%s'\n",
415 /* Now find all the aliases */
416 for (offset = fdt_first_property_offset(blob, alias_node);
418 offset = fdt_next_property_offset(blob, offset)) {
419 const struct fdt_property *prop;
425 prop = fdt_get_property_by_offset(blob, offset, NULL);
426 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
427 if (prop->len && 0 == strncmp(path, name, name_len))
428 node = fdt_path_offset(blob, prop->data);
432 /* Get the alias number */
433 number = simple_strtoul(path + name_len, NULL, 10);
434 if (number < 0 || number >= maxcount) {
435 debug("%s: warning: alias '%s' is out of range\n",
440 /* Make sure the node we found is actually in our list! */
442 for (j = 0; j < count; j++)
443 if (nodes[j] == node) {
449 debug("%s: warning: alias '%s' points to a node "
450 "'%s' that is missing or is not compatible "
451 " with '%s'\n", __func__, path,
452 fdt_get_name(blob, node, NULL),
458 * Add this node to our list in the right place, and mark
461 if (fdtdec_get_is_enabled(blob, node)) {
462 if (node_list[number]) {
463 debug("%s: warning: alias '%s' requires that "
464 "a node be placed in the list in a "
465 "position which is already filled by "
466 "node '%s'\n", __func__, path,
467 fdt_get_name(blob, node, NULL));
470 node_list[number] = node;
471 if (number >= num_found)
472 num_found = number + 1;
477 /* Add any nodes not mentioned by an alias */
478 for (i = j = 0; i < maxcount; i++) {
480 for (; j < maxcount; j++)
482 fdtdec_get_is_enabled(blob, nodes[j]))
485 /* Have we run out of nodes to add? */
489 assert(!node_list[i]);
490 node_list[i] = nodes[j++];
499 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
502 int base_len = strlen(base);
503 const char *find_name;
508 find_name = fdt_get_name(blob, offset, &find_namelen);
509 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
511 aliases = fdt_path_offset(blob, "/aliases");
512 for (prop_offset = fdt_first_property_offset(blob, aliases);
514 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
520 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
521 debug(" - %s, %s\n", name, prop);
522 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
523 strncmp(name, base, base_len))
526 slash = strrchr(prop, '/');
527 if (strcmp(slash + 1, find_name))
529 val = trailing_strtol(name);
532 debug("Found seq %d\n", *seqp);
537 debug("Not found\n");
541 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
547 chosen_node = fdt_path_offset(blob, "/chosen");
548 return fdt_getprop(blob, chosen_node, name, NULL);
551 int fdtdec_get_chosen_node(const void *blob, const char *name)
555 prop = fdtdec_get_chosen_prop(blob, name);
557 return -FDT_ERR_NOTFOUND;
558 return fdt_path_offset(blob, prop);
561 int fdtdec_check_fdt(void)
564 * We must have an FDT, but we cannot panic() yet since the console
565 * is not ready. So for now, just assert(). Boards which need an early
566 * FDT (prior to console ready) will need to make their own
567 * arrangements and do their own checks.
569 assert(!fdtdec_prepare_fdt());
574 * This function is a little odd in that it accesses global data. At some
575 * point if the architecture board.c files merge this will make more sense.
576 * Even now, it is common code.
578 int fdtdec_prepare_fdt(void)
580 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
581 fdt_check_header(gd->fdt_blob)) {
582 #ifdef CONFIG_SPL_BUILD
583 puts("Missing DTB\n");
585 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
588 printf("fdt_blob=%p\n", gd->fdt_blob);
589 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
599 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
604 debug("%s: %s\n", __func__, prop_name);
605 phandle = fdt_getprop(blob, node, prop_name, NULL);
607 return -FDT_ERR_NOTFOUND;
609 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
614 * Look up a property in a node and check that it has a minimum length.
616 * @param blob FDT blob
617 * @param node node to examine
618 * @param prop_name name of property to find
619 * @param min_len minimum property length in bytes
620 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
621 found, or -FDT_ERR_BADLAYOUT if not enough data
622 * @return pointer to cell, which is only valid if err == 0
624 static const void *get_prop_check_min_len(const void *blob, int node,
625 const char *prop_name, int min_len, int *err)
630 debug("%s: %s\n", __func__, prop_name);
631 cell = fdt_getprop(blob, node, prop_name, &len);
633 *err = -FDT_ERR_NOTFOUND;
634 else if (len < min_len)
635 *err = -FDT_ERR_BADLAYOUT;
641 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
642 u32 *array, int count)
647 debug("%s: %s\n", __func__, prop_name);
648 cell = get_prop_check_min_len(blob, node, prop_name,
649 sizeof(u32) * count, &err);
651 for (i = 0; i < count; i++)
652 array[i] = fdt32_to_cpu(cell[i]);
657 int fdtdec_get_int_array_count(const void *blob, int node,
658 const char *prop_name, u32 *array, int count)
664 debug("%s: %s\n", __func__, prop_name);
665 cell = fdt_getprop(blob, node, prop_name, &len);
667 return -FDT_ERR_NOTFOUND;
668 elems = len / sizeof(u32);
671 for (i = 0; i < count; i++)
672 array[i] = fdt32_to_cpu(cell[i]);
677 const u32 *fdtdec_locate_array(const void *blob, int node,
678 const char *prop_name, int count)
683 cell = get_prop_check_min_len(blob, node, prop_name,
684 sizeof(u32) * count, &err);
685 return err ? NULL : cell;
688 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
693 debug("%s: %s\n", __func__, prop_name);
694 cell = fdt_getprop(blob, node, prop_name, &len);
698 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
699 const char *list_name,
700 const char *cells_name,
701 int cell_count, int index,
702 struct fdtdec_phandle_args *out_args)
704 const __be32 *list, *list_end;
705 int rc = 0, size, cur_index = 0;
710 /* Retrieve the phandle list property */
711 list = fdt_getprop(blob, src_node, list_name, &size);
714 list_end = list + size / sizeof(*list);
716 /* Loop over the phandles until all the requested entry is found */
717 while (list < list_end) {
722 * If phandle is 0, then it is an empty entry with no
723 * arguments. Skip forward to the next entry.
725 phandle = be32_to_cpup(list++);
728 * Find the provider node and parse the #*-cells
729 * property to determine the argument length.
731 * This is not needed if the cell count is hard-coded
732 * (i.e. cells_name not set, but cell_count is set),
733 * except when we're going to return the found node
736 if (cells_name || cur_index == index) {
737 node = fdt_node_offset_by_phandle(blob,
740 debug("%s: could not find phandle\n",
741 fdt_get_name(blob, src_node,
748 count = fdtdec_get_int(blob, node, cells_name,
751 debug("%s: could not get %s for %s\n",
752 fdt_get_name(blob, src_node,
755 fdt_get_name(blob, node,
764 * Make sure that the arguments actually fit in the
765 * remaining property data length
767 if (list + count > list_end) {
768 debug("%s: arguments longer than property\n",
769 fdt_get_name(blob, src_node, NULL));
775 * All of the error cases above bail out of the loop, so at
776 * this point, the parsing is successful. If the requested
777 * index matches, then fill the out_args structure and return,
778 * or return -ENOENT for an empty entry.
781 if (cur_index == index) {
788 if (count > MAX_PHANDLE_ARGS) {
789 debug("%s: too many arguments %d\n",
790 fdt_get_name(blob, src_node,
792 count = MAX_PHANDLE_ARGS;
794 out_args->node = node;
795 out_args->args_count = count;
796 for (i = 0; i < count; i++) {
798 be32_to_cpup(list++);
802 /* Found it! return success */
812 * Result will be one of:
813 * -ENOENT : index is for empty phandle
814 * -EINVAL : parsing error on data
815 * [1..n] : Number of phandle (count mode; when index = -1)
817 rc = index < 0 ? cur_index : -ENOENT;
822 int fdtdec_get_child_count(const void *blob, int node)
827 fdt_for_each_subnode(blob, subnode, node)
833 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
834 u8 *array, int count)
839 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
841 memcpy(array, cell, count);
845 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
846 const char *prop_name, int count)
851 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
857 int fdtdec_get_config_int(const void *blob, const char *prop_name,
862 debug("%s: %s\n", __func__, prop_name);
863 config_node = fdt_path_offset(blob, "/config");
866 return fdtdec_get_int(blob, config_node, prop_name, default_val);
869 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
874 debug("%s: %s\n", __func__, prop_name);
875 config_node = fdt_path_offset(blob, "/config");
878 prop = fdt_get_property(blob, config_node, prop_name, NULL);
883 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
889 debug("%s: %s\n", __func__, prop_name);
890 nodeoffset = fdt_path_offset(blob, "/config");
894 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
898 return (char *)nodep;
901 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
902 fdt_addr_t *basep, fdt_size_t *sizep)
904 const fdt_addr_t *cell;
907 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
909 cell = fdt_getprop(blob, node, prop_name, &len);
910 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
911 debug("cell=%p, len=%d\n", cell, len);
915 *basep = fdt_addr_to_cpu(*cell);
916 *sizep = fdt_size_to_cpu(cell[1]);
917 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
924 * Read a flash entry from the fdt
926 * @param blob FDT blob
927 * @param node Offset of node to read
928 * @param name Name of node being read
929 * @param entry Place to put offset and size of this node
930 * @return 0 if ok, -ve on error
932 int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
933 struct fmap_entry *entry)
938 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
939 debug("Node '%s' has bad/missing 'reg' property\n", name);
940 return -FDT_ERR_NOTFOUND;
942 entry->offset = reg[0];
943 entry->length = reg[1];
944 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
945 prop = fdt_getprop(blob, node, "compress", NULL);
946 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
947 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
948 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
949 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
950 entry->hash = (uint8_t *)prop;
955 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
960 number = (number << 32) | fdt32_to_cpu(*ptr++);
965 int fdt_get_resource(const void *fdt, int node, const char *property,
966 unsigned int index, struct fdt_resource *res)
968 const fdt32_t *ptr, *end;
969 int na, ns, len, parent;
972 parent = fdt_parent_offset(fdt, node);
976 na = fdt_address_cells(fdt, parent);
977 ns = fdt_size_cells(fdt, parent);
979 ptr = fdt_getprop(fdt, node, property, &len);
983 end = ptr + len / sizeof(*ptr);
985 while (ptr + na + ns <= end) {
987 res->start = res->end = fdtdec_get_number(ptr, na);
988 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
996 return -FDT_ERR_NOTFOUND;
999 int fdt_get_named_resource(const void *fdt, int node, const char *property,
1000 const char *prop_names, const char *name,
1001 struct fdt_resource *res)
1005 index = fdt_find_string(fdt, node, prop_names, name);
1009 return fdt_get_resource(fdt, node, property, index, res);
1012 int fdtdec_decode_memory_region(const void *blob, int config_node,
1013 const char *mem_type, const char *suffix,
1014 fdt_addr_t *basep, fdt_size_t *sizep)
1018 fdt_size_t size, offset_size;
1019 fdt_addr_t base, offset;
1022 if (config_node == -1) {
1023 config_node = fdt_path_offset(blob, "/config");
1024 if (config_node < 0) {
1025 debug("%s: Cannot find /config node\n", __func__);
1032 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1034 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1036 debug("%s: No memory type for '%s', using /memory\n", __func__,
1041 node = fdt_path_offset(blob, mem);
1043 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1044 fdt_strerror(node));
1049 * Not strictly correct - the memory may have multiple banks. We just
1052 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1053 debug("%s: Failed to decode memory region %s\n", __func__,
1058 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1060 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1062 debug("%s: Failed to decode memory region '%s'\n", __func__,
1067 *basep = base + offset;
1068 *sizep = offset_size;
1073 static int decode_timing_property(const void *blob, int node, const char *name,
1074 struct timing_entry *result)
1076 int length, ret = 0;
1079 prop = fdt_getprop(blob, node, name, &length);
1081 debug("%s: could not find property %s\n",
1082 fdt_get_name(blob, node, NULL), name);
1086 if (length == sizeof(u32)) {
1087 result->typ = fdtdec_get_int(blob, node, name, 0);
1088 result->min = result->typ;
1089 result->max = result->typ;
1091 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1097 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1098 struct display_timing *dt)
1100 int i, node, timings_node;
1104 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1105 if (timings_node < 0)
1106 return timings_node;
1108 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1109 node > 0 && i != index;
1110 node = fdt_next_subnode(blob, node))
1116 memset(dt, 0, sizeof(*dt));
1118 ret |= decode_timing_property(blob, node, "hback-porch",
1120 ret |= decode_timing_property(blob, node, "hfront-porch",
1122 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1123 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1124 ret |= decode_timing_property(blob, node, "vback-porch",
1126 ret |= decode_timing_property(blob, node, "vfront-porch",
1128 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1129 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1130 ret |= decode_timing_property(blob, node, "clock-frequency",
1134 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1136 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1137 DISPLAY_FLAGS_VSYNC_LOW;
1139 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1141 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1142 DISPLAY_FLAGS_HSYNC_LOW;
1144 val = fdtdec_get_int(blob, node, "de-active", -1);
1146 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1147 DISPLAY_FLAGS_DE_LOW;
1149 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1151 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1152 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1155 if (fdtdec_get_bool(blob, node, "interlaced"))
1156 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1157 if (fdtdec_get_bool(blob, node, "doublescan"))
1158 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1159 if (fdtdec_get_bool(blob, node, "doubleclk"))
1160 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1165 int fdtdec_setup(void)
1167 #if CONFIG_IS_ENABLED(OF_CONTROL)
1168 # ifdef CONFIG_OF_EMBED
1169 /* Get a pointer to the FDT */
1170 gd->fdt_blob = __dtb_dt_begin;
1171 # elif defined CONFIG_OF_SEPARATE
1172 # ifdef CONFIG_SPL_BUILD
1173 /* FDT is at end of BSS unless it is in a different memory region */
1174 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1175 gd->fdt_blob = (ulong *)&_image_binary_end;
1177 gd->fdt_blob = (ulong *)&__bss_end;
1179 /* FDT is at end of image */
1180 gd->fdt_blob = (ulong *)&_end;
1182 # elif defined(CONFIG_OF_HOSTFILE)
1183 if (sandbox_read_fdt_from_file()) {
1184 puts("Failed to read control FDT\n");
1188 # ifndef CONFIG_SPL_BUILD
1189 /* Allow the early environment to override the fdt address */
1190 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1191 (uintptr_t)gd->fdt_blob);
1194 return fdtdec_prepare_fdt();
1197 #endif /* !USE_HOSTCC */