1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
13 #include <dm/of_extra.h>
17 #include <fdt_support.h>
20 #include <linux/libfdt.h>
22 #include <asm/sections.h>
23 #include <linux/ctype.h>
24 #include <linux/lzo.h>
26 DECLARE_GLOBAL_DATA_PTR;
29 * Here are the type we know about. One day we might allow drivers to
30 * register. For now we just put them here. The COMPAT macro allows us to
31 * turn this into a sparse list later, and keeps the ID with the name.
33 * NOTE: This list is basically a TODO list for things that need to be
34 * converted to driver model. So don't add new things here unless there is a
35 * good reason why driver-model conversion is infeasible. Examples include
36 * things which are used before driver model is available.
38 #define COMPAT(id, name) name
39 static const char * const compat_names[COMPAT_COUNT] = {
40 COMPAT(UNKNOWN, "<none>"),
41 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
42 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
43 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
44 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
45 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
46 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
47 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
48 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
49 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
50 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
51 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
52 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
53 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
54 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
55 COMPAT(INTEL_MICROCODE, "intel,microcode"),
56 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
57 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
58 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
59 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
60 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
61 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
62 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
63 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
64 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
65 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
66 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
67 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
68 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
69 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
72 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
73 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
74 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
77 const char *fdtdec_get_compatible(enum fdt_compat_id id)
79 /* We allow reading of the 'unknown' ID for testing purposes */
80 assert(id >= 0 && id < COMPAT_COUNT);
81 return compat_names[id];
84 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
85 const char *prop_name, int index, int na,
86 int ns, fdt_size_t *sizep,
89 const fdt32_t *prop, *prop_end;
90 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
94 debug("%s: %s: ", __func__, prop_name);
96 prop = fdt_getprop(blob, node, prop_name, &len);
98 debug("(not found)\n");
99 return FDT_ADDR_T_NONE;
101 prop_end = prop + (len / sizeof(*prop));
103 prop_addr = prop + (index * (na + ns));
104 prop_size = prop_addr + na;
105 prop_after_size = prop_size + ns;
106 if (prop_after_size > prop_end) {
107 debug("(not enough data: expected >= %d cells, got %d cells)\n",
108 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
109 return FDT_ADDR_T_NONE;
112 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
114 addr = fdt_translate_address(blob, node, prop_addr);
117 addr = fdtdec_get_number(prop_addr, na);
120 *sizep = fdtdec_get_number(prop_size, ns);
121 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
122 (unsigned long long)*sizep);
124 debug("addr=%08llx\n", (unsigned long long)addr);
130 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
131 int node, const char *prop_name,
132 int index, fdt_size_t *sizep,
137 debug("%s: ", __func__);
139 na = fdt_address_cells(blob, parent);
141 debug("(bad #address-cells)\n");
142 return FDT_ADDR_T_NONE;
145 ns = fdt_size_cells(blob, parent);
147 debug("(bad #size-cells)\n");
148 return FDT_ADDR_T_NONE;
151 debug("na=%d, ns=%d, ", na, ns);
153 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
154 ns, sizep, translate);
157 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
158 const char *prop_name, int index,
164 debug("%s: ", __func__);
166 parent = fdt_parent_offset(blob, node);
168 debug("(no parent found)\n");
169 return FDT_ADDR_T_NONE;
172 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
173 index, sizep, translate);
176 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
177 const char *prop_name, fdt_size_t *sizep)
179 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
181 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
182 sizeof(fdt_addr_t) / sizeof(fdt32_t),
186 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
188 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
191 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
192 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
194 const char *list, *end;
197 list = fdt_getprop(blob, node, "compatible", &len);
204 if (len >= strlen("pciVVVV,DDDD")) {
205 char *s = strstr(list, "pci");
208 * check if the string is something like pciVVVV,DDDD.RR
209 * or just pciVVVV,DDDD
211 if (s && s[7] == ',' &&
212 (s[12] == '.' || s[12] == 0)) {
214 *vendor = simple_strtol(s, NULL, 16);
217 *device = simple_strtol(s, NULL, 16);
228 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
233 /* extract the bar number from fdt_pci_addr */
234 barnum = addr->phys_hi & 0xff;
235 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
238 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
239 *bar = dm_pci_read_bar32(dev, barnum);
245 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
246 uint64_t default_val)
248 const unaligned_fdt64_t *cell64;
251 cell64 = fdt_getprop(blob, node, prop_name, &length);
252 if (!cell64 || length < sizeof(*cell64))
255 return fdt64_to_cpu(*cell64);
258 int fdtdec_get_is_enabled(const void *blob, int node)
263 * It should say "okay", so only allow that. Some fdts use "ok" but
264 * this is a bug. Please fix your device tree source file. See here
267 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
269 cell = fdt_getprop(blob, node, "status", NULL);
271 return strcmp(cell, "okay") == 0;
275 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
277 enum fdt_compat_id id;
279 /* Search our drivers */
280 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
281 if (fdt_node_check_compatible(blob, node,
282 compat_names[id]) == 0)
284 return COMPAT_UNKNOWN;
287 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
289 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
292 int fdtdec_next_compatible_subnode(const void *blob, int node,
293 enum fdt_compat_id id, int *depthp)
296 node = fdt_next_node(blob, node, depthp);
297 } while (*depthp > 1);
299 /* If this is a direct subnode, and compatible, return it */
300 if (*depthp == 1 && 0 == fdt_node_check_compatible(
301 blob, node, compat_names[id]))
304 return -FDT_ERR_NOTFOUND;
307 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
310 #define MAX_STR_LEN 20
311 char str[MAX_STR_LEN + 20];
314 /* snprintf() is not available */
315 assert(strlen(name) < MAX_STR_LEN);
316 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
317 node = fdt_path_offset(blob, str);
320 err = fdt_node_check_compatible(blob, node, compat_names[id]);
324 return -FDT_ERR_NOTFOUND;
329 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
330 enum fdt_compat_id id, int *node_list,
333 memset(node_list, '\0', sizeof(*node_list) * maxcount);
335 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
338 /* TODO: Can we tighten this code up a little? */
339 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
340 enum fdt_compat_id id, int *node_list,
343 int name_len = strlen(name);
351 /* find the alias node if present */
352 alias_node = fdt_path_offset(blob, "/aliases");
355 * start with nothing, and we can assume that the root node can't
358 memset(nodes, '\0', sizeof(nodes));
360 /* First find all the compatible nodes */
361 for (node = count = 0; node >= 0 && count < maxcount;) {
362 node = fdtdec_next_compatible(blob, node, id);
364 nodes[count++] = node;
367 debug("%s: warning: maxcount exceeded with alias '%s'\n",
370 /* Now find all the aliases */
371 for (offset = fdt_first_property_offset(blob, alias_node);
373 offset = fdt_next_property_offset(blob, offset)) {
374 const struct fdt_property *prop;
380 prop = fdt_get_property_by_offset(blob, offset, NULL);
381 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
382 if (prop->len && 0 == strncmp(path, name, name_len))
383 node = fdt_path_offset(blob, prop->data);
387 /* Get the alias number */
388 number = simple_strtoul(path + name_len, NULL, 10);
389 if (number < 0 || number >= maxcount) {
390 debug("%s: warning: alias '%s' is out of range\n",
395 /* Make sure the node we found is actually in our list! */
397 for (j = 0; j < count; j++)
398 if (nodes[j] == node) {
404 debug("%s: warning: alias '%s' points to a node "
405 "'%s' that is missing or is not compatible "
406 " with '%s'\n", __func__, path,
407 fdt_get_name(blob, node, NULL),
413 * Add this node to our list in the right place, and mark
416 if (fdtdec_get_is_enabled(blob, node)) {
417 if (node_list[number]) {
418 debug("%s: warning: alias '%s' requires that "
419 "a node be placed in the list in a "
420 "position which is already filled by "
421 "node '%s'\n", __func__, path,
422 fdt_get_name(blob, node, NULL));
425 node_list[number] = node;
426 if (number >= num_found)
427 num_found = number + 1;
432 /* Add any nodes not mentioned by an alias */
433 for (i = j = 0; i < maxcount; i++) {
435 for (; j < maxcount; j++)
437 fdtdec_get_is_enabled(blob, nodes[j]))
440 /* Have we run out of nodes to add? */
444 assert(!node_list[i]);
445 node_list[i] = nodes[j++];
454 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
457 int base_len = strlen(base);
458 const char *find_name;
463 find_name = fdt_get_name(blob, offset, &find_namelen);
464 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
466 aliases = fdt_path_offset(blob, "/aliases");
467 for (prop_offset = fdt_first_property_offset(blob, aliases);
469 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
475 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
476 debug(" - %s, %s\n", name, prop);
477 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
478 strncmp(name, base, base_len))
481 slash = strrchr(prop, '/');
482 if (strcmp(slash + 1, find_name))
484 val = trailing_strtol(name);
487 debug("Found seq %d\n", *seqp);
492 debug("Not found\n");
496 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
498 int base_len = strlen(base);
503 debug("Looking for highest alias id for '%s'\n", base);
505 aliases = fdt_path_offset(blob, "/aliases");
506 for (prop_offset = fdt_first_property_offset(blob, aliases);
508 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
513 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
514 debug(" - %s, %s\n", name, prop);
515 if (*prop != '/' || prop[len - 1] ||
516 strncmp(name, base, base_len))
519 val = trailing_strtol(name);
521 debug("Found seq %d\n", val);
529 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
535 chosen_node = fdt_path_offset(blob, "/chosen");
536 return fdt_getprop(blob, chosen_node, name, NULL);
539 int fdtdec_get_chosen_node(const void *blob, const char *name)
543 prop = fdtdec_get_chosen_prop(blob, name);
545 return -FDT_ERR_NOTFOUND;
546 return fdt_path_offset(blob, prop);
549 int fdtdec_check_fdt(void)
552 * We must have an FDT, but we cannot panic() yet since the console
553 * is not ready. So for now, just assert(). Boards which need an early
554 * FDT (prior to console ready) will need to make their own
555 * arrangements and do their own checks.
557 assert(!fdtdec_prepare_fdt());
562 * This function is a little odd in that it accesses global data. At some
563 * point if the architecture board.c files merge this will make more sense.
564 * Even now, it is common code.
566 int fdtdec_prepare_fdt(void)
568 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
569 fdt_check_header(gd->fdt_blob)) {
570 #ifdef CONFIG_SPL_BUILD
571 puts("Missing DTB\n");
573 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
576 printf("fdt_blob=%p\n", gd->fdt_blob);
577 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
587 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
592 debug("%s: %s\n", __func__, prop_name);
593 phandle = fdt_getprop(blob, node, prop_name, NULL);
595 return -FDT_ERR_NOTFOUND;
597 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
602 * Look up a property in a node and check that it has a minimum length.
604 * @param blob FDT blob
605 * @param node node to examine
606 * @param prop_name name of property to find
607 * @param min_len minimum property length in bytes
608 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
609 found, or -FDT_ERR_BADLAYOUT if not enough data
610 * @return pointer to cell, which is only valid if err == 0
612 static const void *get_prop_check_min_len(const void *blob, int node,
613 const char *prop_name, int min_len,
619 debug("%s: %s\n", __func__, prop_name);
620 cell = fdt_getprop(blob, node, prop_name, &len);
622 *err = -FDT_ERR_NOTFOUND;
623 else if (len < min_len)
624 *err = -FDT_ERR_BADLAYOUT;
630 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
631 u32 *array, int count)
636 debug("%s: %s\n", __func__, prop_name);
637 cell = get_prop_check_min_len(blob, node, prop_name,
638 sizeof(u32) * count, &err);
642 for (i = 0; i < count; i++)
643 array[i] = fdt32_to_cpu(cell[i]);
648 int fdtdec_get_int_array_count(const void *blob, int node,
649 const char *prop_name, u32 *array, int count)
655 debug("%s: %s\n", __func__, prop_name);
656 cell = fdt_getprop(blob, node, prop_name, &len);
658 return -FDT_ERR_NOTFOUND;
659 elems = len / sizeof(u32);
662 for (i = 0; i < count; i++)
663 array[i] = fdt32_to_cpu(cell[i]);
668 const u32 *fdtdec_locate_array(const void *blob, int node,
669 const char *prop_name, int count)
674 cell = get_prop_check_min_len(blob, node, prop_name,
675 sizeof(u32) * count, &err);
676 return err ? NULL : cell;
679 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
684 debug("%s: %s\n", __func__, prop_name);
685 cell = fdt_getprop(blob, node, prop_name, &len);
689 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
690 const char *list_name,
691 const char *cells_name,
692 int cell_count, int index,
693 struct fdtdec_phandle_args *out_args)
695 const __be32 *list, *list_end;
696 int rc = 0, size, cur_index = 0;
701 /* Retrieve the phandle list property */
702 list = fdt_getprop(blob, src_node, list_name, &size);
705 list_end = list + size / sizeof(*list);
707 /* Loop over the phandles until all the requested entry is found */
708 while (list < list_end) {
713 * If phandle is 0, then it is an empty entry with no
714 * arguments. Skip forward to the next entry.
716 phandle = be32_to_cpup(list++);
719 * Find the provider node and parse the #*-cells
720 * property to determine the argument length.
722 * This is not needed if the cell count is hard-coded
723 * (i.e. cells_name not set, but cell_count is set),
724 * except when we're going to return the found node
727 if (cells_name || cur_index == index) {
728 node = fdt_node_offset_by_phandle(blob,
731 debug("%s: could not find phandle\n",
732 fdt_get_name(blob, src_node,
739 count = fdtdec_get_int(blob, node, cells_name,
742 debug("%s: could not get %s for %s\n",
743 fdt_get_name(blob, src_node,
746 fdt_get_name(blob, node,
755 * Make sure that the arguments actually fit in the
756 * remaining property data length
758 if (list + count > list_end) {
759 debug("%s: arguments longer than property\n",
760 fdt_get_name(blob, src_node, NULL));
766 * All of the error cases above bail out of the loop, so at
767 * this point, the parsing is successful. If the requested
768 * index matches, then fill the out_args structure and return,
769 * or return -ENOENT for an empty entry.
772 if (cur_index == index) {
779 if (count > MAX_PHANDLE_ARGS) {
780 debug("%s: too many arguments %d\n",
781 fdt_get_name(blob, src_node,
783 count = MAX_PHANDLE_ARGS;
785 out_args->node = node;
786 out_args->args_count = count;
787 for (i = 0; i < count; i++) {
789 be32_to_cpup(list++);
793 /* Found it! return success */
803 * Result will be one of:
804 * -ENOENT : index is for empty phandle
805 * -EINVAL : parsing error on data
806 * [1..n] : Number of phandle (count mode; when index = -1)
808 rc = index < 0 ? cur_index : -ENOENT;
813 int fdtdec_get_child_count(const void *blob, int node)
818 fdt_for_each_subnode(subnode, blob, node)
824 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
825 u8 *array, int count)
830 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
832 memcpy(array, cell, count);
836 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
837 const char *prop_name, int count)
842 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
848 int fdtdec_get_config_int(const void *blob, const char *prop_name,
853 debug("%s: %s\n", __func__, prop_name);
854 config_node = fdt_path_offset(blob, "/config");
857 return fdtdec_get_int(blob, config_node, prop_name, default_val);
860 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
865 debug("%s: %s\n", __func__, prop_name);
866 config_node = fdt_path_offset(blob, "/config");
869 prop = fdt_get_property(blob, config_node, prop_name, NULL);
874 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
880 debug("%s: %s\n", __func__, prop_name);
881 nodeoffset = fdt_path_offset(blob, "/config");
885 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
889 return (char *)nodep;
892 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
897 number = (number << 32) | fdt32_to_cpu(*ptr++);
902 int fdt_get_resource(const void *fdt, int node, const char *property,
903 unsigned int index, struct fdt_resource *res)
905 const fdt32_t *ptr, *end;
906 int na, ns, len, parent;
909 parent = fdt_parent_offset(fdt, node);
913 na = fdt_address_cells(fdt, parent);
914 ns = fdt_size_cells(fdt, parent);
916 ptr = fdt_getprop(fdt, node, property, &len);
920 end = ptr + len / sizeof(*ptr);
922 while (ptr + na + ns <= end) {
924 res->start = fdtdec_get_number(ptr, na);
925 res->end = res->start;
926 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
934 return -FDT_ERR_NOTFOUND;
937 int fdt_get_named_resource(const void *fdt, int node, const char *property,
938 const char *prop_names, const char *name,
939 struct fdt_resource *res)
943 index = fdt_stringlist_search(fdt, node, prop_names, name);
947 return fdt_get_resource(fdt, node, property, index, res);
950 static int decode_timing_property(const void *blob, int node, const char *name,
951 struct timing_entry *result)
956 prop = fdt_getprop(blob, node, name, &length);
958 debug("%s: could not find property %s\n",
959 fdt_get_name(blob, node, NULL), name);
963 if (length == sizeof(u32)) {
964 result->typ = fdtdec_get_int(blob, node, name, 0);
965 result->min = result->typ;
966 result->max = result->typ;
968 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
974 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
975 struct display_timing *dt)
977 int i, node, timings_node;
981 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
982 if (timings_node < 0)
985 for (i = 0, node = fdt_first_subnode(blob, timings_node);
986 node > 0 && i != index;
987 node = fdt_next_subnode(blob, node))
993 memset(dt, 0, sizeof(*dt));
995 ret |= decode_timing_property(blob, node, "hback-porch",
997 ret |= decode_timing_property(blob, node, "hfront-porch",
999 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1000 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1001 ret |= decode_timing_property(blob, node, "vback-porch",
1003 ret |= decode_timing_property(blob, node, "vfront-porch",
1005 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1006 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1007 ret |= decode_timing_property(blob, node, "clock-frequency",
1011 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1013 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1014 DISPLAY_FLAGS_VSYNC_LOW;
1016 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1018 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1019 DISPLAY_FLAGS_HSYNC_LOW;
1021 val = fdtdec_get_int(blob, node, "de-active", -1);
1023 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1024 DISPLAY_FLAGS_DE_LOW;
1026 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1028 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1029 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1032 if (fdtdec_get_bool(blob, node, "interlaced"))
1033 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1034 if (fdtdec_get_bool(blob, node, "doublescan"))
1035 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1036 if (fdtdec_get_bool(blob, node, "doubleclk"))
1037 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1042 int fdtdec_setup_mem_size_base_fdt(const void *blob)
1045 struct fdt_resource res;
1047 mem = fdt_path_offset(blob, "/memory");
1049 debug("%s: Missing /memory node\n", __func__);
1053 ret = fdt_get_resource(blob, mem, "reg", 0, &res);
1055 debug("%s: Unable to decode first memory bank\n", __func__);
1059 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1060 gd->ram_base = (unsigned long)res.start;
1061 debug("%s: Initial DRAM size %llx\n", __func__,
1062 (unsigned long long)gd->ram_size);
1067 int fdtdec_setup_mem_size_base(void)
1069 return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
1072 #if defined(CONFIG_NR_DRAM_BANKS)
1074 static int get_next_memory_node(const void *blob, int mem)
1077 mem = fdt_node_offset_by_prop_value(blob, mem,
1078 "device_type", "memory", 7);
1079 } while (!fdtdec_get_is_enabled(blob, mem));
1084 int fdtdec_setup_memory_banksize_fdt(const void *blob)
1086 int bank, ret, mem, reg = 0;
1087 struct fdt_resource res;
1089 mem = get_next_memory_node(blob, -1);
1091 debug("%s: Missing /memory node\n", __func__);
1095 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1096 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1097 if (ret == -FDT_ERR_NOTFOUND) {
1099 mem = get_next_memory_node(blob, mem);
1100 if (mem == -FDT_ERR_NOTFOUND)
1103 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1104 if (ret == -FDT_ERR_NOTFOUND)
1111 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1112 gd->bd->bi_dram[bank].size =
1113 (phys_size_t)(res.end - res.start + 1);
1115 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1117 (unsigned long long)gd->bd->bi_dram[bank].start,
1118 (unsigned long long)gd->bd->bi_dram[bank].size);
1124 int fdtdec_setup_memory_banksize(void)
1126 return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
1131 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1132 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1133 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1134 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1136 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1137 bool gzip = 0, lzo = 0;
1138 ulong sz_in = sz_src;
1142 if (CONFIG_IS_ENABLED(GZIP))
1143 if (gzip_parse_header(src, sz_in) >= 0)
1145 if (CONFIG_IS_ENABLED(LZO))
1146 if (!gzip && lzop_is_valid_header(src))
1153 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1154 dst = malloc(sz_out);
1156 puts("uncompress_blob: Unable to allocate memory\n");
1160 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1161 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1167 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1168 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1169 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1170 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1175 /* not a valid compressed blob */
1176 puts("uncompress_blob: Unable to uncompress\n");
1177 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1185 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1187 *dstp = (void *)src;
1193 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1195 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1196 * provide and/or fixup the fdt.
1198 __weak void *board_fdt_blob_setup(void)
1200 void *fdt_blob = NULL;
1201 #ifdef CONFIG_SPL_BUILD
1202 /* FDT is at end of BSS unless it is in a different memory region */
1203 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1204 fdt_blob = (ulong *)&_image_binary_end;
1206 fdt_blob = (ulong *)&__bss_end;
1208 /* FDT is at end of image */
1209 fdt_blob = (ulong *)&_end;
1215 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1220 if (!is_valid_ethaddr(mac))
1223 path = fdt_get_alias(fdt, "ethernet");
1227 debug("ethernet alias found: %s\n", path);
1229 offset = fdt_path_offset(fdt, path);
1231 debug("ethernet alias points to absent node %s\n", path);
1235 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1239 debug("MAC address: %pM\n", mac);
1244 static int fdtdec_init_reserved_memory(void *blob)
1246 int na, ns, node, err;
1249 /* inherit #address-cells and #size-cells from the root node */
1250 na = fdt_address_cells(blob, 0);
1251 ns = fdt_size_cells(blob, 0);
1253 node = fdt_add_subnode(blob, 0, "reserved-memory");
1257 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1261 value = cpu_to_fdt32(ns);
1263 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1267 value = cpu_to_fdt32(na);
1269 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1276 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1277 const struct fdt_memory *carveout,
1280 fdt32_t cells[4] = {}, *ptr = cells;
1281 uint32_t upper, lower, phandle;
1282 int parent, node, na, ns, err;
1286 /* create an empty /reserved-memory node if one doesn't exist */
1287 parent = fdt_path_offset(blob, "/reserved-memory");
1289 parent = fdtdec_init_reserved_memory(blob);
1294 /* only 1 or 2 #address-cells and #size-cells are supported */
1295 na = fdt_address_cells(blob, parent);
1296 if (na < 1 || na > 2)
1297 return -FDT_ERR_BADNCELLS;
1299 ns = fdt_size_cells(blob, parent);
1300 if (ns < 1 || ns > 2)
1301 return -FDT_ERR_BADNCELLS;
1303 /* find a matching node and return the phandle to that */
1304 fdt_for_each_subnode(node, blob, parent) {
1305 const char *name = fdt_get_name(blob, node, NULL);
1306 phys_addr_t addr, size;
1308 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
1309 if (addr == FDT_ADDR_T_NONE) {
1310 debug("failed to read address/size for %s\n", name);
1314 if (addr == carveout->start && (addr + size) == carveout->end) {
1316 *phandlep = fdt_get_phandle(blob, node);
1322 * Unpack the start address and generate the name of the new node
1323 * base on the basename and the unit-address.
1325 upper = upper_32_bits(carveout->start);
1326 lower = lower_32_bits(carveout->start);
1328 if (na > 1 && upper > 0)
1329 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1333 debug("address %08x:%08x exceeds addressable space\n",
1335 return -FDT_ERR_BADVALUE;
1338 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1341 node = fdt_add_subnode(blob, parent, name);
1346 err = fdt_generate_phandle(blob, &phandle);
1350 err = fdtdec_set_phandle(blob, node, phandle);
1355 /* store one or two address cells */
1357 *ptr++ = cpu_to_fdt32(upper);
1359 *ptr++ = cpu_to_fdt32(lower);
1361 /* store one or two size cells */
1362 size = carveout->end - carveout->start + 1;
1363 upper = upper_32_bits(size);
1364 lower = lower_32_bits(size);
1367 *ptr++ = cpu_to_fdt32(upper);
1369 *ptr++ = cpu_to_fdt32(lower);
1371 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1375 /* return the phandle for the new node for the caller to use */
1377 *phandlep = phandle;
1382 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1383 unsigned int index, struct fdt_memory *carveout)
1385 const fdt32_t *prop;
1390 offset = fdt_path_offset(blob, node);
1394 prop = fdt_getprop(blob, offset, name, &len);
1396 debug("failed to get %s for %s\n", name, node);
1397 return -FDT_ERR_NOTFOUND;
1400 if ((len % sizeof(phandle)) != 0) {
1401 debug("invalid phandle property\n");
1402 return -FDT_ERR_BADPHANDLE;
1405 if (len < (sizeof(phandle) * (index + 1))) {
1406 debug("invalid phandle index\n");
1407 return -FDT_ERR_BADPHANDLE;
1410 phandle = fdt32_to_cpu(prop[index]);
1412 offset = fdt_node_offset_by_phandle(blob, phandle);
1414 debug("failed to find node for phandle %u\n", phandle);
1418 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1421 if (carveout->start == FDT_ADDR_T_NONE) {
1422 debug("failed to read address/size from \"reg\" property\n");
1423 return -FDT_ERR_NOTFOUND;
1426 carveout->end = carveout->start + size - 1;
1431 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1432 unsigned int index, const char *name,
1433 const struct fdt_memory *carveout)
1436 int err, offset, len;
1440 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1442 debug("failed to add reserved memory: %d\n", err);
1446 offset = fdt_path_offset(blob, node);
1448 debug("failed to find offset for node %s: %d\n", node, offset);
1452 value = cpu_to_fdt32(phandle);
1454 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1455 if (len == -FDT_ERR_NOTFOUND)
1461 if ((index + 1) * sizeof(value) > len) {
1462 err = fdt_setprop_placeholder(blob, offset, prop_name,
1463 (index + 1) * sizeof(value),
1466 debug("failed to resize reserved memory property: %s\n",
1472 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1474 index * sizeof(value),
1475 &value, sizeof(value));
1477 debug("failed to update %s property for node %s: %s\n",
1478 prop_name, node, fdt_strerror(err));
1485 int fdtdec_setup(void)
1487 #if CONFIG_IS_ENABLED(OF_CONTROL)
1488 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1491 # ifdef CONFIG_OF_EMBED
1492 /* Get a pointer to the FDT */
1493 # ifdef CONFIG_SPL_BUILD
1494 gd->fdt_blob = __dtb_dt_spl_begin;
1496 gd->fdt_blob = __dtb_dt_begin;
1498 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1499 /* Allow the board to override the fdt address. */
1500 gd->fdt_blob = board_fdt_blob_setup();
1501 # elif defined(CONFIG_OF_HOSTFILE)
1502 if (sandbox_read_fdt_from_file()) {
1503 puts("Failed to read control FDT\n");
1506 # elif defined(CONFIG_OF_PRIOR_STAGE)
1507 gd->fdt_blob = (void *)prior_stage_fdt_address;
1509 # ifndef CONFIG_SPL_BUILD
1510 /* Allow the early environment to override the fdt address */
1511 gd->fdt_blob = map_sysmem
1512 (env_get_ulong("fdtcontroladdr", 16,
1513 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1516 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1518 * Try and uncompress the blob.
1519 * Unfortunately there is no way to know how big the input blob really
1520 * is. So let us set the maximum input size arbitrarily high. 16MB
1521 * ought to be more than enough for packed DTBs.
1523 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1524 gd->fdt_blob = fdt_blob;
1527 * Check if blob is a FIT images containings DTBs.
1528 * If so, pick the most relevant
1530 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1532 gd->multi_dtb_fit = gd->fdt_blob;
1533 gd->fdt_blob = fdt_blob;
1539 return fdtdec_prepare_fdt();
1542 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1543 int fdtdec_resetup(int *rescan)
1548 * If the current DTB is part of a compressed FIT image,
1549 * try to locate the best match from the uncompressed
1550 * FIT image stillpresent there. Save the time and space
1551 * required to uncompress it again.
1553 if (gd->multi_dtb_fit) {
1554 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1556 if (fdt_blob == gd->fdt_blob) {
1558 * The best match did not change. no need to tear down
1559 * the DM and rescan the fdt.
1566 gd->fdt_blob = fdt_blob;
1567 return fdtdec_prepare_fdt();
1571 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1572 * not a FIT image containings DTB, but a single DTB. There is no need
1573 * to teard down DM and rescan the DT in this case.
1580 #ifdef CONFIG_NR_DRAM_BANKS
1581 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1582 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1584 int addr_cells, size_cells;
1585 const u32 *cell, *end;
1586 u64 total_size, size, addr;
1592 debug("%s: board_id=%d\n", __func__, board_id);
1595 node = fdt_path_offset(blob, area);
1597 debug("No %s node found\n", area);
1601 cell = fdt_getprop(blob, node, "reg", &len);
1603 debug("No reg property found\n");
1607 addr_cells = fdt_address_cells(blob, node);
1608 size_cells = fdt_size_cells(blob, node);
1610 /* Check the board id and mask */
1611 for (child = fdt_first_subnode(blob, node);
1613 child = fdt_next_subnode(blob, child)) {
1614 int match_mask, match_value;
1616 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1617 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1619 if (match_value >= 0 &&
1620 ((board_id & match_mask) == match_value)) {
1621 /* Found matching mask */
1622 debug("Found matching mask %d\n", match_mask);
1624 cell = fdt_getprop(blob, node, "reg", &len);
1626 debug("No memory-banks property found\n");
1632 /* Note: if no matching subnode was found we use the parent node */
1635 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1636 CONFIG_NR_DRAM_BANKS);
1639 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1642 end = cell + len / 4 - addr_cells - size_cells;
1643 debug("cell at %p, end %p\n", cell, end);
1644 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1648 if (addr_cells == 2)
1649 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1650 addr += fdt32_to_cpu(*cell++);
1652 bd->bi_dram[bank].start = addr;
1654 *basep = (phys_addr_t)addr;
1657 if (size_cells == 2)
1658 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1659 size += fdt32_to_cpu(*cell++);
1664 debug("Auto-sizing %llx, size %llx: ", addr, size);
1665 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1666 if (new_size == size) {
1669 debug("sized to %llx\n", new_size);
1675 bd->bi_dram[bank].size = size;
1679 debug("Memory size %llu\n", total_size);
1681 *sizep = (phys_size_t)total_size;
1685 #endif /* CONFIG_NR_DRAM_BANKS */
1687 #endif /* !USE_HOSTCC */