1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
11 #include <dm/of_extra.h>
15 #include <fdt_support.h>
18 #include <linux/libfdt.h>
20 #include <asm/sections.h>
21 #include <linux/ctype.h>
22 #include <linux/lzo.h>
24 DECLARE_GLOBAL_DATA_PTR;
27 * Here are the type we know about. One day we might allow drivers to
28 * register. For now we just put them here. The COMPAT macro allows us to
29 * turn this into a sparse list later, and keeps the ID with the name.
31 * NOTE: This list is basically a TODO list for things that need to be
32 * converted to driver model. So don't add new things here unless there is a
33 * good reason why driver-model conversion is infeasible. Examples include
34 * things which are used before driver model is available.
36 #define COMPAT(id, name) name
37 static const char * const compat_names[COMPAT_COUNT] = {
38 COMPAT(UNKNOWN, "<none>"),
39 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
40 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
41 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
42 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
43 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
44 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
45 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
46 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
47 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
48 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
49 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
50 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
51 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
52 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
53 COMPAT(INTEL_MICROCODE, "intel,microcode"),
54 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
55 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
56 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
57 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
58 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
59 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
60 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
61 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
62 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
63 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
64 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
65 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
66 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
67 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
68 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
69 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
70 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
71 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
72 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
75 const char *fdtdec_get_compatible(enum fdt_compat_id id)
77 /* We allow reading of the 'unknown' ID for testing purposes */
78 assert(id >= 0 && id < COMPAT_COUNT);
79 return compat_names[id];
82 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
83 const char *prop_name, int index, int na,
84 int ns, fdt_size_t *sizep,
87 const fdt32_t *prop, *prop_end;
88 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
92 debug("%s: %s: ", __func__, prop_name);
94 prop = fdt_getprop(blob, node, prop_name, &len);
96 debug("(not found)\n");
97 return FDT_ADDR_T_NONE;
99 prop_end = prop + (len / sizeof(*prop));
101 prop_addr = prop + (index * (na + ns));
102 prop_size = prop_addr + na;
103 prop_after_size = prop_size + ns;
104 if (prop_after_size > prop_end) {
105 debug("(not enough data: expected >= %d cells, got %d cells)\n",
106 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
107 return FDT_ADDR_T_NONE;
110 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
112 addr = fdt_translate_address(blob, node, prop_addr);
115 addr = fdtdec_get_number(prop_addr, na);
118 *sizep = fdtdec_get_number(prop_size, ns);
119 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
120 (unsigned long long)*sizep);
122 debug("addr=%08llx\n", (unsigned long long)addr);
128 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
129 int node, const char *prop_name,
130 int index, fdt_size_t *sizep,
135 debug("%s: ", __func__);
137 na = fdt_address_cells(blob, parent);
139 debug("(bad #address-cells)\n");
140 return FDT_ADDR_T_NONE;
143 ns = fdt_size_cells(blob, parent);
145 debug("(bad #size-cells)\n");
146 return FDT_ADDR_T_NONE;
149 debug("na=%d, ns=%d, ", na, ns);
151 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
152 ns, sizep, translate);
155 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
156 const char *prop_name, int index,
162 debug("%s: ", __func__);
164 parent = fdt_parent_offset(blob, node);
166 debug("(no parent found)\n");
167 return FDT_ADDR_T_NONE;
170 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
171 index, sizep, translate);
174 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
175 const char *prop_name, fdt_size_t *sizep)
177 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
179 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
180 sizeof(fdt_addr_t) / sizeof(fdt32_t),
184 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
186 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
189 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
190 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
192 const char *list, *end;
195 list = fdt_getprop(blob, node, "compatible", &len);
202 if (len >= strlen("pciVVVV,DDDD")) {
203 char *s = strstr(list, "pci");
206 * check if the string is something like pciVVVV,DDDD.RR
207 * or just pciVVVV,DDDD
209 if (s && s[7] == ',' &&
210 (s[12] == '.' || s[12] == 0)) {
212 *vendor = simple_strtol(s, NULL, 16);
215 *device = simple_strtol(s, NULL, 16);
226 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
231 /* extract the bar number from fdt_pci_addr */
232 barnum = addr->phys_hi & 0xff;
233 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
236 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
237 *bar = dm_pci_read_bar32(dev, barnum);
243 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
244 uint64_t default_val)
246 const unaligned_fdt64_t *cell64;
249 cell64 = fdt_getprop(blob, node, prop_name, &length);
250 if (!cell64 || length < sizeof(*cell64))
253 return fdt64_to_cpu(*cell64);
256 int fdtdec_get_is_enabled(const void *blob, int node)
261 * It should say "okay", so only allow that. Some fdts use "ok" but
262 * this is a bug. Please fix your device tree source file. See here
265 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
267 cell = fdt_getprop(blob, node, "status", NULL);
269 return strcmp(cell, "okay") == 0;
273 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
275 enum fdt_compat_id id;
277 /* Search our drivers */
278 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
279 if (fdt_node_check_compatible(blob, node,
280 compat_names[id]) == 0)
282 return COMPAT_UNKNOWN;
285 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
287 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
290 int fdtdec_next_compatible_subnode(const void *blob, int node,
291 enum fdt_compat_id id, int *depthp)
294 node = fdt_next_node(blob, node, depthp);
295 } while (*depthp > 1);
297 /* If this is a direct subnode, and compatible, return it */
298 if (*depthp == 1 && 0 == fdt_node_check_compatible(
299 blob, node, compat_names[id]))
302 return -FDT_ERR_NOTFOUND;
305 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
308 #define MAX_STR_LEN 20
309 char str[MAX_STR_LEN + 20];
312 /* snprintf() is not available */
313 assert(strlen(name) < MAX_STR_LEN);
314 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
315 node = fdt_path_offset(blob, str);
318 err = fdt_node_check_compatible(blob, node, compat_names[id]);
322 return -FDT_ERR_NOTFOUND;
327 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
328 enum fdt_compat_id id, int *node_list,
331 memset(node_list, '\0', sizeof(*node_list) * maxcount);
333 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
336 /* TODO: Can we tighten this code up a little? */
337 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
338 enum fdt_compat_id id, int *node_list,
341 int name_len = strlen(name);
349 /* find the alias node if present */
350 alias_node = fdt_path_offset(blob, "/aliases");
353 * start with nothing, and we can assume that the root node can't
356 memset(nodes, '\0', sizeof(nodes));
358 /* First find all the compatible nodes */
359 for (node = count = 0; node >= 0 && count < maxcount;) {
360 node = fdtdec_next_compatible(blob, node, id);
362 nodes[count++] = node;
365 debug("%s: warning: maxcount exceeded with alias '%s'\n",
368 /* Now find all the aliases */
369 for (offset = fdt_first_property_offset(blob, alias_node);
371 offset = fdt_next_property_offset(blob, offset)) {
372 const struct fdt_property *prop;
378 prop = fdt_get_property_by_offset(blob, offset, NULL);
379 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
380 if (prop->len && 0 == strncmp(path, name, name_len))
381 node = fdt_path_offset(blob, prop->data);
385 /* Get the alias number */
386 number = simple_strtoul(path + name_len, NULL, 10);
387 if (number < 0 || number >= maxcount) {
388 debug("%s: warning: alias '%s' is out of range\n",
393 /* Make sure the node we found is actually in our list! */
395 for (j = 0; j < count; j++)
396 if (nodes[j] == node) {
402 debug("%s: warning: alias '%s' points to a node "
403 "'%s' that is missing or is not compatible "
404 " with '%s'\n", __func__, path,
405 fdt_get_name(blob, node, NULL),
411 * Add this node to our list in the right place, and mark
414 if (fdtdec_get_is_enabled(blob, node)) {
415 if (node_list[number]) {
416 debug("%s: warning: alias '%s' requires that "
417 "a node be placed in the list in a "
418 "position which is already filled by "
419 "node '%s'\n", __func__, path,
420 fdt_get_name(blob, node, NULL));
423 node_list[number] = node;
424 if (number >= num_found)
425 num_found = number + 1;
430 /* Add any nodes not mentioned by an alias */
431 for (i = j = 0; i < maxcount; i++) {
433 for (; j < maxcount; j++)
435 fdtdec_get_is_enabled(blob, nodes[j]))
438 /* Have we run out of nodes to add? */
442 assert(!node_list[i]);
443 node_list[i] = nodes[j++];
452 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
455 int base_len = strlen(base);
456 const char *find_name;
461 find_name = fdt_get_name(blob, offset, &find_namelen);
462 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
464 aliases = fdt_path_offset(blob, "/aliases");
465 for (prop_offset = fdt_first_property_offset(blob, aliases);
467 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
473 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
474 debug(" - %s, %s\n", name, prop);
475 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
476 strncmp(name, base, base_len))
479 slash = strrchr(prop, '/');
480 if (strcmp(slash + 1, find_name))
482 val = trailing_strtol(name);
485 debug("Found seq %d\n", *seqp);
490 debug("Not found\n");
494 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
496 int base_len = strlen(base);
501 debug("Looking for highest alias id for '%s'\n", base);
503 aliases = fdt_path_offset(blob, "/aliases");
504 for (prop_offset = fdt_first_property_offset(blob, aliases);
506 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
511 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
512 debug(" - %s, %s\n", name, prop);
513 if (*prop != '/' || prop[len - 1] ||
514 strncmp(name, base, base_len))
517 val = trailing_strtol(name);
519 debug("Found seq %d\n", val);
527 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
533 chosen_node = fdt_path_offset(blob, "/chosen");
534 return fdt_getprop(blob, chosen_node, name, NULL);
537 int fdtdec_get_chosen_node(const void *blob, const char *name)
541 prop = fdtdec_get_chosen_prop(blob, name);
543 return -FDT_ERR_NOTFOUND;
544 return fdt_path_offset(blob, prop);
547 int fdtdec_check_fdt(void)
550 * We must have an FDT, but we cannot panic() yet since the console
551 * is not ready. So for now, just assert(). Boards which need an early
552 * FDT (prior to console ready) will need to make their own
553 * arrangements and do their own checks.
555 assert(!fdtdec_prepare_fdt());
560 * This function is a little odd in that it accesses global data. At some
561 * point if the architecture board.c files merge this will make more sense.
562 * Even now, it is common code.
564 int fdtdec_prepare_fdt(void)
566 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
567 fdt_check_header(gd->fdt_blob)) {
568 #ifdef CONFIG_SPL_BUILD
569 puts("Missing DTB\n");
571 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
574 printf("fdt_blob=%p\n", gd->fdt_blob);
575 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
585 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
590 debug("%s: %s\n", __func__, prop_name);
591 phandle = fdt_getprop(blob, node, prop_name, NULL);
593 return -FDT_ERR_NOTFOUND;
595 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
600 * Look up a property in a node and check that it has a minimum length.
602 * @param blob FDT blob
603 * @param node node to examine
604 * @param prop_name name of property to find
605 * @param min_len minimum property length in bytes
606 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
607 found, or -FDT_ERR_BADLAYOUT if not enough data
608 * @return pointer to cell, which is only valid if err == 0
610 static const void *get_prop_check_min_len(const void *blob, int node,
611 const char *prop_name, int min_len,
617 debug("%s: %s\n", __func__, prop_name);
618 cell = fdt_getprop(blob, node, prop_name, &len);
620 *err = -FDT_ERR_NOTFOUND;
621 else if (len < min_len)
622 *err = -FDT_ERR_BADLAYOUT;
628 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
629 u32 *array, int count)
634 debug("%s: %s\n", __func__, prop_name);
635 cell = get_prop_check_min_len(blob, node, prop_name,
636 sizeof(u32) * count, &err);
640 for (i = 0; i < count; i++)
641 array[i] = fdt32_to_cpu(cell[i]);
646 int fdtdec_get_int_array_count(const void *blob, int node,
647 const char *prop_name, u32 *array, int count)
653 debug("%s: %s\n", __func__, prop_name);
654 cell = fdt_getprop(blob, node, prop_name, &len);
656 return -FDT_ERR_NOTFOUND;
657 elems = len / sizeof(u32);
660 for (i = 0; i < count; i++)
661 array[i] = fdt32_to_cpu(cell[i]);
666 const u32 *fdtdec_locate_array(const void *blob, int node,
667 const char *prop_name, int count)
672 cell = get_prop_check_min_len(blob, node, prop_name,
673 sizeof(u32) * count, &err);
674 return err ? NULL : cell;
677 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
682 debug("%s: %s\n", __func__, prop_name);
683 cell = fdt_getprop(blob, node, prop_name, &len);
687 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
688 const char *list_name,
689 const char *cells_name,
690 int cell_count, int index,
691 struct fdtdec_phandle_args *out_args)
693 const __be32 *list, *list_end;
694 int rc = 0, size, cur_index = 0;
699 /* Retrieve the phandle list property */
700 list = fdt_getprop(blob, src_node, list_name, &size);
703 list_end = list + size / sizeof(*list);
705 /* Loop over the phandles until all the requested entry is found */
706 while (list < list_end) {
711 * If phandle is 0, then it is an empty entry with no
712 * arguments. Skip forward to the next entry.
714 phandle = be32_to_cpup(list++);
717 * Find the provider node and parse the #*-cells
718 * property to determine the argument length.
720 * This is not needed if the cell count is hard-coded
721 * (i.e. cells_name not set, but cell_count is set),
722 * except when we're going to return the found node
725 if (cells_name || cur_index == index) {
726 node = fdt_node_offset_by_phandle(blob,
729 debug("%s: could not find phandle\n",
730 fdt_get_name(blob, src_node,
737 count = fdtdec_get_int(blob, node, cells_name,
740 debug("%s: could not get %s for %s\n",
741 fdt_get_name(blob, src_node,
744 fdt_get_name(blob, node,
753 * Make sure that the arguments actually fit in the
754 * remaining property data length
756 if (list + count > list_end) {
757 debug("%s: arguments longer than property\n",
758 fdt_get_name(blob, src_node, NULL));
764 * All of the error cases above bail out of the loop, so at
765 * this point, the parsing is successful. If the requested
766 * index matches, then fill the out_args structure and return,
767 * or return -ENOENT for an empty entry.
770 if (cur_index == index) {
777 if (count > MAX_PHANDLE_ARGS) {
778 debug("%s: too many arguments %d\n",
779 fdt_get_name(blob, src_node,
781 count = MAX_PHANDLE_ARGS;
783 out_args->node = node;
784 out_args->args_count = count;
785 for (i = 0; i < count; i++) {
787 be32_to_cpup(list++);
791 /* Found it! return success */
801 * Result will be one of:
802 * -ENOENT : index is for empty phandle
803 * -EINVAL : parsing error on data
804 * [1..n] : Number of phandle (count mode; when index = -1)
806 rc = index < 0 ? cur_index : -ENOENT;
811 int fdtdec_get_child_count(const void *blob, int node)
816 fdt_for_each_subnode(subnode, blob, node)
822 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
823 u8 *array, int count)
828 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
830 memcpy(array, cell, count);
834 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
835 const char *prop_name, int count)
840 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
846 int fdtdec_get_config_int(const void *blob, const char *prop_name,
851 debug("%s: %s\n", __func__, prop_name);
852 config_node = fdt_path_offset(blob, "/config");
855 return fdtdec_get_int(blob, config_node, prop_name, default_val);
858 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
863 debug("%s: %s\n", __func__, prop_name);
864 config_node = fdt_path_offset(blob, "/config");
867 prop = fdt_get_property(blob, config_node, prop_name, NULL);
872 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
878 debug("%s: %s\n", __func__, prop_name);
879 nodeoffset = fdt_path_offset(blob, "/config");
883 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
887 return (char *)nodep;
890 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
895 number = (number << 32) | fdt32_to_cpu(*ptr++);
900 int fdt_get_resource(const void *fdt, int node, const char *property,
901 unsigned int index, struct fdt_resource *res)
903 const fdt32_t *ptr, *end;
904 int na, ns, len, parent;
907 parent = fdt_parent_offset(fdt, node);
911 na = fdt_address_cells(fdt, parent);
912 ns = fdt_size_cells(fdt, parent);
914 ptr = fdt_getprop(fdt, node, property, &len);
918 end = ptr + len / sizeof(*ptr);
920 while (ptr + na + ns <= end) {
922 res->start = fdtdec_get_number(ptr, na);
923 res->end = res->start;
924 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
932 return -FDT_ERR_NOTFOUND;
935 int fdt_get_named_resource(const void *fdt, int node, const char *property,
936 const char *prop_names, const char *name,
937 struct fdt_resource *res)
941 index = fdt_stringlist_search(fdt, node, prop_names, name);
945 return fdt_get_resource(fdt, node, property, index, res);
948 static int decode_timing_property(const void *blob, int node, const char *name,
949 struct timing_entry *result)
954 prop = fdt_getprop(blob, node, name, &length);
956 debug("%s: could not find property %s\n",
957 fdt_get_name(blob, node, NULL), name);
961 if (length == sizeof(u32)) {
962 result->typ = fdtdec_get_int(blob, node, name, 0);
963 result->min = result->typ;
964 result->max = result->typ;
966 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
972 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
973 struct display_timing *dt)
975 int i, node, timings_node;
979 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
980 if (timings_node < 0)
983 for (i = 0, node = fdt_first_subnode(blob, timings_node);
984 node > 0 && i != index;
985 node = fdt_next_subnode(blob, node))
991 memset(dt, 0, sizeof(*dt));
993 ret |= decode_timing_property(blob, node, "hback-porch",
995 ret |= decode_timing_property(blob, node, "hfront-porch",
997 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
998 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
999 ret |= decode_timing_property(blob, node, "vback-porch",
1001 ret |= decode_timing_property(blob, node, "vfront-porch",
1003 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1004 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1005 ret |= decode_timing_property(blob, node, "clock-frequency",
1009 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1011 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1012 DISPLAY_FLAGS_VSYNC_LOW;
1014 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1016 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1017 DISPLAY_FLAGS_HSYNC_LOW;
1019 val = fdtdec_get_int(blob, node, "de-active", -1);
1021 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1022 DISPLAY_FLAGS_DE_LOW;
1024 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1026 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1027 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1030 if (fdtdec_get_bool(blob, node, "interlaced"))
1031 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1032 if (fdtdec_get_bool(blob, node, "doublescan"))
1033 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1034 if (fdtdec_get_bool(blob, node, "doubleclk"))
1035 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1040 int fdtdec_setup_mem_size_base_fdt(const void *blob)
1043 struct fdt_resource res;
1045 mem = fdt_path_offset(blob, "/memory");
1047 debug("%s: Missing /memory node\n", __func__);
1051 ret = fdt_get_resource(blob, mem, "reg", 0, &res);
1053 debug("%s: Unable to decode first memory bank\n", __func__);
1057 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1058 gd->ram_base = (unsigned long)res.start;
1059 debug("%s: Initial DRAM size %llx\n", __func__,
1060 (unsigned long long)gd->ram_size);
1065 int fdtdec_setup_mem_size_base(void)
1067 return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
1070 #if defined(CONFIG_NR_DRAM_BANKS)
1072 static int get_next_memory_node(const void *blob, int mem)
1075 mem = fdt_node_offset_by_prop_value(blob, mem,
1076 "device_type", "memory", 7);
1077 } while (!fdtdec_get_is_enabled(blob, mem));
1082 int fdtdec_setup_memory_banksize_fdt(const void *blob)
1084 int bank, ret, mem, reg = 0;
1085 struct fdt_resource res;
1087 mem = get_next_memory_node(blob, -1);
1089 debug("%s: Missing /memory node\n", __func__);
1093 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1094 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1095 if (ret == -FDT_ERR_NOTFOUND) {
1097 mem = get_next_memory_node(blob, mem);
1098 if (mem == -FDT_ERR_NOTFOUND)
1101 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1102 if (ret == -FDT_ERR_NOTFOUND)
1109 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1110 gd->bd->bi_dram[bank].size =
1111 (phys_size_t)(res.end - res.start + 1);
1113 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1115 (unsigned long long)gd->bd->bi_dram[bank].start,
1116 (unsigned long long)gd->bd->bi_dram[bank].size);
1122 int fdtdec_setup_memory_banksize(void)
1124 return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
1129 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1130 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1131 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1132 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1134 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1135 bool gzip = 0, lzo = 0;
1136 ulong sz_in = sz_src;
1140 if (CONFIG_IS_ENABLED(GZIP))
1141 if (gzip_parse_header(src, sz_in) >= 0)
1143 if (CONFIG_IS_ENABLED(LZO))
1144 if (!gzip && lzop_is_valid_header(src))
1151 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1152 dst = malloc(sz_out);
1154 puts("uncompress_blob: Unable to allocate memory\n");
1158 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1159 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1165 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1166 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1167 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1168 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1173 /* not a valid compressed blob */
1174 puts("uncompress_blob: Unable to uncompress\n");
1175 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1183 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1185 *dstp = (void *)src;
1191 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1193 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1194 * provide and/or fixup the fdt.
1196 __weak void *board_fdt_blob_setup(void)
1198 void *fdt_blob = NULL;
1199 #ifdef CONFIG_SPL_BUILD
1200 /* FDT is at end of BSS unless it is in a different memory region */
1201 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1202 fdt_blob = (ulong *)&_image_binary_end;
1204 fdt_blob = (ulong *)&__bss_end;
1206 /* FDT is at end of image */
1207 fdt_blob = (ulong *)&_end;
1213 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1218 if (!is_valid_ethaddr(mac))
1221 path = fdt_get_alias(fdt, "ethernet");
1225 debug("ethernet alias found: %s\n", path);
1227 offset = fdt_path_offset(fdt, path);
1229 debug("ethernet alias points to absent node %s\n", path);
1233 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1237 debug("MAC address: %pM\n", mac);
1242 static int fdtdec_init_reserved_memory(void *blob)
1244 int na, ns, node, err;
1247 /* inherit #address-cells and #size-cells from the root node */
1248 na = fdt_address_cells(blob, 0);
1249 ns = fdt_size_cells(blob, 0);
1251 node = fdt_add_subnode(blob, 0, "reserved-memory");
1255 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1259 value = cpu_to_fdt32(ns);
1261 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1265 value = cpu_to_fdt32(na);
1267 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1274 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1275 const struct fdt_memory *carveout,
1278 fdt32_t cells[4] = {}, *ptr = cells;
1279 uint32_t upper, lower, phandle;
1280 int parent, node, na, ns, err;
1284 /* create an empty /reserved-memory node if one doesn't exist */
1285 parent = fdt_path_offset(blob, "/reserved-memory");
1287 parent = fdtdec_init_reserved_memory(blob);
1292 /* only 1 or 2 #address-cells and #size-cells are supported */
1293 na = fdt_address_cells(blob, parent);
1294 if (na < 1 || na > 2)
1295 return -FDT_ERR_BADNCELLS;
1297 ns = fdt_size_cells(blob, parent);
1298 if (ns < 1 || ns > 2)
1299 return -FDT_ERR_BADNCELLS;
1301 /* find a matching node and return the phandle to that */
1302 fdt_for_each_subnode(node, blob, parent) {
1303 const char *name = fdt_get_name(blob, node, NULL);
1304 phys_addr_t addr, size;
1306 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
1307 if (addr == FDT_ADDR_T_NONE) {
1308 debug("failed to read address/size for %s\n", name);
1312 if (addr == carveout->start && (addr + size) == carveout->end) {
1314 *phandlep = fdt_get_phandle(blob, node);
1320 * Unpack the start address and generate the name of the new node
1321 * base on the basename and the unit-address.
1323 upper = upper_32_bits(carveout->start);
1324 lower = lower_32_bits(carveout->start);
1326 if (na > 1 && upper > 0)
1327 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1331 debug("address %08x:%08x exceeds addressable space\n",
1333 return -FDT_ERR_BADVALUE;
1336 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1339 node = fdt_add_subnode(blob, parent, name);
1344 err = fdt_generate_phandle(blob, &phandle);
1348 err = fdtdec_set_phandle(blob, node, phandle);
1353 /* store one or two address cells */
1355 *ptr++ = cpu_to_fdt32(upper);
1357 *ptr++ = cpu_to_fdt32(lower);
1359 /* store one or two size cells */
1360 size = carveout->end - carveout->start + 1;
1361 upper = upper_32_bits(size);
1362 lower = lower_32_bits(size);
1365 *ptr++ = cpu_to_fdt32(upper);
1367 *ptr++ = cpu_to_fdt32(lower);
1369 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1373 /* return the phandle for the new node for the caller to use */
1375 *phandlep = phandle;
1380 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1381 unsigned int index, struct fdt_memory *carveout)
1383 const fdt32_t *prop;
1388 offset = fdt_path_offset(blob, node);
1392 prop = fdt_getprop(blob, offset, name, &len);
1394 debug("failed to get %s for %s\n", name, node);
1395 return -FDT_ERR_NOTFOUND;
1398 if ((len % sizeof(phandle)) != 0) {
1399 debug("invalid phandle property\n");
1400 return -FDT_ERR_BADPHANDLE;
1403 if (len < (sizeof(phandle) * (index + 1))) {
1404 debug("invalid phandle index\n");
1405 return -FDT_ERR_BADPHANDLE;
1408 phandle = fdt32_to_cpu(prop[index]);
1410 offset = fdt_node_offset_by_phandle(blob, phandle);
1412 debug("failed to find node for phandle %u\n", phandle);
1416 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1419 if (carveout->start == FDT_ADDR_T_NONE) {
1420 debug("failed to read address/size from \"reg\" property\n");
1421 return -FDT_ERR_NOTFOUND;
1424 carveout->end = carveout->start + size - 1;
1429 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1430 unsigned int index, const char *name,
1431 const struct fdt_memory *carveout)
1437 /* XXX implement support for multiple phandles */
1439 debug("invalid index %u\n", index);
1440 return -FDT_ERR_BADOFFSET;
1443 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1445 debug("failed to add reserved memory: %d\n", err);
1449 offset = fdt_path_offset(blob, node);
1451 debug("failed to find offset for node %s: %d\n", node, offset);
1455 value = cpu_to_fdt32(phandle);
1457 err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
1459 debug("failed to set %s property for node %s: %d\n", prop_name,
1467 int fdtdec_setup(void)
1469 #if CONFIG_IS_ENABLED(OF_CONTROL)
1470 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1473 # ifdef CONFIG_OF_EMBED
1474 /* Get a pointer to the FDT */
1475 # ifdef CONFIG_SPL_BUILD
1476 gd->fdt_blob = __dtb_dt_spl_begin;
1478 gd->fdt_blob = __dtb_dt_begin;
1480 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1481 /* Allow the board to override the fdt address. */
1482 gd->fdt_blob = board_fdt_blob_setup();
1483 # elif defined(CONFIG_OF_HOSTFILE)
1484 if (sandbox_read_fdt_from_file()) {
1485 puts("Failed to read control FDT\n");
1488 # elif defined(CONFIG_OF_PRIOR_STAGE)
1489 gd->fdt_blob = (void *)prior_stage_fdt_address;
1491 # ifndef CONFIG_SPL_BUILD
1492 /* Allow the early environment to override the fdt address */
1493 gd->fdt_blob = map_sysmem
1494 (env_get_ulong("fdtcontroladdr", 16,
1495 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1498 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1500 * Try and uncompress the blob.
1501 * Unfortunately there is no way to know how big the input blob really
1502 * is. So let us set the maximum input size arbitrarily high. 16MB
1503 * ought to be more than enough for packed DTBs.
1505 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1506 gd->fdt_blob = fdt_blob;
1509 * Check if blob is a FIT images containings DTBs.
1510 * If so, pick the most relevant
1512 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1514 gd->multi_dtb_fit = gd->fdt_blob;
1515 gd->fdt_blob = fdt_blob;
1521 return fdtdec_prepare_fdt();
1524 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1525 int fdtdec_resetup(int *rescan)
1530 * If the current DTB is part of a compressed FIT image,
1531 * try to locate the best match from the uncompressed
1532 * FIT image stillpresent there. Save the time and space
1533 * required to uncompress it again.
1535 if (gd->multi_dtb_fit) {
1536 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1538 if (fdt_blob == gd->fdt_blob) {
1540 * The best match did not change. no need to tear down
1541 * the DM and rescan the fdt.
1548 gd->fdt_blob = fdt_blob;
1549 return fdtdec_prepare_fdt();
1553 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1554 * not a FIT image containings DTB, but a single DTB. There is no need
1555 * to teard down DM and rescan the DT in this case.
1562 #ifdef CONFIG_NR_DRAM_BANKS
1563 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1564 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1566 int addr_cells, size_cells;
1567 const u32 *cell, *end;
1568 u64 total_size, size, addr;
1574 debug("%s: board_id=%d\n", __func__, board_id);
1577 node = fdt_path_offset(blob, area);
1579 debug("No %s node found\n", area);
1583 cell = fdt_getprop(blob, node, "reg", &len);
1585 debug("No reg property found\n");
1589 addr_cells = fdt_address_cells(blob, node);
1590 size_cells = fdt_size_cells(blob, node);
1592 /* Check the board id and mask */
1593 for (child = fdt_first_subnode(blob, node);
1595 child = fdt_next_subnode(blob, child)) {
1596 int match_mask, match_value;
1598 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1599 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1601 if (match_value >= 0 &&
1602 ((board_id & match_mask) == match_value)) {
1603 /* Found matching mask */
1604 debug("Found matching mask %d\n", match_mask);
1606 cell = fdt_getprop(blob, node, "reg", &len);
1608 debug("No memory-banks property found\n");
1614 /* Note: if no matching subnode was found we use the parent node */
1617 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1618 CONFIG_NR_DRAM_BANKS);
1621 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1624 end = cell + len / 4 - addr_cells - size_cells;
1625 debug("cell at %p, end %p\n", cell, end);
1626 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1630 if (addr_cells == 2)
1631 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1632 addr += fdt32_to_cpu(*cell++);
1634 bd->bi_dram[bank].start = addr;
1636 *basep = (phys_addr_t)addr;
1639 if (size_cells == 2)
1640 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1641 size += fdt32_to_cpu(*cell++);
1646 debug("Auto-sizing %llx, size %llx: ", addr, size);
1647 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1648 if (new_size == size) {
1651 debug("sized to %llx\n", new_size);
1657 bd->bi_dram[bank].size = size;
1661 debug("Memory size %llu\n", total_size);
1663 *sizep = (phys_size_t)total_size;
1667 #endif /* CONFIG_NR_DRAM_BANKS */
1669 #endif /* !USE_HOSTCC */