1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
15 #include <dm/of_extra.h>
19 #include <fdt_support.h>
22 #include <linux/libfdt.h>
24 #include <asm/sections.h>
25 #include <linux/ctype.h>
26 #include <linux/lzo.h>
27 #include <linux/ioport.h>
29 DECLARE_GLOBAL_DATA_PTR;
32 * Here are the type we know about. One day we might allow drivers to
33 * register. For now we just put them here. The COMPAT macro allows us to
34 * turn this into a sparse list later, and keeps the ID with the name.
36 * NOTE: This list is basically a TODO list for things that need to be
37 * converted to driver model. So don't add new things here unless there is a
38 * good reason why driver-model conversion is infeasible. Examples include
39 * things which are used before driver model is available.
41 #define COMPAT(id, name) name
42 static const char * const compat_names[COMPAT_COUNT] = {
43 COMPAT(UNKNOWN, "<none>"),
44 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
45 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
46 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
47 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
48 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
49 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
50 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
51 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
52 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
53 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
54 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
55 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
56 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
57 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
58 COMPAT(INTEL_MICROCODE, "intel,microcode"),
59 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
60 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
61 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
62 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
63 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
64 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
65 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
66 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
67 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
68 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
69 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
74 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
75 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
76 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
77 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
80 const char *fdtdec_get_compatible(enum fdt_compat_id id)
82 /* We allow reading of the 'unknown' ID for testing purposes */
83 assert(id >= 0 && id < COMPAT_COUNT);
84 return compat_names[id];
87 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
88 const char *prop_name, int index, int na,
89 int ns, fdt_size_t *sizep,
92 const fdt32_t *prop, *prop_end;
93 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
97 debug("%s: %s: ", __func__, prop_name);
99 prop = fdt_getprop(blob, node, prop_name, &len);
101 debug("(not found)\n");
102 return FDT_ADDR_T_NONE;
104 prop_end = prop + (len / sizeof(*prop));
106 prop_addr = prop + (index * (na + ns));
107 prop_size = prop_addr + na;
108 prop_after_size = prop_size + ns;
109 if (prop_after_size > prop_end) {
110 debug("(not enough data: expected >= %d cells, got %d cells)\n",
111 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
112 return FDT_ADDR_T_NONE;
115 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
117 addr = fdt_translate_address(blob, node, prop_addr);
120 addr = fdtdec_get_number(prop_addr, na);
123 *sizep = fdtdec_get_number(prop_size, ns);
124 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
125 (unsigned long long)*sizep);
127 debug("addr=%08llx\n", (unsigned long long)addr);
133 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
134 int node, const char *prop_name,
135 int index, fdt_size_t *sizep,
140 debug("%s: ", __func__);
142 na = fdt_address_cells(blob, parent);
144 debug("(bad #address-cells)\n");
145 return FDT_ADDR_T_NONE;
148 ns = fdt_size_cells(blob, parent);
150 debug("(bad #size-cells)\n");
151 return FDT_ADDR_T_NONE;
154 debug("na=%d, ns=%d, ", na, ns);
156 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
157 ns, sizep, translate);
160 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
161 const char *prop_name, int index,
167 debug("%s: ", __func__);
169 parent = fdt_parent_offset(blob, node);
171 debug("(no parent found)\n");
172 return FDT_ADDR_T_NONE;
175 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
176 index, sizep, translate);
179 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
180 const char *prop_name, fdt_size_t *sizep)
182 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
184 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
185 sizeof(fdt_addr_t) / sizeof(fdt32_t),
189 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
191 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
194 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
195 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
197 const char *list, *end;
200 list = fdt_getprop(blob, node, "compatible", &len);
207 if (len >= strlen("pciVVVV,DDDD")) {
208 char *s = strstr(list, "pci");
211 * check if the string is something like pciVVVV,DDDD.RR
212 * or just pciVVVV,DDDD
214 if (s && s[7] == ',' &&
215 (s[12] == '.' || s[12] == 0)) {
217 *vendor = simple_strtol(s, NULL, 16);
220 *device = simple_strtol(s, NULL, 16);
231 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
236 /* extract the bar number from fdt_pci_addr */
237 barnum = addr->phys_hi & 0xff;
238 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
241 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
242 *bar = dm_pci_read_bar32(dev, barnum);
248 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
249 uint64_t default_val)
251 const unaligned_fdt64_t *cell64;
254 cell64 = fdt_getprop(blob, node, prop_name, &length);
255 if (!cell64 || length < sizeof(*cell64))
258 return fdt64_to_cpu(*cell64);
261 int fdtdec_get_is_enabled(const void *blob, int node)
266 * It should say "okay", so only allow that. Some fdts use "ok" but
267 * this is a bug. Please fix your device tree source file. See here
270 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
272 cell = fdt_getprop(blob, node, "status", NULL);
274 return strcmp(cell, "okay") == 0;
278 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
280 enum fdt_compat_id id;
282 /* Search our drivers */
283 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
284 if (fdt_node_check_compatible(blob, node,
285 compat_names[id]) == 0)
287 return COMPAT_UNKNOWN;
290 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
292 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
295 int fdtdec_next_compatible_subnode(const void *blob, int node,
296 enum fdt_compat_id id, int *depthp)
299 node = fdt_next_node(blob, node, depthp);
300 } while (*depthp > 1);
302 /* If this is a direct subnode, and compatible, return it */
303 if (*depthp == 1 && 0 == fdt_node_check_compatible(
304 blob, node, compat_names[id]))
307 return -FDT_ERR_NOTFOUND;
310 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
313 #define MAX_STR_LEN 20
314 char str[MAX_STR_LEN + 20];
317 /* snprintf() is not available */
318 assert(strlen(name) < MAX_STR_LEN);
319 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
320 node = fdt_path_offset(blob, str);
323 err = fdt_node_check_compatible(blob, node, compat_names[id]);
327 return -FDT_ERR_NOTFOUND;
332 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
333 enum fdt_compat_id id, int *node_list,
336 memset(node_list, '\0', sizeof(*node_list) * maxcount);
338 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
341 /* TODO: Can we tighten this code up a little? */
342 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
343 enum fdt_compat_id id, int *node_list,
346 int name_len = strlen(name);
354 /* find the alias node if present */
355 alias_node = fdt_path_offset(blob, "/aliases");
358 * start with nothing, and we can assume that the root node can't
361 memset(nodes, '\0', sizeof(nodes));
363 /* First find all the compatible nodes */
364 for (node = count = 0; node >= 0 && count < maxcount;) {
365 node = fdtdec_next_compatible(blob, node, id);
367 nodes[count++] = node;
370 debug("%s: warning: maxcount exceeded with alias '%s'\n",
373 /* Now find all the aliases */
374 for (offset = fdt_first_property_offset(blob, alias_node);
376 offset = fdt_next_property_offset(blob, offset)) {
377 const struct fdt_property *prop;
383 prop = fdt_get_property_by_offset(blob, offset, NULL);
384 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
385 if (prop->len && 0 == strncmp(path, name, name_len))
386 node = fdt_path_offset(blob, prop->data);
390 /* Get the alias number */
391 number = simple_strtoul(path + name_len, NULL, 10);
392 if (number < 0 || number >= maxcount) {
393 debug("%s: warning: alias '%s' is out of range\n",
398 /* Make sure the node we found is actually in our list! */
400 for (j = 0; j < count; j++)
401 if (nodes[j] == node) {
407 debug("%s: warning: alias '%s' points to a node "
408 "'%s' that is missing or is not compatible "
409 " with '%s'\n", __func__, path,
410 fdt_get_name(blob, node, NULL),
416 * Add this node to our list in the right place, and mark
419 if (fdtdec_get_is_enabled(blob, node)) {
420 if (node_list[number]) {
421 debug("%s: warning: alias '%s' requires that "
422 "a node be placed in the list in a "
423 "position which is already filled by "
424 "node '%s'\n", __func__, path,
425 fdt_get_name(blob, node, NULL));
428 node_list[number] = node;
429 if (number >= num_found)
430 num_found = number + 1;
435 /* Add any nodes not mentioned by an alias */
436 for (i = j = 0; i < maxcount; i++) {
438 for (; j < maxcount; j++)
440 fdtdec_get_is_enabled(blob, nodes[j]))
443 /* Have we run out of nodes to add? */
447 assert(!node_list[i]);
448 node_list[i] = nodes[j++];
457 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
460 int base_len = strlen(base);
461 const char *find_name;
466 find_name = fdt_get_name(blob, offset, &find_namelen);
467 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
469 aliases = fdt_path_offset(blob, "/aliases");
470 for (prop_offset = fdt_first_property_offset(blob, aliases);
472 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
478 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
479 debug(" - %s, %s\n", name, prop);
480 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
481 strncmp(name, base, base_len))
484 slash = strrchr(prop, '/');
485 if (strcmp(slash + 1, find_name))
487 val = trailing_strtol(name);
490 debug("Found seq %d\n", *seqp);
495 debug("Not found\n");
499 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
501 int base_len = strlen(base);
506 debug("Looking for highest alias id for '%s'\n", base);
508 aliases = fdt_path_offset(blob, "/aliases");
509 for (prop_offset = fdt_first_property_offset(blob, aliases);
511 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
516 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
517 debug(" - %s, %s\n", name, prop);
518 if (*prop != '/' || prop[len - 1] ||
519 strncmp(name, base, base_len))
522 val = trailing_strtol(name);
524 debug("Found seq %d\n", val);
532 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
538 chosen_node = fdt_path_offset(blob, "/chosen");
539 return fdt_getprop(blob, chosen_node, name, NULL);
542 int fdtdec_get_chosen_node(const void *blob, const char *name)
546 prop = fdtdec_get_chosen_prop(blob, name);
548 return -FDT_ERR_NOTFOUND;
549 return fdt_path_offset(blob, prop);
552 int fdtdec_check_fdt(void)
555 * We must have an FDT, but we cannot panic() yet since the console
556 * is not ready. So for now, just assert(). Boards which need an early
557 * FDT (prior to console ready) will need to make their own
558 * arrangements and do their own checks.
560 assert(!fdtdec_prepare_fdt());
565 * This function is a little odd in that it accesses global data. At some
566 * point if the architecture board.c files merge this will make more sense.
567 * Even now, it is common code.
569 int fdtdec_prepare_fdt(void)
571 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
572 fdt_check_header(gd->fdt_blob)) {
573 #ifdef CONFIG_SPL_BUILD
574 puts("Missing DTB\n");
576 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
579 printf("fdt_blob=%p\n", gd->fdt_blob);
580 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
590 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
595 debug("%s: %s\n", __func__, prop_name);
596 phandle = fdt_getprop(blob, node, prop_name, NULL);
598 return -FDT_ERR_NOTFOUND;
600 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
605 * Look up a property in a node and check that it has a minimum length.
607 * @param blob FDT blob
608 * @param node node to examine
609 * @param prop_name name of property to find
610 * @param min_len minimum property length in bytes
611 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
612 found, or -FDT_ERR_BADLAYOUT if not enough data
613 * @return pointer to cell, which is only valid if err == 0
615 static const void *get_prop_check_min_len(const void *blob, int node,
616 const char *prop_name, int min_len,
622 debug("%s: %s\n", __func__, prop_name);
623 cell = fdt_getprop(blob, node, prop_name, &len);
625 *err = -FDT_ERR_NOTFOUND;
626 else if (len < min_len)
627 *err = -FDT_ERR_BADLAYOUT;
633 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
634 u32 *array, int count)
639 debug("%s: %s\n", __func__, prop_name);
640 cell = get_prop_check_min_len(blob, node, prop_name,
641 sizeof(u32) * count, &err);
645 for (i = 0; i < count; i++)
646 array[i] = fdt32_to_cpu(cell[i]);
651 int fdtdec_get_int_array_count(const void *blob, int node,
652 const char *prop_name, u32 *array, int count)
658 debug("%s: %s\n", __func__, prop_name);
659 cell = fdt_getprop(blob, node, prop_name, &len);
661 return -FDT_ERR_NOTFOUND;
662 elems = len / sizeof(u32);
665 for (i = 0; i < count; i++)
666 array[i] = fdt32_to_cpu(cell[i]);
671 const u32 *fdtdec_locate_array(const void *blob, int node,
672 const char *prop_name, int count)
677 cell = get_prop_check_min_len(blob, node, prop_name,
678 sizeof(u32) * count, &err);
679 return err ? NULL : cell;
682 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
687 debug("%s: %s\n", __func__, prop_name);
688 cell = fdt_getprop(blob, node, prop_name, &len);
692 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
693 const char *list_name,
694 const char *cells_name,
695 int cell_count, int index,
696 struct fdtdec_phandle_args *out_args)
698 const __be32 *list, *list_end;
699 int rc = 0, size, cur_index = 0;
704 /* Retrieve the phandle list property */
705 list = fdt_getprop(blob, src_node, list_name, &size);
708 list_end = list + size / sizeof(*list);
710 /* Loop over the phandles until all the requested entry is found */
711 while (list < list_end) {
716 * If phandle is 0, then it is an empty entry with no
717 * arguments. Skip forward to the next entry.
719 phandle = be32_to_cpup(list++);
722 * Find the provider node and parse the #*-cells
723 * property to determine the argument length.
725 * This is not needed if the cell count is hard-coded
726 * (i.e. cells_name not set, but cell_count is set),
727 * except when we're going to return the found node
730 if (cells_name || cur_index == index) {
731 node = fdt_node_offset_by_phandle(blob,
734 debug("%s: could not find phandle\n",
735 fdt_get_name(blob, src_node,
742 count = fdtdec_get_int(blob, node, cells_name,
745 debug("%s: could not get %s for %s\n",
746 fdt_get_name(blob, src_node,
749 fdt_get_name(blob, node,
758 * Make sure that the arguments actually fit in the
759 * remaining property data length
761 if (list + count > list_end) {
762 debug("%s: arguments longer than property\n",
763 fdt_get_name(blob, src_node, NULL));
769 * All of the error cases above bail out of the loop, so at
770 * this point, the parsing is successful. If the requested
771 * index matches, then fill the out_args structure and return,
772 * or return -ENOENT for an empty entry.
775 if (cur_index == index) {
782 if (count > MAX_PHANDLE_ARGS) {
783 debug("%s: too many arguments %d\n",
784 fdt_get_name(blob, src_node,
786 count = MAX_PHANDLE_ARGS;
788 out_args->node = node;
789 out_args->args_count = count;
790 for (i = 0; i < count; i++) {
792 be32_to_cpup(list++);
796 /* Found it! return success */
806 * Result will be one of:
807 * -ENOENT : index is for empty phandle
808 * -EINVAL : parsing error on data
809 * [1..n] : Number of phandle (count mode; when index = -1)
811 rc = index < 0 ? cur_index : -ENOENT;
816 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
817 u8 *array, int count)
822 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
824 memcpy(array, cell, count);
828 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
829 const char *prop_name, int count)
834 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
840 int fdtdec_get_config_int(const void *blob, const char *prop_name,
845 debug("%s: %s\n", __func__, prop_name);
846 config_node = fdt_path_offset(blob, "/config");
849 return fdtdec_get_int(blob, config_node, prop_name, default_val);
852 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
857 debug("%s: %s\n", __func__, prop_name);
858 config_node = fdt_path_offset(blob, "/config");
861 prop = fdt_get_property(blob, config_node, prop_name, NULL);
866 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
872 debug("%s: %s\n", __func__, prop_name);
873 nodeoffset = fdt_path_offset(blob, "/config");
877 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
881 return (char *)nodep;
884 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
889 number = (number << 32) | fdt32_to_cpu(*ptr++);
894 int fdt_get_resource(const void *fdt, int node, const char *property,
895 unsigned int index, struct fdt_resource *res)
897 const fdt32_t *ptr, *end;
898 int na, ns, len, parent;
901 parent = fdt_parent_offset(fdt, node);
905 na = fdt_address_cells(fdt, parent);
906 ns = fdt_size_cells(fdt, parent);
908 ptr = fdt_getprop(fdt, node, property, &len);
912 end = ptr + len / sizeof(*ptr);
914 while (ptr + na + ns <= end) {
916 res->start = fdtdec_get_number(ptr, na);
917 res->end = res->start;
918 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
926 return -FDT_ERR_NOTFOUND;
929 int fdt_get_named_resource(const void *fdt, int node, const char *property,
930 const char *prop_names, const char *name,
931 struct fdt_resource *res)
935 index = fdt_stringlist_search(fdt, node, prop_names, name);
939 return fdt_get_resource(fdt, node, property, index, res);
942 static int decode_timing_property(const void *blob, int node, const char *name,
943 struct timing_entry *result)
948 prop = fdt_getprop(blob, node, name, &length);
950 debug("%s: could not find property %s\n",
951 fdt_get_name(blob, node, NULL), name);
955 if (length == sizeof(u32)) {
956 result->typ = fdtdec_get_int(blob, node, name, 0);
957 result->min = result->typ;
958 result->max = result->typ;
960 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
966 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
967 struct display_timing *dt)
969 int i, node, timings_node;
973 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
974 if (timings_node < 0)
977 for (i = 0, node = fdt_first_subnode(blob, timings_node);
978 node > 0 && i != index;
979 node = fdt_next_subnode(blob, node))
985 memset(dt, 0, sizeof(*dt));
987 ret |= decode_timing_property(blob, node, "hback-porch",
989 ret |= decode_timing_property(blob, node, "hfront-porch",
991 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
992 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
993 ret |= decode_timing_property(blob, node, "vback-porch",
995 ret |= decode_timing_property(blob, node, "vfront-porch",
997 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
998 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
999 ret |= decode_timing_property(blob, node, "clock-frequency",
1003 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1005 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1006 DISPLAY_FLAGS_VSYNC_LOW;
1008 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1010 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1011 DISPLAY_FLAGS_HSYNC_LOW;
1013 val = fdtdec_get_int(blob, node, "de-active", -1);
1015 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1016 DISPLAY_FLAGS_DE_LOW;
1018 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1020 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1021 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1024 if (fdtdec_get_bool(blob, node, "interlaced"))
1025 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1026 if (fdtdec_get_bool(blob, node, "doublescan"))
1027 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1028 if (fdtdec_get_bool(blob, node, "doubleclk"))
1029 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1034 int fdtdec_setup_mem_size_base(void)
1038 struct resource res;
1040 mem = ofnode_path("/memory");
1041 if (!ofnode_valid(mem)) {
1042 debug("%s: Missing /memory node\n", __func__);
1046 ret = ofnode_read_resource(mem, 0, &res);
1048 debug("%s: Unable to decode first memory bank\n", __func__);
1052 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1053 gd->ram_base = (unsigned long)res.start;
1054 debug("%s: Initial DRAM size %llx\n", __func__,
1055 (unsigned long long)gd->ram_size);
1060 #if defined(CONFIG_NR_DRAM_BANKS)
1062 ofnode get_next_memory_node(ofnode mem)
1065 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
1066 } while (!ofnode_is_available(mem));
1071 int fdtdec_setup_memory_banksize(void)
1073 int bank, ret, reg = 0;
1074 struct resource res;
1075 ofnode mem = ofnode_null();
1077 mem = get_next_memory_node(mem);
1078 if (!ofnode_valid(mem)) {
1079 debug("%s: Missing /memory node\n", __func__);
1083 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1084 ret = ofnode_read_resource(mem, reg++, &res);
1087 mem = get_next_memory_node(mem);
1088 if (ofnode_valid(mem))
1091 ret = ofnode_read_resource(mem, reg++, &res);
1099 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1100 gd->bd->bi_dram[bank].size =
1101 (phys_size_t)(res.end - res.start + 1);
1103 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1105 (unsigned long long)gd->bd->bi_dram[bank].start,
1106 (unsigned long long)gd->bd->bi_dram[bank].size);
1112 int fdtdec_setup_mem_size_base_lowest(void)
1114 int bank, ret, reg = 0;
1115 struct resource res;
1118 ofnode mem = ofnode_null();
1120 gd->ram_base = (unsigned long)~0;
1122 mem = get_next_memory_node(mem);
1123 if (!ofnode_valid(mem)) {
1124 debug("%s: Missing /memory node\n", __func__);
1128 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1129 ret = ofnode_read_resource(mem, reg++, &res);
1132 mem = get_next_memory_node(mem);
1133 if (ofnode_valid(mem))
1136 ret = ofnode_read_resource(mem, reg++, &res);
1144 base = (unsigned long)res.start;
1145 size = (phys_size_t)(res.end - res.start + 1);
1147 if (gd->ram_base > base && size) {
1148 gd->ram_base = base;
1149 gd->ram_size = size;
1150 debug("%s: Initial DRAM base %lx size %lx\n",
1151 __func__, base, (unsigned long)size);
1159 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1160 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1161 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1162 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1164 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1165 bool gzip = 0, lzo = 0;
1166 ulong sz_in = sz_src;
1170 if (CONFIG_IS_ENABLED(GZIP))
1171 if (gzip_parse_header(src, sz_in) >= 0)
1173 if (CONFIG_IS_ENABLED(LZO))
1174 if (!gzip && lzop_is_valid_header(src))
1181 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1182 dst = malloc(sz_out);
1184 puts("uncompress_blob: Unable to allocate memory\n");
1188 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1189 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1195 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1196 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1197 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1198 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1203 /* not a valid compressed blob */
1204 puts("uncompress_blob: Unable to uncompress\n");
1205 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1213 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1215 *dstp = (void *)src;
1221 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1223 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1224 * provide and/or fixup the fdt.
1226 __weak void *board_fdt_blob_setup(void)
1228 void *fdt_blob = NULL;
1229 #ifdef CONFIG_SPL_BUILD
1230 /* FDT is at end of BSS unless it is in a different memory region */
1231 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1232 fdt_blob = (ulong *)&_image_binary_end;
1234 fdt_blob = (ulong *)&__bss_end;
1236 /* FDT is at end of image */
1237 fdt_blob = (ulong *)&_end;
1243 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1248 if (!is_valid_ethaddr(mac))
1251 path = fdt_get_alias(fdt, "ethernet");
1255 debug("ethernet alias found: %s\n", path);
1257 offset = fdt_path_offset(fdt, path);
1259 debug("ethernet alias points to absent node %s\n", path);
1263 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1267 debug("MAC address: %pM\n", mac);
1272 static int fdtdec_init_reserved_memory(void *blob)
1274 int na, ns, node, err;
1277 /* inherit #address-cells and #size-cells from the root node */
1278 na = fdt_address_cells(blob, 0);
1279 ns = fdt_size_cells(blob, 0);
1281 node = fdt_add_subnode(blob, 0, "reserved-memory");
1285 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1289 value = cpu_to_fdt32(ns);
1291 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1295 value = cpu_to_fdt32(na);
1297 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1304 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1305 const struct fdt_memory *carveout,
1308 fdt32_t cells[4] = {}, *ptr = cells;
1309 uint32_t upper, lower, phandle;
1310 int parent, node, na, ns, err;
1314 /* create an empty /reserved-memory node if one doesn't exist */
1315 parent = fdt_path_offset(blob, "/reserved-memory");
1317 parent = fdtdec_init_reserved_memory(blob);
1322 /* only 1 or 2 #address-cells and #size-cells are supported */
1323 na = fdt_address_cells(blob, parent);
1324 if (na < 1 || na > 2)
1325 return -FDT_ERR_BADNCELLS;
1327 ns = fdt_size_cells(blob, parent);
1328 if (ns < 1 || ns > 2)
1329 return -FDT_ERR_BADNCELLS;
1331 /* find a matching node and return the phandle to that */
1332 fdt_for_each_subnode(node, blob, parent) {
1333 const char *name = fdt_get_name(blob, node, NULL);
1337 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1339 if (addr == FDT_ADDR_T_NONE) {
1340 debug("failed to read address/size for %s\n", name);
1344 if (addr == carveout->start && (addr + size - 1) ==
1347 *phandlep = fdt_get_phandle(blob, node);
1353 * Unpack the start address and generate the name of the new node
1354 * base on the basename and the unit-address.
1356 upper = upper_32_bits(carveout->start);
1357 lower = lower_32_bits(carveout->start);
1359 if (na > 1 && upper > 0)
1360 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1364 debug("address %08x:%08x exceeds addressable space\n",
1366 return -FDT_ERR_BADVALUE;
1369 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1372 node = fdt_add_subnode(blob, parent, name);
1377 err = fdt_generate_phandle(blob, &phandle);
1381 err = fdtdec_set_phandle(blob, node, phandle);
1386 /* store one or two address cells */
1388 *ptr++ = cpu_to_fdt32(upper);
1390 *ptr++ = cpu_to_fdt32(lower);
1392 /* store one or two size cells */
1393 size = carveout->end - carveout->start + 1;
1394 upper = upper_32_bits(size);
1395 lower = lower_32_bits(size);
1398 *ptr++ = cpu_to_fdt32(upper);
1400 *ptr++ = cpu_to_fdt32(lower);
1402 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1406 /* return the phandle for the new node for the caller to use */
1408 *phandlep = phandle;
1413 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1414 unsigned int index, struct fdt_memory *carveout)
1416 const fdt32_t *prop;
1421 offset = fdt_path_offset(blob, node);
1425 prop = fdt_getprop(blob, offset, name, &len);
1427 debug("failed to get %s for %s\n", name, node);
1428 return -FDT_ERR_NOTFOUND;
1431 if ((len % sizeof(phandle)) != 0) {
1432 debug("invalid phandle property\n");
1433 return -FDT_ERR_BADPHANDLE;
1436 if (len < (sizeof(phandle) * (index + 1))) {
1437 debug("invalid phandle index\n");
1438 return -FDT_ERR_BADPHANDLE;
1441 phandle = fdt32_to_cpu(prop[index]);
1443 offset = fdt_node_offset_by_phandle(blob, phandle);
1445 debug("failed to find node for phandle %u\n", phandle);
1449 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1452 if (carveout->start == FDT_ADDR_T_NONE) {
1453 debug("failed to read address/size from \"reg\" property\n");
1454 return -FDT_ERR_NOTFOUND;
1457 carveout->end = carveout->start + size - 1;
1462 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1463 unsigned int index, const char *name,
1464 const struct fdt_memory *carveout)
1467 int err, offset, len;
1471 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1473 debug("failed to add reserved memory: %d\n", err);
1477 offset = fdt_path_offset(blob, node);
1479 debug("failed to find offset for node %s: %d\n", node, offset);
1483 value = cpu_to_fdt32(phandle);
1485 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1486 if (len == -FDT_ERR_NOTFOUND)
1492 if ((index + 1) * sizeof(value) > len) {
1493 err = fdt_setprop_placeholder(blob, offset, prop_name,
1494 (index + 1) * sizeof(value),
1497 debug("failed to resize reserved memory property: %s\n",
1503 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1505 index * sizeof(value),
1506 &value, sizeof(value));
1508 debug("failed to update %s property for node %s: %s\n",
1509 prop_name, node, fdt_strerror(err));
1516 __weak int fdtdec_board_setup(const void *fdt_blob)
1521 int fdtdec_setup(void)
1524 #if CONFIG_IS_ENABLED(OF_CONTROL)
1525 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1528 # ifdef CONFIG_OF_EMBED
1529 /* Get a pointer to the FDT */
1530 # ifdef CONFIG_SPL_BUILD
1531 gd->fdt_blob = __dtb_dt_spl_begin;
1533 gd->fdt_blob = __dtb_dt_begin;
1535 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1536 /* Allow the board to override the fdt address. */
1537 gd->fdt_blob = board_fdt_blob_setup();
1538 # elif defined(CONFIG_OF_HOSTFILE)
1539 if (sandbox_read_fdt_from_file()) {
1540 puts("Failed to read control FDT\n");
1543 # elif defined(CONFIG_OF_PRIOR_STAGE)
1544 gd->fdt_blob = (void *)prior_stage_fdt_address;
1546 # ifndef CONFIG_SPL_BUILD
1547 /* Allow the early environment to override the fdt address */
1548 gd->fdt_blob = map_sysmem
1549 (env_get_ulong("fdtcontroladdr", 16,
1550 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1553 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1555 * Try and uncompress the blob.
1556 * Unfortunately there is no way to know how big the input blob really
1557 * is. So let us set the maximum input size arbitrarily high. 16MB
1558 * ought to be more than enough for packed DTBs.
1560 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1561 gd->fdt_blob = fdt_blob;
1564 * Check if blob is a FIT images containings DTBs.
1565 * If so, pick the most relevant
1567 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1569 gd->multi_dtb_fit = gd->fdt_blob;
1570 gd->fdt_blob = fdt_blob;
1576 ret = fdtdec_prepare_fdt();
1578 ret = fdtdec_board_setup(gd->fdt_blob);
1582 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1583 int fdtdec_resetup(int *rescan)
1588 * If the current DTB is part of a compressed FIT image,
1589 * try to locate the best match from the uncompressed
1590 * FIT image stillpresent there. Save the time and space
1591 * required to uncompress it again.
1593 if (gd->multi_dtb_fit) {
1594 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1596 if (fdt_blob == gd->fdt_blob) {
1598 * The best match did not change. no need to tear down
1599 * the DM and rescan the fdt.
1606 gd->fdt_blob = fdt_blob;
1607 return fdtdec_prepare_fdt();
1611 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1612 * not a FIT image containings DTB, but a single DTB. There is no need
1613 * to teard down DM and rescan the DT in this case.
1620 #ifdef CONFIG_NR_DRAM_BANKS
1621 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1622 phys_addr_t *basep, phys_size_t *sizep,
1625 int addr_cells, size_cells;
1626 const u32 *cell, *end;
1627 u64 total_size, size, addr;
1633 debug("%s: board_id=%d\n", __func__, board_id);
1636 node = fdt_path_offset(blob, area);
1638 debug("No %s node found\n", area);
1642 cell = fdt_getprop(blob, node, "reg", &len);
1644 debug("No reg property found\n");
1648 addr_cells = fdt_address_cells(blob, node);
1649 size_cells = fdt_size_cells(blob, node);
1651 /* Check the board id and mask */
1652 for (child = fdt_first_subnode(blob, node);
1654 child = fdt_next_subnode(blob, child)) {
1655 int match_mask, match_value;
1657 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1658 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1660 if (match_value >= 0 &&
1661 ((board_id & match_mask) == match_value)) {
1662 /* Found matching mask */
1663 debug("Found matching mask %d\n", match_mask);
1665 cell = fdt_getprop(blob, node, "reg", &len);
1667 debug("No memory-banks property found\n");
1673 /* Note: if no matching subnode was found we use the parent node */
1676 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1677 CONFIG_NR_DRAM_BANKS);
1680 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1683 end = cell + len / 4 - addr_cells - size_cells;
1684 debug("cell at %p, end %p\n", cell, end);
1685 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1689 if (addr_cells == 2)
1690 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1691 addr += fdt32_to_cpu(*cell++);
1693 bd->bi_dram[bank].start = addr;
1695 *basep = (phys_addr_t)addr;
1698 if (size_cells == 2)
1699 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1700 size += fdt32_to_cpu(*cell++);
1705 debug("Auto-sizing %llx, size %llx: ", addr, size);
1706 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1707 if (new_size == size) {
1710 debug("sized to %llx\n", new_size);
1716 bd->bi_dram[bank].size = size;
1720 debug("Memory size %llu\n", total_size);
1722 *sizep = (phys_size_t)total_size;
1726 #endif /* CONFIG_NR_DRAM_BANKS */
1728 #endif /* !USE_HOSTCC */