2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
13 #include <fdt_support.h>
15 #include <asm/sections.h>
16 #include <dm/of_extra.h>
17 #include <linux/ctype.h>
19 DECLARE_GLOBAL_DATA_PTR;
22 * Here are the type we know about. One day we might allow drivers to
23 * register. For now we just put them here. The COMPAT macro allows us to
24 * turn this into a sparse list later, and keeps the ID with the name.
26 * NOTE: This list is basically a TODO list for things that need to be
27 * converted to driver model. So don't add new things here unless there is a
28 * good reason why driver-model conversion is infeasible. Examples include
29 * things which are used before driver model is available.
31 #define COMPAT(id, name) name
32 static const char * const compat_names[COMPAT_COUNT] = {
33 COMPAT(UNKNOWN, "<none>"),
34 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
35 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
36 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
37 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
38 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
39 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
40 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
41 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
42 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
43 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
44 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
45 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
46 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
47 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
48 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
49 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
50 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
51 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
52 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
53 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
54 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
55 COMPAT(INTEL_MICROCODE, "intel,microcode"),
56 COMPAT(AMS_AS3722, "ams,as3722"),
57 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
58 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
59 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
60 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
61 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
62 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
63 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
64 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
65 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
66 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
67 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
68 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
75 const char *fdtdec_get_compatible(enum fdt_compat_id id)
77 /* We allow reading of the 'unknown' ID for testing purposes */
78 assert(id >= 0 && id < COMPAT_COUNT);
79 return compat_names[id];
82 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
83 const char *prop_name, int index, int na, int ns,
84 fdt_size_t *sizep, bool translate)
86 const fdt32_t *prop, *prop_end;
87 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
91 debug("%s: %s: ", __func__, prop_name);
93 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
94 debug("(na too large for fdt_addr_t type)\n");
95 return FDT_ADDR_T_NONE;
98 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
99 debug("(ns too large for fdt_size_t type)\n");
100 return FDT_ADDR_T_NONE;
103 prop = fdt_getprop(blob, node, prop_name, &len);
105 debug("(not found)\n");
106 return FDT_ADDR_T_NONE;
108 prop_end = prop + (len / sizeof(*prop));
110 prop_addr = prop + (index * (na + ns));
111 prop_size = prop_addr + na;
112 prop_after_size = prop_size + ns;
113 if (prop_after_size > prop_end) {
114 debug("(not enough data: expected >= %d cells, got %d cells)\n",
115 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
116 return FDT_ADDR_T_NONE;
119 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
121 addr = fdt_translate_address(blob, node, prop_addr);
124 addr = fdtdec_get_number(prop_addr, na);
127 *sizep = fdtdec_get_number(prop_size, ns);
128 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
129 (unsigned long long)*sizep);
131 debug("addr=%08llx\n", (unsigned long long)addr);
137 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
138 int node, const char *prop_name, int index, fdt_size_t *sizep,
143 debug("%s: ", __func__);
145 na = fdt_address_cells(blob, parent);
147 debug("(bad #address-cells)\n");
148 return FDT_ADDR_T_NONE;
151 ns = fdt_size_cells(blob, parent);
153 debug("(bad #size-cells)\n");
154 return FDT_ADDR_T_NONE;
157 debug("na=%d, ns=%d, ", na, ns);
159 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
160 ns, sizep, translate);
163 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
164 const char *prop_name, int index, fdt_size_t *sizep,
169 debug("%s: ", __func__);
171 parent = fdt_parent_offset(blob, node);
173 debug("(no parent found)\n");
174 return FDT_ADDR_T_NONE;
177 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
178 index, sizep, translate);
181 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
182 const char *prop_name, fdt_size_t *sizep)
184 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
186 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
187 sizeof(fdt_addr_t) / sizeof(fdt32_t),
191 fdt_addr_t fdtdec_get_addr(const void *blob, int node,
192 const char *prop_name)
194 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
197 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
198 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
199 const char *prop_name, struct fdt_pci_addr *addr)
205 debug("%s: %s: ", __func__, prop_name);
208 * If we follow the pci bus bindings strictly, we should check
209 * the value of the node's parent node's #address-cells and
210 * #size-cells. They need to be 3 and 2 accordingly. However,
211 * for simplicity we skip the check here.
213 cell = fdt_getprop(blob, node, prop_name, &len);
217 if ((len % FDT_PCI_REG_SIZE) == 0) {
218 int num = len / FDT_PCI_REG_SIZE;
221 for (i = 0; i < num; i++) {
222 debug("pci address #%d: %08lx %08lx %08lx\n", i,
223 (ulong)fdt32_to_cpu(cell[0]),
224 (ulong)fdt32_to_cpu(cell[1]),
225 (ulong)fdt32_to_cpu(cell[2]));
226 if ((fdt32_to_cpu(*cell) & type) == type) {
227 addr->phys_hi = fdt32_to_cpu(cell[0]);
228 addr->phys_mid = fdt32_to_cpu(cell[1]);
229 addr->phys_lo = fdt32_to_cpu(cell[1]);
232 cell += (FDT_PCI_ADDR_CELLS +
248 debug("(not found)\n");
252 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
254 const char *list, *end;
257 list = fdt_getprop(blob, node, "compatible", &len);
266 if (len >= strlen("pciVVVV,DDDD")) {
267 s = strstr(list, "pci");
270 * check if the string is something like pciVVVV,DDDD.RR
271 * or just pciVVVV,DDDD
273 if (s && s[7] == ',' &&
274 (s[12] == '.' || s[12] == 0)) {
276 *vendor = simple_strtol(s, NULL, 16);
279 *device = simple_strtol(s, NULL, 16);
290 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
295 /* extract the bar number from fdt_pci_addr */
296 barnum = addr->phys_hi & 0xff;
297 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
300 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
301 *bar = dm_pci_read_bar32(dev, barnum);
307 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
308 uint64_t default_val)
310 const uint64_t *cell64;
313 cell64 = fdt_getprop(blob, node, prop_name, &length);
314 if (!cell64 || length < sizeof(*cell64))
317 return fdt64_to_cpu(*cell64);
320 int fdtdec_get_is_enabled(const void *blob, int node)
325 * It should say "okay", so only allow that. Some fdts use "ok" but
326 * this is a bug. Please fix your device tree source file. See here
329 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
331 cell = fdt_getprop(blob, node, "status", NULL);
333 return 0 == strcmp(cell, "okay");
337 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
339 enum fdt_compat_id id;
341 /* Search our drivers */
342 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
343 if (0 == fdt_node_check_compatible(blob, node,
346 return COMPAT_UNKNOWN;
349 int fdtdec_next_compatible(const void *blob, int node,
350 enum fdt_compat_id id)
352 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
355 int fdtdec_next_compatible_subnode(const void *blob, int node,
356 enum fdt_compat_id id, int *depthp)
359 node = fdt_next_node(blob, node, depthp);
360 } while (*depthp > 1);
362 /* If this is a direct subnode, and compatible, return it */
363 if (*depthp == 1 && 0 == fdt_node_check_compatible(
364 blob, node, compat_names[id]))
367 return -FDT_ERR_NOTFOUND;
370 int fdtdec_next_alias(const void *blob, const char *name,
371 enum fdt_compat_id id, int *upto)
373 #define MAX_STR_LEN 20
374 char str[MAX_STR_LEN + 20];
377 /* snprintf() is not available */
378 assert(strlen(name) < MAX_STR_LEN);
379 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
380 node = fdt_path_offset(blob, str);
383 err = fdt_node_check_compatible(blob, node, compat_names[id]);
387 return -FDT_ERR_NOTFOUND;
392 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
393 enum fdt_compat_id id, int *node_list, int maxcount)
395 memset(node_list, '\0', sizeof(*node_list) * maxcount);
397 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
400 /* TODO: Can we tighten this code up a little? */
401 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
402 enum fdt_compat_id id, int *node_list, int maxcount)
404 int name_len = strlen(name);
412 /* find the alias node if present */
413 alias_node = fdt_path_offset(blob, "/aliases");
416 * start with nothing, and we can assume that the root node can't
419 memset(nodes, '\0', sizeof(nodes));
421 /* First find all the compatible nodes */
422 for (node = count = 0; node >= 0 && count < maxcount;) {
423 node = fdtdec_next_compatible(blob, node, id);
425 nodes[count++] = node;
428 debug("%s: warning: maxcount exceeded with alias '%s'\n",
431 /* Now find all the aliases */
432 for (offset = fdt_first_property_offset(blob, alias_node);
434 offset = fdt_next_property_offset(blob, offset)) {
435 const struct fdt_property *prop;
441 prop = fdt_get_property_by_offset(blob, offset, NULL);
442 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
443 if (prop->len && 0 == strncmp(path, name, name_len))
444 node = fdt_path_offset(blob, prop->data);
448 /* Get the alias number */
449 number = simple_strtoul(path + name_len, NULL, 10);
450 if (number < 0 || number >= maxcount) {
451 debug("%s: warning: alias '%s' is out of range\n",
456 /* Make sure the node we found is actually in our list! */
458 for (j = 0; j < count; j++)
459 if (nodes[j] == node) {
465 debug("%s: warning: alias '%s' points to a node "
466 "'%s' that is missing or is not compatible "
467 " with '%s'\n", __func__, path,
468 fdt_get_name(blob, node, NULL),
474 * Add this node to our list in the right place, and mark
477 if (fdtdec_get_is_enabled(blob, node)) {
478 if (node_list[number]) {
479 debug("%s: warning: alias '%s' requires that "
480 "a node be placed in the list in a "
481 "position which is already filled by "
482 "node '%s'\n", __func__, path,
483 fdt_get_name(blob, node, NULL));
486 node_list[number] = node;
487 if (number >= num_found)
488 num_found = number + 1;
493 /* Add any nodes not mentioned by an alias */
494 for (i = j = 0; i < maxcount; i++) {
496 for (; j < maxcount; j++)
498 fdtdec_get_is_enabled(blob, nodes[j]))
501 /* Have we run out of nodes to add? */
505 assert(!node_list[i]);
506 node_list[i] = nodes[j++];
515 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
518 int base_len = strlen(base);
519 const char *find_name;
524 find_name = fdt_get_name(blob, offset, &find_namelen);
525 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
527 aliases = fdt_path_offset(blob, "/aliases");
528 for (prop_offset = fdt_first_property_offset(blob, aliases);
530 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
536 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
537 debug(" - %s, %s\n", name, prop);
538 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
539 strncmp(name, base, base_len))
542 slash = strrchr(prop, '/');
543 if (strcmp(slash + 1, find_name))
545 val = trailing_strtol(name);
548 debug("Found seq %d\n", *seqp);
553 debug("Not found\n");
557 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
563 chosen_node = fdt_path_offset(blob, "/chosen");
564 return fdt_getprop(blob, chosen_node, name, NULL);
567 int fdtdec_get_chosen_node(const void *blob, const char *name)
571 prop = fdtdec_get_chosen_prop(blob, name);
573 return -FDT_ERR_NOTFOUND;
574 return fdt_path_offset(blob, prop);
577 int fdtdec_check_fdt(void)
580 * We must have an FDT, but we cannot panic() yet since the console
581 * is not ready. So for now, just assert(). Boards which need an early
582 * FDT (prior to console ready) will need to make their own
583 * arrangements and do their own checks.
585 assert(!fdtdec_prepare_fdt());
590 * This function is a little odd in that it accesses global data. At some
591 * point if the architecture board.c files merge this will make more sense.
592 * Even now, it is common code.
594 int fdtdec_prepare_fdt(void)
596 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
597 fdt_check_header(gd->fdt_blob)) {
598 #ifdef CONFIG_SPL_BUILD
599 puts("Missing DTB\n");
601 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
604 printf("fdt_blob=%p\n", gd->fdt_blob);
605 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
615 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
620 debug("%s: %s\n", __func__, prop_name);
621 phandle = fdt_getprop(blob, node, prop_name, NULL);
623 return -FDT_ERR_NOTFOUND;
625 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
630 * Look up a property in a node and check that it has a minimum length.
632 * @param blob FDT blob
633 * @param node node to examine
634 * @param prop_name name of property to find
635 * @param min_len minimum property length in bytes
636 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
637 found, or -FDT_ERR_BADLAYOUT if not enough data
638 * @return pointer to cell, which is only valid if err == 0
640 static const void *get_prop_check_min_len(const void *blob, int node,
641 const char *prop_name, int min_len, int *err)
646 debug("%s: %s\n", __func__, prop_name);
647 cell = fdt_getprop(blob, node, prop_name, &len);
649 *err = -FDT_ERR_NOTFOUND;
650 else if (len < min_len)
651 *err = -FDT_ERR_BADLAYOUT;
657 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
658 u32 *array, int count)
663 debug("%s: %s\n", __func__, prop_name);
664 cell = get_prop_check_min_len(blob, node, prop_name,
665 sizeof(u32) * count, &err);
667 for (i = 0; i < count; i++)
668 array[i] = fdt32_to_cpu(cell[i]);
673 int fdtdec_get_int_array_count(const void *blob, int node,
674 const char *prop_name, u32 *array, int count)
680 debug("%s: %s\n", __func__, prop_name);
681 cell = fdt_getprop(blob, node, prop_name, &len);
683 return -FDT_ERR_NOTFOUND;
684 elems = len / sizeof(u32);
687 for (i = 0; i < count; i++)
688 array[i] = fdt32_to_cpu(cell[i]);
693 const u32 *fdtdec_locate_array(const void *blob, int node,
694 const char *prop_name, int count)
699 cell = get_prop_check_min_len(blob, node, prop_name,
700 sizeof(u32) * count, &err);
701 return err ? NULL : cell;
704 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
709 debug("%s: %s\n", __func__, prop_name);
710 cell = fdt_getprop(blob, node, prop_name, &len);
714 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
715 const char *list_name,
716 const char *cells_name,
717 int cell_count, int index,
718 struct fdtdec_phandle_args *out_args)
720 const __be32 *list, *list_end;
721 int rc = 0, size, cur_index = 0;
726 /* Retrieve the phandle list property */
727 list = fdt_getprop(blob, src_node, list_name, &size);
730 list_end = list + size / sizeof(*list);
732 /* Loop over the phandles until all the requested entry is found */
733 while (list < list_end) {
738 * If phandle is 0, then it is an empty entry with no
739 * arguments. Skip forward to the next entry.
741 phandle = be32_to_cpup(list++);
744 * Find the provider node and parse the #*-cells
745 * property to determine the argument length.
747 * This is not needed if the cell count is hard-coded
748 * (i.e. cells_name not set, but cell_count is set),
749 * except when we're going to return the found node
752 if (cells_name || cur_index == index) {
753 node = fdt_node_offset_by_phandle(blob,
756 debug("%s: could not find phandle\n",
757 fdt_get_name(blob, src_node,
764 count = fdtdec_get_int(blob, node, cells_name,
767 debug("%s: could not get %s for %s\n",
768 fdt_get_name(blob, src_node,
771 fdt_get_name(blob, node,
780 * Make sure that the arguments actually fit in the
781 * remaining property data length
783 if (list + count > list_end) {
784 debug("%s: arguments longer than property\n",
785 fdt_get_name(blob, src_node, NULL));
791 * All of the error cases above bail out of the loop, so at
792 * this point, the parsing is successful. If the requested
793 * index matches, then fill the out_args structure and return,
794 * or return -ENOENT for an empty entry.
797 if (cur_index == index) {
804 if (count > MAX_PHANDLE_ARGS) {
805 debug("%s: too many arguments %d\n",
806 fdt_get_name(blob, src_node,
808 count = MAX_PHANDLE_ARGS;
810 out_args->node = node;
811 out_args->args_count = count;
812 for (i = 0; i < count; i++) {
814 be32_to_cpup(list++);
818 /* Found it! return success */
828 * Result will be one of:
829 * -ENOENT : index is for empty phandle
830 * -EINVAL : parsing error on data
831 * [1..n] : Number of phandle (count mode; when index = -1)
833 rc = index < 0 ? cur_index : -ENOENT;
838 int fdtdec_get_child_count(const void *blob, int node)
843 fdt_for_each_subnode(subnode, blob, node)
849 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
850 u8 *array, int count)
855 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
857 memcpy(array, cell, count);
861 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
862 const char *prop_name, int count)
867 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
873 int fdtdec_get_config_int(const void *blob, const char *prop_name,
878 debug("%s: %s\n", __func__, prop_name);
879 config_node = fdt_path_offset(blob, "/config");
882 return fdtdec_get_int(blob, config_node, prop_name, default_val);
885 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
890 debug("%s: %s\n", __func__, prop_name);
891 config_node = fdt_path_offset(blob, "/config");
894 prop = fdt_get_property(blob, config_node, prop_name, NULL);
899 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
905 debug("%s: %s\n", __func__, prop_name);
906 nodeoffset = fdt_path_offset(blob, "/config");
910 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
914 return (char *)nodep;
917 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
918 fdt_addr_t *basep, fdt_size_t *sizep)
920 const fdt_addr_t *cell;
923 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
925 cell = fdt_getprop(blob, node, prop_name, &len);
926 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
927 debug("cell=%p, len=%d\n", cell, len);
931 *basep = fdt_addr_to_cpu(*cell);
932 *sizep = fdt_size_to_cpu(cell[1]);
933 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
939 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
944 number = (number << 32) | fdt32_to_cpu(*ptr++);
949 int fdt_get_resource(const void *fdt, int node, const char *property,
950 unsigned int index, struct fdt_resource *res)
952 const fdt32_t *ptr, *end;
953 int na, ns, len, parent;
956 parent = fdt_parent_offset(fdt, node);
960 na = fdt_address_cells(fdt, parent);
961 ns = fdt_size_cells(fdt, parent);
963 ptr = fdt_getprop(fdt, node, property, &len);
967 end = ptr + len / sizeof(*ptr);
969 while (ptr + na + ns <= end) {
971 res->start = res->end = fdtdec_get_number(ptr, na);
972 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
980 return -FDT_ERR_NOTFOUND;
983 int fdt_get_named_resource(const void *fdt, int node, const char *property,
984 const char *prop_names, const char *name,
985 struct fdt_resource *res)
989 index = fdt_stringlist_search(fdt, node, prop_names, name);
993 return fdt_get_resource(fdt, node, property, index, res);
996 int fdtdec_decode_memory_region(const void *blob, int config_node,
997 const char *mem_type, const char *suffix,
998 fdt_addr_t *basep, fdt_size_t *sizep)
1002 fdt_size_t size, offset_size;
1003 fdt_addr_t base, offset;
1006 if (config_node == -1) {
1007 config_node = fdt_path_offset(blob, "/config");
1008 if (config_node < 0) {
1009 debug("%s: Cannot find /config node\n", __func__);
1016 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1018 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1020 debug("%s: No memory type for '%s', using /memory\n", __func__,
1025 node = fdt_path_offset(blob, mem);
1027 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1028 fdt_strerror(node));
1033 * Not strictly correct - the memory may have multiple banks. We just
1036 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1037 debug("%s: Failed to decode memory region %s\n", __func__,
1042 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1044 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1046 debug("%s: Failed to decode memory region '%s'\n", __func__,
1051 *basep = base + offset;
1052 *sizep = offset_size;
1057 static int decode_timing_property(const void *blob, int node, const char *name,
1058 struct timing_entry *result)
1060 int length, ret = 0;
1063 prop = fdt_getprop(blob, node, name, &length);
1065 debug("%s: could not find property %s\n",
1066 fdt_get_name(blob, node, NULL), name);
1070 if (length == sizeof(u32)) {
1071 result->typ = fdtdec_get_int(blob, node, name, 0);
1072 result->min = result->typ;
1073 result->max = result->typ;
1075 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1081 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1082 struct display_timing *dt)
1084 int i, node, timings_node;
1088 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1089 if (timings_node < 0)
1090 return timings_node;
1092 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1093 node > 0 && i != index;
1094 node = fdt_next_subnode(blob, node))
1100 memset(dt, 0, sizeof(*dt));
1102 ret |= decode_timing_property(blob, node, "hback-porch",
1104 ret |= decode_timing_property(blob, node, "hfront-porch",
1106 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1107 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1108 ret |= decode_timing_property(blob, node, "vback-porch",
1110 ret |= decode_timing_property(blob, node, "vfront-porch",
1112 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1113 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1114 ret |= decode_timing_property(blob, node, "clock-frequency",
1118 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1120 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1121 DISPLAY_FLAGS_VSYNC_LOW;
1123 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1125 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1126 DISPLAY_FLAGS_HSYNC_LOW;
1128 val = fdtdec_get_int(blob, node, "de-active", -1);
1130 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1131 DISPLAY_FLAGS_DE_LOW;
1133 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1135 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1136 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1139 if (fdtdec_get_bool(blob, node, "interlaced"))
1140 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1141 if (fdtdec_get_bool(blob, node, "doublescan"))
1142 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1143 if (fdtdec_get_bool(blob, node, "doubleclk"))
1144 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1149 int fdtdec_setup_memory_size(void)
1152 struct fdt_resource res;
1154 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1156 debug("%s: Missing /memory node\n", __func__);
1160 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1162 debug("%s: Unable to decode first memory bank\n", __func__);
1166 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1167 debug("%s: Initial DRAM size %llx\n", __func__,
1168 (unsigned long long)gd->ram_size);
1173 #if defined(CONFIG_NR_DRAM_BANKS)
1174 int fdtdec_setup_memory_banksize(void)
1177 struct fdt_resource res;
1179 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1181 debug("%s: Missing /memory node\n", __func__);
1185 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1186 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res);
1187 if (ret == -FDT_ERR_NOTFOUND)
1192 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1193 gd->bd->bi_dram[bank].size =
1194 (phys_size_t)(res.end - res.start + 1);
1196 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1198 (unsigned long long)gd->bd->bi_dram[bank].start,
1199 (unsigned long long)gd->bd->bi_dram[bank].size);
1206 int fdtdec_setup(void)
1208 #if CONFIG_IS_ENABLED(OF_CONTROL)
1209 # ifdef CONFIG_OF_EMBED
1210 /* Get a pointer to the FDT */
1211 gd->fdt_blob = __dtb_dt_begin;
1212 # elif defined CONFIG_OF_SEPARATE
1213 # ifdef CONFIG_SPL_BUILD
1214 /* FDT is at end of BSS unless it is in a different memory region */
1215 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1216 gd->fdt_blob = (ulong *)&_image_binary_end;
1218 gd->fdt_blob = (ulong *)&__bss_end;
1220 # elif defined CONFIG_FIT_EMBED
1221 gd->fdt_blob = locate_dtb_in_fit(&_end);
1223 if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) {
1224 puts("Failed to find proper dtb in embedded FIT Image\n");
1229 /* FDT is at end of image */
1230 gd->fdt_blob = (ulong *)&_end;
1232 # elif defined(CONFIG_OF_BOARD)
1233 /* Allow the board to override the fdt address. */
1234 gd->fdt_blob = board_fdt_blob_setup();
1235 # elif defined(CONFIG_OF_HOSTFILE)
1236 if (sandbox_read_fdt_from_file()) {
1237 puts("Failed to read control FDT\n");
1241 # ifndef CONFIG_SPL_BUILD
1242 /* Allow the early environment to override the fdt address */
1243 gd->fdt_blob = (void *)env_get_ulong("fdtcontroladdr", 16,
1244 (uintptr_t)gd->fdt_blob);
1247 return fdtdec_prepare_fdt();
1250 #endif /* !USE_HOSTCC */