1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
12 #include <dm/of_extra.h>
16 #include <fdt_support.h>
19 #include <linux/libfdt.h>
21 #include <asm/sections.h>
22 #include <linux/ctype.h>
23 #include <linux/lzo.h>
25 DECLARE_GLOBAL_DATA_PTR;
28 * Here are the type we know about. One day we might allow drivers to
29 * register. For now we just put them here. The COMPAT macro allows us to
30 * turn this into a sparse list later, and keeps the ID with the name.
32 * NOTE: This list is basically a TODO list for things that need to be
33 * converted to driver model. So don't add new things here unless there is a
34 * good reason why driver-model conversion is infeasible. Examples include
35 * things which are used before driver model is available.
37 #define COMPAT(id, name) name
38 static const char * const compat_names[COMPAT_COUNT] = {
39 COMPAT(UNKNOWN, "<none>"),
40 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
41 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
42 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
43 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
44 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
45 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
46 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
47 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
48 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
49 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
50 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
51 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
52 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
53 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
54 COMPAT(INTEL_MICROCODE, "intel,microcode"),
55 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
56 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
57 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
58 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
59 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
60 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
61 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
62 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
63 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
64 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
65 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
66 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
67 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
68 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
69 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
71 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
72 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
73 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
76 const char *fdtdec_get_compatible(enum fdt_compat_id id)
78 /* We allow reading of the 'unknown' ID for testing purposes */
79 assert(id >= 0 && id < COMPAT_COUNT);
80 return compat_names[id];
83 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
84 const char *prop_name, int index, int na,
85 int ns, fdt_size_t *sizep,
88 const fdt32_t *prop, *prop_end;
89 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
93 debug("%s: %s: ", __func__, prop_name);
95 prop = fdt_getprop(blob, node, prop_name, &len);
97 debug("(not found)\n");
98 return FDT_ADDR_T_NONE;
100 prop_end = prop + (len / sizeof(*prop));
102 prop_addr = prop + (index * (na + ns));
103 prop_size = prop_addr + na;
104 prop_after_size = prop_size + ns;
105 if (prop_after_size > prop_end) {
106 debug("(not enough data: expected >= %d cells, got %d cells)\n",
107 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
108 return FDT_ADDR_T_NONE;
111 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
113 addr = fdt_translate_address(blob, node, prop_addr);
116 addr = fdtdec_get_number(prop_addr, na);
119 *sizep = fdtdec_get_number(prop_size, ns);
120 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
121 (unsigned long long)*sizep);
123 debug("addr=%08llx\n", (unsigned long long)addr);
129 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
130 int node, const char *prop_name,
131 int index, fdt_size_t *sizep,
136 debug("%s: ", __func__);
138 na = fdt_address_cells(blob, parent);
140 debug("(bad #address-cells)\n");
141 return FDT_ADDR_T_NONE;
144 ns = fdt_size_cells(blob, parent);
146 debug("(bad #size-cells)\n");
147 return FDT_ADDR_T_NONE;
150 debug("na=%d, ns=%d, ", na, ns);
152 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
153 ns, sizep, translate);
156 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
157 const char *prop_name, int index,
163 debug("%s: ", __func__);
165 parent = fdt_parent_offset(blob, node);
167 debug("(no parent found)\n");
168 return FDT_ADDR_T_NONE;
171 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
172 index, sizep, translate);
175 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
176 const char *prop_name, fdt_size_t *sizep)
178 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
180 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
181 sizeof(fdt_addr_t) / sizeof(fdt32_t),
185 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
187 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
190 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
191 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
193 const char *list, *end;
196 list = fdt_getprop(blob, node, "compatible", &len);
203 if (len >= strlen("pciVVVV,DDDD")) {
204 char *s = strstr(list, "pci");
207 * check if the string is something like pciVVVV,DDDD.RR
208 * or just pciVVVV,DDDD
210 if (s && s[7] == ',' &&
211 (s[12] == '.' || s[12] == 0)) {
213 *vendor = simple_strtol(s, NULL, 16);
216 *device = simple_strtol(s, NULL, 16);
227 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
232 /* extract the bar number from fdt_pci_addr */
233 barnum = addr->phys_hi & 0xff;
234 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
237 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
238 *bar = dm_pci_read_bar32(dev, barnum);
244 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
245 uint64_t default_val)
247 const unaligned_fdt64_t *cell64;
250 cell64 = fdt_getprop(blob, node, prop_name, &length);
251 if (!cell64 || length < sizeof(*cell64))
254 return fdt64_to_cpu(*cell64);
257 int fdtdec_get_is_enabled(const void *blob, int node)
262 * It should say "okay", so only allow that. Some fdts use "ok" but
263 * this is a bug. Please fix your device tree source file. See here
266 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
268 cell = fdt_getprop(blob, node, "status", NULL);
270 return strcmp(cell, "okay") == 0;
274 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
276 enum fdt_compat_id id;
278 /* Search our drivers */
279 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
280 if (fdt_node_check_compatible(blob, node,
281 compat_names[id]) == 0)
283 return COMPAT_UNKNOWN;
286 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
288 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
291 int fdtdec_next_compatible_subnode(const void *blob, int node,
292 enum fdt_compat_id id, int *depthp)
295 node = fdt_next_node(blob, node, depthp);
296 } while (*depthp > 1);
298 /* If this is a direct subnode, and compatible, return it */
299 if (*depthp == 1 && 0 == fdt_node_check_compatible(
300 blob, node, compat_names[id]))
303 return -FDT_ERR_NOTFOUND;
306 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
309 #define MAX_STR_LEN 20
310 char str[MAX_STR_LEN + 20];
313 /* snprintf() is not available */
314 assert(strlen(name) < MAX_STR_LEN);
315 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
316 node = fdt_path_offset(blob, str);
319 err = fdt_node_check_compatible(blob, node, compat_names[id]);
323 return -FDT_ERR_NOTFOUND;
328 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
329 enum fdt_compat_id id, int *node_list,
332 memset(node_list, '\0', sizeof(*node_list) * maxcount);
334 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
337 /* TODO: Can we tighten this code up a little? */
338 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
339 enum fdt_compat_id id, int *node_list,
342 int name_len = strlen(name);
350 /* find the alias node if present */
351 alias_node = fdt_path_offset(blob, "/aliases");
354 * start with nothing, and we can assume that the root node can't
357 memset(nodes, '\0', sizeof(nodes));
359 /* First find all the compatible nodes */
360 for (node = count = 0; node >= 0 && count < maxcount;) {
361 node = fdtdec_next_compatible(blob, node, id);
363 nodes[count++] = node;
366 debug("%s: warning: maxcount exceeded with alias '%s'\n",
369 /* Now find all the aliases */
370 for (offset = fdt_first_property_offset(blob, alias_node);
372 offset = fdt_next_property_offset(blob, offset)) {
373 const struct fdt_property *prop;
379 prop = fdt_get_property_by_offset(blob, offset, NULL);
380 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
381 if (prop->len && 0 == strncmp(path, name, name_len))
382 node = fdt_path_offset(blob, prop->data);
386 /* Get the alias number */
387 number = simple_strtoul(path + name_len, NULL, 10);
388 if (number < 0 || number >= maxcount) {
389 debug("%s: warning: alias '%s' is out of range\n",
394 /* Make sure the node we found is actually in our list! */
396 for (j = 0; j < count; j++)
397 if (nodes[j] == node) {
403 debug("%s: warning: alias '%s' points to a node "
404 "'%s' that is missing or is not compatible "
405 " with '%s'\n", __func__, path,
406 fdt_get_name(blob, node, NULL),
412 * Add this node to our list in the right place, and mark
415 if (fdtdec_get_is_enabled(blob, node)) {
416 if (node_list[number]) {
417 debug("%s: warning: alias '%s' requires that "
418 "a node be placed in the list in a "
419 "position which is already filled by "
420 "node '%s'\n", __func__, path,
421 fdt_get_name(blob, node, NULL));
424 node_list[number] = node;
425 if (number >= num_found)
426 num_found = number + 1;
431 /* Add any nodes not mentioned by an alias */
432 for (i = j = 0; i < maxcount; i++) {
434 for (; j < maxcount; j++)
436 fdtdec_get_is_enabled(blob, nodes[j]))
439 /* Have we run out of nodes to add? */
443 assert(!node_list[i]);
444 node_list[i] = nodes[j++];
453 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
456 int base_len = strlen(base);
457 const char *find_name;
462 find_name = fdt_get_name(blob, offset, &find_namelen);
463 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
465 aliases = fdt_path_offset(blob, "/aliases");
466 for (prop_offset = fdt_first_property_offset(blob, aliases);
468 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
474 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
475 debug(" - %s, %s\n", name, prop);
476 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
477 strncmp(name, base, base_len))
480 slash = strrchr(prop, '/');
481 if (strcmp(slash + 1, find_name))
483 val = trailing_strtol(name);
486 debug("Found seq %d\n", *seqp);
491 debug("Not found\n");
495 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
497 int base_len = strlen(base);
502 debug("Looking for highest alias id for '%s'\n", base);
504 aliases = fdt_path_offset(blob, "/aliases");
505 for (prop_offset = fdt_first_property_offset(blob, aliases);
507 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
512 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
513 debug(" - %s, %s\n", name, prop);
514 if (*prop != '/' || prop[len - 1] ||
515 strncmp(name, base, base_len))
518 val = trailing_strtol(name);
520 debug("Found seq %d\n", val);
528 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
534 chosen_node = fdt_path_offset(blob, "/chosen");
535 return fdt_getprop(blob, chosen_node, name, NULL);
538 int fdtdec_get_chosen_node(const void *blob, const char *name)
542 prop = fdtdec_get_chosen_prop(blob, name);
544 return -FDT_ERR_NOTFOUND;
545 return fdt_path_offset(blob, prop);
548 int fdtdec_check_fdt(void)
551 * We must have an FDT, but we cannot panic() yet since the console
552 * is not ready. So for now, just assert(). Boards which need an early
553 * FDT (prior to console ready) will need to make their own
554 * arrangements and do their own checks.
556 assert(!fdtdec_prepare_fdt());
561 * This function is a little odd in that it accesses global data. At some
562 * point if the architecture board.c files merge this will make more sense.
563 * Even now, it is common code.
565 int fdtdec_prepare_fdt(void)
567 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
568 fdt_check_header(gd->fdt_blob)) {
569 #ifdef CONFIG_SPL_BUILD
570 puts("Missing DTB\n");
572 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
575 printf("fdt_blob=%p\n", gd->fdt_blob);
576 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
586 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
591 debug("%s: %s\n", __func__, prop_name);
592 phandle = fdt_getprop(blob, node, prop_name, NULL);
594 return -FDT_ERR_NOTFOUND;
596 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
601 * Look up a property in a node and check that it has a minimum length.
603 * @param blob FDT blob
604 * @param node node to examine
605 * @param prop_name name of property to find
606 * @param min_len minimum property length in bytes
607 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
608 found, or -FDT_ERR_BADLAYOUT if not enough data
609 * @return pointer to cell, which is only valid if err == 0
611 static const void *get_prop_check_min_len(const void *blob, int node,
612 const char *prop_name, int min_len,
618 debug("%s: %s\n", __func__, prop_name);
619 cell = fdt_getprop(blob, node, prop_name, &len);
621 *err = -FDT_ERR_NOTFOUND;
622 else if (len < min_len)
623 *err = -FDT_ERR_BADLAYOUT;
629 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
630 u32 *array, int count)
635 debug("%s: %s\n", __func__, prop_name);
636 cell = get_prop_check_min_len(blob, node, prop_name,
637 sizeof(u32) * count, &err);
641 for (i = 0; i < count; i++)
642 array[i] = fdt32_to_cpu(cell[i]);
647 int fdtdec_get_int_array_count(const void *blob, int node,
648 const char *prop_name, u32 *array, int count)
654 debug("%s: %s\n", __func__, prop_name);
655 cell = fdt_getprop(blob, node, prop_name, &len);
657 return -FDT_ERR_NOTFOUND;
658 elems = len / sizeof(u32);
661 for (i = 0; i < count; i++)
662 array[i] = fdt32_to_cpu(cell[i]);
667 const u32 *fdtdec_locate_array(const void *blob, int node,
668 const char *prop_name, int count)
673 cell = get_prop_check_min_len(blob, node, prop_name,
674 sizeof(u32) * count, &err);
675 return err ? NULL : cell;
678 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
683 debug("%s: %s\n", __func__, prop_name);
684 cell = fdt_getprop(blob, node, prop_name, &len);
688 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
689 const char *list_name,
690 const char *cells_name,
691 int cell_count, int index,
692 struct fdtdec_phandle_args *out_args)
694 const __be32 *list, *list_end;
695 int rc = 0, size, cur_index = 0;
700 /* Retrieve the phandle list property */
701 list = fdt_getprop(blob, src_node, list_name, &size);
704 list_end = list + size / sizeof(*list);
706 /* Loop over the phandles until all the requested entry is found */
707 while (list < list_end) {
712 * If phandle is 0, then it is an empty entry with no
713 * arguments. Skip forward to the next entry.
715 phandle = be32_to_cpup(list++);
718 * Find the provider node and parse the #*-cells
719 * property to determine the argument length.
721 * This is not needed if the cell count is hard-coded
722 * (i.e. cells_name not set, but cell_count is set),
723 * except when we're going to return the found node
726 if (cells_name || cur_index == index) {
727 node = fdt_node_offset_by_phandle(blob,
730 debug("%s: could not find phandle\n",
731 fdt_get_name(blob, src_node,
738 count = fdtdec_get_int(blob, node, cells_name,
741 debug("%s: could not get %s for %s\n",
742 fdt_get_name(blob, src_node,
745 fdt_get_name(blob, node,
754 * Make sure that the arguments actually fit in the
755 * remaining property data length
757 if (list + count > list_end) {
758 debug("%s: arguments longer than property\n",
759 fdt_get_name(blob, src_node, NULL));
765 * All of the error cases above bail out of the loop, so at
766 * this point, the parsing is successful. If the requested
767 * index matches, then fill the out_args structure and return,
768 * or return -ENOENT for an empty entry.
771 if (cur_index == index) {
778 if (count > MAX_PHANDLE_ARGS) {
779 debug("%s: too many arguments %d\n",
780 fdt_get_name(blob, src_node,
782 count = MAX_PHANDLE_ARGS;
784 out_args->node = node;
785 out_args->args_count = count;
786 for (i = 0; i < count; i++) {
788 be32_to_cpup(list++);
792 /* Found it! return success */
802 * Result will be one of:
803 * -ENOENT : index is for empty phandle
804 * -EINVAL : parsing error on data
805 * [1..n] : Number of phandle (count mode; when index = -1)
807 rc = index < 0 ? cur_index : -ENOENT;
812 int fdtdec_get_child_count(const void *blob, int node)
817 fdt_for_each_subnode(subnode, blob, node)
823 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
824 u8 *array, int count)
829 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
831 memcpy(array, cell, count);
835 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
836 const char *prop_name, int count)
841 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
847 int fdtdec_get_config_int(const void *blob, const char *prop_name,
852 debug("%s: %s\n", __func__, prop_name);
853 config_node = fdt_path_offset(blob, "/config");
856 return fdtdec_get_int(blob, config_node, prop_name, default_val);
859 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
864 debug("%s: %s\n", __func__, prop_name);
865 config_node = fdt_path_offset(blob, "/config");
868 prop = fdt_get_property(blob, config_node, prop_name, NULL);
873 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
879 debug("%s: %s\n", __func__, prop_name);
880 nodeoffset = fdt_path_offset(blob, "/config");
884 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
888 return (char *)nodep;
891 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
896 number = (number << 32) | fdt32_to_cpu(*ptr++);
901 int fdt_get_resource(const void *fdt, int node, const char *property,
902 unsigned int index, struct fdt_resource *res)
904 const fdt32_t *ptr, *end;
905 int na, ns, len, parent;
908 parent = fdt_parent_offset(fdt, node);
912 na = fdt_address_cells(fdt, parent);
913 ns = fdt_size_cells(fdt, parent);
915 ptr = fdt_getprop(fdt, node, property, &len);
919 end = ptr + len / sizeof(*ptr);
921 while (ptr + na + ns <= end) {
923 res->start = fdtdec_get_number(ptr, na);
924 res->end = res->start;
925 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
933 return -FDT_ERR_NOTFOUND;
936 int fdt_get_named_resource(const void *fdt, int node, const char *property,
937 const char *prop_names, const char *name,
938 struct fdt_resource *res)
942 index = fdt_stringlist_search(fdt, node, prop_names, name);
946 return fdt_get_resource(fdt, node, property, index, res);
949 static int decode_timing_property(const void *blob, int node, const char *name,
950 struct timing_entry *result)
955 prop = fdt_getprop(blob, node, name, &length);
957 debug("%s: could not find property %s\n",
958 fdt_get_name(blob, node, NULL), name);
962 if (length == sizeof(u32)) {
963 result->typ = fdtdec_get_int(blob, node, name, 0);
964 result->min = result->typ;
965 result->max = result->typ;
967 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
973 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
974 struct display_timing *dt)
976 int i, node, timings_node;
980 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
981 if (timings_node < 0)
984 for (i = 0, node = fdt_first_subnode(blob, timings_node);
985 node > 0 && i != index;
986 node = fdt_next_subnode(blob, node))
992 memset(dt, 0, sizeof(*dt));
994 ret |= decode_timing_property(blob, node, "hback-porch",
996 ret |= decode_timing_property(blob, node, "hfront-porch",
998 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
999 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1000 ret |= decode_timing_property(blob, node, "vback-porch",
1002 ret |= decode_timing_property(blob, node, "vfront-porch",
1004 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1005 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1006 ret |= decode_timing_property(blob, node, "clock-frequency",
1010 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1012 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1013 DISPLAY_FLAGS_VSYNC_LOW;
1015 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1017 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1018 DISPLAY_FLAGS_HSYNC_LOW;
1020 val = fdtdec_get_int(blob, node, "de-active", -1);
1022 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1023 DISPLAY_FLAGS_DE_LOW;
1025 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1027 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1028 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1031 if (fdtdec_get_bool(blob, node, "interlaced"))
1032 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1033 if (fdtdec_get_bool(blob, node, "doublescan"))
1034 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1035 if (fdtdec_get_bool(blob, node, "doubleclk"))
1036 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1041 int fdtdec_setup_mem_size_base_fdt(const void *blob)
1044 struct fdt_resource res;
1046 mem = fdt_path_offset(blob, "/memory");
1048 debug("%s: Missing /memory node\n", __func__);
1052 ret = fdt_get_resource(blob, mem, "reg", 0, &res);
1054 debug("%s: Unable to decode first memory bank\n", __func__);
1058 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1059 gd->ram_base = (unsigned long)res.start;
1060 debug("%s: Initial DRAM size %llx\n", __func__,
1061 (unsigned long long)gd->ram_size);
1066 int fdtdec_setup_mem_size_base(void)
1068 return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
1071 #if defined(CONFIG_NR_DRAM_BANKS)
1073 static int get_next_memory_node(const void *blob, int mem)
1076 mem = fdt_node_offset_by_prop_value(blob, mem,
1077 "device_type", "memory", 7);
1078 } while (!fdtdec_get_is_enabled(blob, mem));
1083 int fdtdec_setup_memory_banksize_fdt(const void *blob)
1085 int bank, ret, mem, reg = 0;
1086 struct fdt_resource res;
1088 mem = get_next_memory_node(blob, -1);
1090 debug("%s: Missing /memory node\n", __func__);
1094 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1095 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1096 if (ret == -FDT_ERR_NOTFOUND) {
1098 mem = get_next_memory_node(blob, mem);
1099 if (mem == -FDT_ERR_NOTFOUND)
1102 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1103 if (ret == -FDT_ERR_NOTFOUND)
1110 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1111 gd->bd->bi_dram[bank].size =
1112 (phys_size_t)(res.end - res.start + 1);
1114 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1116 (unsigned long long)gd->bd->bi_dram[bank].start,
1117 (unsigned long long)gd->bd->bi_dram[bank].size);
1123 int fdtdec_setup_memory_banksize(void)
1125 return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
1130 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1131 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1132 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1133 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1135 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1136 bool gzip = 0, lzo = 0;
1137 ulong sz_in = sz_src;
1141 if (CONFIG_IS_ENABLED(GZIP))
1142 if (gzip_parse_header(src, sz_in) >= 0)
1144 if (CONFIG_IS_ENABLED(LZO))
1145 if (!gzip && lzop_is_valid_header(src))
1152 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1153 dst = malloc(sz_out);
1155 puts("uncompress_blob: Unable to allocate memory\n");
1159 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1160 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1166 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1167 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1168 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1169 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1174 /* not a valid compressed blob */
1175 puts("uncompress_blob: Unable to uncompress\n");
1176 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1184 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1186 *dstp = (void *)src;
1192 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1194 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1195 * provide and/or fixup the fdt.
1197 __weak void *board_fdt_blob_setup(void)
1199 void *fdt_blob = NULL;
1200 #ifdef CONFIG_SPL_BUILD
1201 /* FDT is at end of BSS unless it is in a different memory region */
1202 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1203 fdt_blob = (ulong *)&_image_binary_end;
1205 fdt_blob = (ulong *)&__bss_end;
1207 /* FDT is at end of image */
1208 fdt_blob = (ulong *)&_end;
1214 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1219 if (!is_valid_ethaddr(mac))
1222 path = fdt_get_alias(fdt, "ethernet");
1226 debug("ethernet alias found: %s\n", path);
1228 offset = fdt_path_offset(fdt, path);
1230 debug("ethernet alias points to absent node %s\n", path);
1234 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1238 debug("MAC address: %pM\n", mac);
1243 static int fdtdec_init_reserved_memory(void *blob)
1245 int na, ns, node, err;
1248 /* inherit #address-cells and #size-cells from the root node */
1249 na = fdt_address_cells(blob, 0);
1250 ns = fdt_size_cells(blob, 0);
1252 node = fdt_add_subnode(blob, 0, "reserved-memory");
1256 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1260 value = cpu_to_fdt32(ns);
1262 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1266 value = cpu_to_fdt32(na);
1268 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1275 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1276 const struct fdt_memory *carveout,
1279 fdt32_t cells[4] = {}, *ptr = cells;
1280 uint32_t upper, lower, phandle;
1281 int parent, node, na, ns, err;
1285 /* create an empty /reserved-memory node if one doesn't exist */
1286 parent = fdt_path_offset(blob, "/reserved-memory");
1288 parent = fdtdec_init_reserved_memory(blob);
1293 /* only 1 or 2 #address-cells and #size-cells are supported */
1294 na = fdt_address_cells(blob, parent);
1295 if (na < 1 || na > 2)
1296 return -FDT_ERR_BADNCELLS;
1298 ns = fdt_size_cells(blob, parent);
1299 if (ns < 1 || ns > 2)
1300 return -FDT_ERR_BADNCELLS;
1302 /* find a matching node and return the phandle to that */
1303 fdt_for_each_subnode(node, blob, parent) {
1304 const char *name = fdt_get_name(blob, node, NULL);
1305 phys_addr_t addr, size;
1307 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
1308 if (addr == FDT_ADDR_T_NONE) {
1309 debug("failed to read address/size for %s\n", name);
1313 if (addr == carveout->start && (addr + size) == carveout->end) {
1315 *phandlep = fdt_get_phandle(blob, node);
1321 * Unpack the start address and generate the name of the new node
1322 * base on the basename and the unit-address.
1324 upper = upper_32_bits(carveout->start);
1325 lower = lower_32_bits(carveout->start);
1327 if (na > 1 && upper > 0)
1328 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1332 debug("address %08x:%08x exceeds addressable space\n",
1334 return -FDT_ERR_BADVALUE;
1337 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1340 node = fdt_add_subnode(blob, parent, name);
1345 err = fdt_generate_phandle(blob, &phandle);
1349 err = fdtdec_set_phandle(blob, node, phandle);
1354 /* store one or two address cells */
1356 *ptr++ = cpu_to_fdt32(upper);
1358 *ptr++ = cpu_to_fdt32(lower);
1360 /* store one or two size cells */
1361 size = carveout->end - carveout->start + 1;
1362 upper = upper_32_bits(size);
1363 lower = lower_32_bits(size);
1366 *ptr++ = cpu_to_fdt32(upper);
1368 *ptr++ = cpu_to_fdt32(lower);
1370 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1374 /* return the phandle for the new node for the caller to use */
1376 *phandlep = phandle;
1381 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1382 unsigned int index, struct fdt_memory *carveout)
1384 const fdt32_t *prop;
1389 offset = fdt_path_offset(blob, node);
1393 prop = fdt_getprop(blob, offset, name, &len);
1395 debug("failed to get %s for %s\n", name, node);
1396 return -FDT_ERR_NOTFOUND;
1399 if ((len % sizeof(phandle)) != 0) {
1400 debug("invalid phandle property\n");
1401 return -FDT_ERR_BADPHANDLE;
1404 if (len < (sizeof(phandle) * (index + 1))) {
1405 debug("invalid phandle index\n");
1406 return -FDT_ERR_BADPHANDLE;
1409 phandle = fdt32_to_cpu(prop[index]);
1411 offset = fdt_node_offset_by_phandle(blob, phandle);
1413 debug("failed to find node for phandle %u\n", phandle);
1417 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1420 if (carveout->start == FDT_ADDR_T_NONE) {
1421 debug("failed to read address/size from \"reg\" property\n");
1422 return -FDT_ERR_NOTFOUND;
1425 carveout->end = carveout->start + size - 1;
1430 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1431 unsigned int index, const char *name,
1432 const struct fdt_memory *carveout)
1438 /* XXX implement support for multiple phandles */
1440 debug("invalid index %u\n", index);
1441 return -FDT_ERR_BADOFFSET;
1444 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1446 debug("failed to add reserved memory: %d\n", err);
1450 offset = fdt_path_offset(blob, node);
1452 debug("failed to find offset for node %s: %d\n", node, offset);
1456 value = cpu_to_fdt32(phandle);
1458 err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
1460 debug("failed to set %s property for node %s: %d\n", prop_name,
1468 int fdtdec_setup(void)
1470 #if CONFIG_IS_ENABLED(OF_CONTROL)
1471 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1474 # ifdef CONFIG_OF_EMBED
1475 /* Get a pointer to the FDT */
1476 # ifdef CONFIG_SPL_BUILD
1477 gd->fdt_blob = __dtb_dt_spl_begin;
1479 gd->fdt_blob = __dtb_dt_begin;
1481 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1482 /* Allow the board to override the fdt address. */
1483 gd->fdt_blob = board_fdt_blob_setup();
1484 # elif defined(CONFIG_OF_HOSTFILE)
1485 if (sandbox_read_fdt_from_file()) {
1486 puts("Failed to read control FDT\n");
1489 # elif defined(CONFIG_OF_PRIOR_STAGE)
1490 gd->fdt_blob = (void *)prior_stage_fdt_address;
1492 # ifndef CONFIG_SPL_BUILD
1493 /* Allow the early environment to override the fdt address */
1494 gd->fdt_blob = map_sysmem
1495 (env_get_ulong("fdtcontroladdr", 16,
1496 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1499 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1501 * Try and uncompress the blob.
1502 * Unfortunately there is no way to know how big the input blob really
1503 * is. So let us set the maximum input size arbitrarily high. 16MB
1504 * ought to be more than enough for packed DTBs.
1506 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1507 gd->fdt_blob = fdt_blob;
1510 * Check if blob is a FIT images containings DTBs.
1511 * If so, pick the most relevant
1513 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1515 gd->multi_dtb_fit = gd->fdt_blob;
1516 gd->fdt_blob = fdt_blob;
1522 return fdtdec_prepare_fdt();
1525 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1526 int fdtdec_resetup(int *rescan)
1531 * If the current DTB is part of a compressed FIT image,
1532 * try to locate the best match from the uncompressed
1533 * FIT image stillpresent there. Save the time and space
1534 * required to uncompress it again.
1536 if (gd->multi_dtb_fit) {
1537 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1539 if (fdt_blob == gd->fdt_blob) {
1541 * The best match did not change. no need to tear down
1542 * the DM and rescan the fdt.
1549 gd->fdt_blob = fdt_blob;
1550 return fdtdec_prepare_fdt();
1554 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1555 * not a FIT image containings DTB, but a single DTB. There is no need
1556 * to teard down DM and rescan the DT in this case.
1563 #ifdef CONFIG_NR_DRAM_BANKS
1564 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1565 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1567 int addr_cells, size_cells;
1568 const u32 *cell, *end;
1569 u64 total_size, size, addr;
1575 debug("%s: board_id=%d\n", __func__, board_id);
1578 node = fdt_path_offset(blob, area);
1580 debug("No %s node found\n", area);
1584 cell = fdt_getprop(blob, node, "reg", &len);
1586 debug("No reg property found\n");
1590 addr_cells = fdt_address_cells(blob, node);
1591 size_cells = fdt_size_cells(blob, node);
1593 /* Check the board id and mask */
1594 for (child = fdt_first_subnode(blob, node);
1596 child = fdt_next_subnode(blob, child)) {
1597 int match_mask, match_value;
1599 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1600 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1602 if (match_value >= 0 &&
1603 ((board_id & match_mask) == match_value)) {
1604 /* Found matching mask */
1605 debug("Found matching mask %d\n", match_mask);
1607 cell = fdt_getprop(blob, node, "reg", &len);
1609 debug("No memory-banks property found\n");
1615 /* Note: if no matching subnode was found we use the parent node */
1618 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1619 CONFIG_NR_DRAM_BANKS);
1622 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1625 end = cell + len / 4 - addr_cells - size_cells;
1626 debug("cell at %p, end %p\n", cell, end);
1627 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1631 if (addr_cells == 2)
1632 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1633 addr += fdt32_to_cpu(*cell++);
1635 bd->bi_dram[bank].start = addr;
1637 *basep = (phys_addr_t)addr;
1640 if (size_cells == 2)
1641 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1642 size += fdt32_to_cpu(*cell++);
1647 debug("Auto-sizing %llx, size %llx: ", addr, size);
1648 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1649 if (new_size == size) {
1652 debug("sized to %llx\n", new_size);
1658 bd->bi_dram[bank].size = size;
1662 debug("Memory size %llu\n", total_size);
1664 *sizep = (phys_size_t)total_size;
1668 #endif /* CONFIG_NR_DRAM_BANKS */
1670 #endif /* !USE_HOSTCC */