2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
12 #include <fdt_support.h>
14 #include <asm/sections.h>
15 #include <linux/ctype.h>
17 DECLARE_GLOBAL_DATA_PTR;
20 * Here are the type we know about. One day we might allow drivers to
21 * register. For now we just put them here. The COMPAT macro allows us to
22 * turn this into a sparse list later, and keeps the ID with the name.
24 * NOTE: This list is basically a TODO list for things that need to be
25 * converted to driver model. So don't add new things here unless there is a
26 * good reason why driver-model conversion is infeasible. Examples include
27 * things which are used before driver model is available.
29 #define COMPAT(id, name) name
30 static const char * const compat_names[COMPAT_COUNT] = {
31 COMPAT(UNKNOWN, "<none>"),
32 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
33 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
34 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
35 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
36 COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"),
37 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
38 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
39 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
40 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
41 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
42 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
43 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
44 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
45 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
46 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
47 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
48 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
49 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
50 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
51 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
52 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
53 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
54 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
55 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
56 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
57 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
58 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
59 COMPAT(INTEL_MICROCODE, "intel,microcode"),
60 COMPAT(AMS_AS3722, "ams,as3722"),
61 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
62 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
63 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
64 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
65 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
66 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
67 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
68 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
71 const char *fdtdec_get_compatible(enum fdt_compat_id id)
73 /* We allow reading of the 'unknown' ID for testing purposes */
74 assert(id >= 0 && id < COMPAT_COUNT);
75 return compat_names[id];
78 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
79 const char *prop_name, int index, int na, int ns,
80 fdt_size_t *sizep, bool translate)
82 const fdt32_t *prop, *prop_end;
83 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
87 debug("%s: %s: ", __func__, prop_name);
89 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
90 debug("(na too large for fdt_addr_t type)\n");
91 return FDT_ADDR_T_NONE;
94 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
95 debug("(ns too large for fdt_size_t type)\n");
96 return FDT_ADDR_T_NONE;
99 prop = fdt_getprop(blob, node, prop_name, &len);
101 debug("(not found)\n");
102 return FDT_ADDR_T_NONE;
104 prop_end = prop + (len / sizeof(*prop));
106 prop_addr = prop + (index * (na + ns));
107 prop_size = prop_addr + na;
108 prop_after_size = prop_size + ns;
109 if (prop_after_size > prop_end) {
110 debug("(not enough data: expected >= %d cells, got %d cells)\n",
111 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
112 return FDT_ADDR_T_NONE;
115 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
117 addr = fdt_translate_address(blob, node, prop_addr);
120 addr = fdtdec_get_number(prop_addr, na);
123 *sizep = fdtdec_get_number(prop_size, ns);
124 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
125 (unsigned long long)*sizep);
127 debug("addr=%08llx\n", (unsigned long long)addr);
133 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
134 int node, const char *prop_name, int index, fdt_size_t *sizep,
139 debug("%s: ", __func__);
141 na = fdt_address_cells(blob, parent);
143 debug("(bad #address-cells)\n");
144 return FDT_ADDR_T_NONE;
147 ns = fdt_size_cells(blob, parent);
149 debug("(bad #size-cells)\n");
150 return FDT_ADDR_T_NONE;
153 debug("na=%d, ns=%d, ", na, ns);
155 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
156 ns, sizep, translate);
159 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
160 const char *prop_name, int index, fdt_size_t *sizep,
165 debug("%s: ", __func__);
167 parent = fdt_parent_offset(blob, node);
169 debug("(no parent found)\n");
170 return FDT_ADDR_T_NONE;
173 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
174 index, sizep, translate);
177 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
178 const char *prop_name, fdt_size_t *sizep)
180 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
182 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
183 sizeof(fdt_addr_t) / sizeof(fdt32_t),
187 fdt_addr_t fdtdec_get_addr(const void *blob, int node,
188 const char *prop_name)
190 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
193 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
194 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
195 const char *prop_name, struct fdt_pci_addr *addr)
201 debug("%s: %s: ", __func__, prop_name);
204 * If we follow the pci bus bindings strictly, we should check
205 * the value of the node's parent node's #address-cells and
206 * #size-cells. They need to be 3 and 2 accordingly. However,
207 * for simplicity we skip the check here.
209 cell = fdt_getprop(blob, node, prop_name, &len);
213 if ((len % FDT_PCI_REG_SIZE) == 0) {
214 int num = len / FDT_PCI_REG_SIZE;
217 for (i = 0; i < num; i++) {
218 debug("pci address #%d: %08lx %08lx %08lx\n", i,
219 (ulong)fdt32_to_cpu(cell[0]),
220 (ulong)fdt32_to_cpu(cell[1]),
221 (ulong)fdt32_to_cpu(cell[2]));
222 if ((fdt32_to_cpu(*cell) & type) == type) {
223 addr->phys_hi = fdt32_to_cpu(cell[0]);
224 addr->phys_mid = fdt32_to_cpu(cell[1]);
225 addr->phys_lo = fdt32_to_cpu(cell[1]);
228 cell += (FDT_PCI_ADDR_CELLS +
244 debug("(not found)\n");
248 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
250 const char *list, *end;
253 list = fdt_getprop(blob, node, "compatible", &len);
262 if (len >= strlen("pciVVVV,DDDD")) {
263 s = strstr(list, "pci");
266 * check if the string is something like pciVVVV,DDDD.RR
267 * or just pciVVVV,DDDD
269 if (s && s[7] == ',' &&
270 (s[12] == '.' || s[12] == 0)) {
272 *vendor = simple_strtol(s, NULL, 16);
275 *device = simple_strtol(s, NULL, 16);
286 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
291 /* extract the bar number from fdt_pci_addr */
292 barnum = addr->phys_hi & 0xff;
293 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
296 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
297 *bar = dm_pci_read_bar32(dev, barnum);
303 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
304 uint64_t default_val)
306 const uint64_t *cell64;
309 cell64 = fdt_getprop(blob, node, prop_name, &length);
310 if (!cell64 || length < sizeof(*cell64))
313 return fdt64_to_cpu(*cell64);
316 int fdtdec_get_is_enabled(const void *blob, int node)
321 * It should say "okay", so only allow that. Some fdts use "ok" but
322 * this is a bug. Please fix your device tree source file. See here
325 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
327 cell = fdt_getprop(blob, node, "status", NULL);
329 return 0 == strcmp(cell, "okay");
333 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
335 enum fdt_compat_id id;
337 /* Search our drivers */
338 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
339 if (0 == fdt_node_check_compatible(blob, node,
342 return COMPAT_UNKNOWN;
345 int fdtdec_next_compatible(const void *blob, int node,
346 enum fdt_compat_id id)
348 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
351 int fdtdec_next_compatible_subnode(const void *blob, int node,
352 enum fdt_compat_id id, int *depthp)
355 node = fdt_next_node(blob, node, depthp);
356 } while (*depthp > 1);
358 /* If this is a direct subnode, and compatible, return it */
359 if (*depthp == 1 && 0 == fdt_node_check_compatible(
360 blob, node, compat_names[id]))
363 return -FDT_ERR_NOTFOUND;
366 int fdtdec_next_alias(const void *blob, const char *name,
367 enum fdt_compat_id id, int *upto)
369 #define MAX_STR_LEN 20
370 char str[MAX_STR_LEN + 20];
373 /* snprintf() is not available */
374 assert(strlen(name) < MAX_STR_LEN);
375 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
376 node = fdt_path_offset(blob, str);
379 err = fdt_node_check_compatible(blob, node, compat_names[id]);
383 return -FDT_ERR_NOTFOUND;
388 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
389 enum fdt_compat_id id, int *node_list, int maxcount)
391 memset(node_list, '\0', sizeof(*node_list) * maxcount);
393 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
396 /* TODO: Can we tighten this code up a little? */
397 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
398 enum fdt_compat_id id, int *node_list, int maxcount)
400 int name_len = strlen(name);
408 /* find the alias node if present */
409 alias_node = fdt_path_offset(blob, "/aliases");
412 * start with nothing, and we can assume that the root node can't
415 memset(nodes, '\0', sizeof(nodes));
417 /* First find all the compatible nodes */
418 for (node = count = 0; node >= 0 && count < maxcount;) {
419 node = fdtdec_next_compatible(blob, node, id);
421 nodes[count++] = node;
424 debug("%s: warning: maxcount exceeded with alias '%s'\n",
427 /* Now find all the aliases */
428 for (offset = fdt_first_property_offset(blob, alias_node);
430 offset = fdt_next_property_offset(blob, offset)) {
431 const struct fdt_property *prop;
437 prop = fdt_get_property_by_offset(blob, offset, NULL);
438 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
439 if (prop->len && 0 == strncmp(path, name, name_len))
440 node = fdt_path_offset(blob, prop->data);
444 /* Get the alias number */
445 number = simple_strtoul(path + name_len, NULL, 10);
446 if (number < 0 || number >= maxcount) {
447 debug("%s: warning: alias '%s' is out of range\n",
452 /* Make sure the node we found is actually in our list! */
454 for (j = 0; j < count; j++)
455 if (nodes[j] == node) {
461 debug("%s: warning: alias '%s' points to a node "
462 "'%s' that is missing or is not compatible "
463 " with '%s'\n", __func__, path,
464 fdt_get_name(blob, node, NULL),
470 * Add this node to our list in the right place, and mark
473 if (fdtdec_get_is_enabled(blob, node)) {
474 if (node_list[number]) {
475 debug("%s: warning: alias '%s' requires that "
476 "a node be placed in the list in a "
477 "position which is already filled by "
478 "node '%s'\n", __func__, path,
479 fdt_get_name(blob, node, NULL));
482 node_list[number] = node;
483 if (number >= num_found)
484 num_found = number + 1;
489 /* Add any nodes not mentioned by an alias */
490 for (i = j = 0; i < maxcount; i++) {
492 for (; j < maxcount; j++)
494 fdtdec_get_is_enabled(blob, nodes[j]))
497 /* Have we run out of nodes to add? */
501 assert(!node_list[i]);
502 node_list[i] = nodes[j++];
511 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
514 int base_len = strlen(base);
515 const char *find_name;
520 find_name = fdt_get_name(blob, offset, &find_namelen);
521 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
523 aliases = fdt_path_offset(blob, "/aliases");
524 for (prop_offset = fdt_first_property_offset(blob, aliases);
526 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
532 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
533 debug(" - %s, %s\n", name, prop);
534 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
535 strncmp(name, base, base_len))
538 slash = strrchr(prop, '/');
539 if (strcmp(slash + 1, find_name))
541 val = trailing_strtol(name);
544 debug("Found seq %d\n", *seqp);
549 debug("Not found\n");
553 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
559 chosen_node = fdt_path_offset(blob, "/chosen");
560 return fdt_getprop(blob, chosen_node, name, NULL);
563 int fdtdec_get_chosen_node(const void *blob, const char *name)
567 prop = fdtdec_get_chosen_prop(blob, name);
569 return -FDT_ERR_NOTFOUND;
570 return fdt_path_offset(blob, prop);
573 int fdtdec_check_fdt(void)
576 * We must have an FDT, but we cannot panic() yet since the console
577 * is not ready. So for now, just assert(). Boards which need an early
578 * FDT (prior to console ready) will need to make their own
579 * arrangements and do their own checks.
581 assert(!fdtdec_prepare_fdt());
586 * This function is a little odd in that it accesses global data. At some
587 * point if the architecture board.c files merge this will make more sense.
588 * Even now, it is common code.
590 int fdtdec_prepare_fdt(void)
592 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
593 fdt_check_header(gd->fdt_blob)) {
594 #ifdef CONFIG_SPL_BUILD
595 puts("Missing DTB\n");
597 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
600 printf("fdt_blob=%p\n", gd->fdt_blob);
601 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
611 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
616 debug("%s: %s\n", __func__, prop_name);
617 phandle = fdt_getprop(blob, node, prop_name, NULL);
619 return -FDT_ERR_NOTFOUND;
621 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
626 * Look up a property in a node and check that it has a minimum length.
628 * @param blob FDT blob
629 * @param node node to examine
630 * @param prop_name name of property to find
631 * @param min_len minimum property length in bytes
632 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
633 found, or -FDT_ERR_BADLAYOUT if not enough data
634 * @return pointer to cell, which is only valid if err == 0
636 static const void *get_prop_check_min_len(const void *blob, int node,
637 const char *prop_name, int min_len, int *err)
642 debug("%s: %s\n", __func__, prop_name);
643 cell = fdt_getprop(blob, node, prop_name, &len);
645 *err = -FDT_ERR_NOTFOUND;
646 else if (len < min_len)
647 *err = -FDT_ERR_BADLAYOUT;
653 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
654 u32 *array, int count)
659 debug("%s: %s\n", __func__, prop_name);
660 cell = get_prop_check_min_len(blob, node, prop_name,
661 sizeof(u32) * count, &err);
663 for (i = 0; i < count; i++)
664 array[i] = fdt32_to_cpu(cell[i]);
669 int fdtdec_get_int_array_count(const void *blob, int node,
670 const char *prop_name, u32 *array, int count)
676 debug("%s: %s\n", __func__, prop_name);
677 cell = fdt_getprop(blob, node, prop_name, &len);
679 return -FDT_ERR_NOTFOUND;
680 elems = len / sizeof(u32);
683 for (i = 0; i < count; i++)
684 array[i] = fdt32_to_cpu(cell[i]);
689 const u32 *fdtdec_locate_array(const void *blob, int node,
690 const char *prop_name, int count)
695 cell = get_prop_check_min_len(blob, node, prop_name,
696 sizeof(u32) * count, &err);
697 return err ? NULL : cell;
700 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
705 debug("%s: %s\n", __func__, prop_name);
706 cell = fdt_getprop(blob, node, prop_name, &len);
710 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
711 const char *list_name,
712 const char *cells_name,
713 int cell_count, int index,
714 struct fdtdec_phandle_args *out_args)
716 const __be32 *list, *list_end;
717 int rc = 0, size, cur_index = 0;
722 /* Retrieve the phandle list property */
723 list = fdt_getprop(blob, src_node, list_name, &size);
726 list_end = list + size / sizeof(*list);
728 /* Loop over the phandles until all the requested entry is found */
729 while (list < list_end) {
734 * If phandle is 0, then it is an empty entry with no
735 * arguments. Skip forward to the next entry.
737 phandle = be32_to_cpup(list++);
740 * Find the provider node and parse the #*-cells
741 * property to determine the argument length.
743 * This is not needed if the cell count is hard-coded
744 * (i.e. cells_name not set, but cell_count is set),
745 * except when we're going to return the found node
748 if (cells_name || cur_index == index) {
749 node = fdt_node_offset_by_phandle(blob,
752 debug("%s: could not find phandle\n",
753 fdt_get_name(blob, src_node,
760 count = fdtdec_get_int(blob, node, cells_name,
763 debug("%s: could not get %s for %s\n",
764 fdt_get_name(blob, src_node,
767 fdt_get_name(blob, node,
776 * Make sure that the arguments actually fit in the
777 * remaining property data length
779 if (list + count > list_end) {
780 debug("%s: arguments longer than property\n",
781 fdt_get_name(blob, src_node, NULL));
787 * All of the error cases above bail out of the loop, so at
788 * this point, the parsing is successful. If the requested
789 * index matches, then fill the out_args structure and return,
790 * or return -ENOENT for an empty entry.
793 if (cur_index == index) {
800 if (count > MAX_PHANDLE_ARGS) {
801 debug("%s: too many arguments %d\n",
802 fdt_get_name(blob, src_node,
804 count = MAX_PHANDLE_ARGS;
806 out_args->node = node;
807 out_args->args_count = count;
808 for (i = 0; i < count; i++) {
810 be32_to_cpup(list++);
814 /* Found it! return success */
824 * Result will be one of:
825 * -ENOENT : index is for empty phandle
826 * -EINVAL : parsing error on data
827 * [1..n] : Number of phandle (count mode; when index = -1)
829 rc = index < 0 ? cur_index : -ENOENT;
834 int fdtdec_get_child_count(const void *blob, int node)
839 fdt_for_each_subnode(subnode, blob, node)
845 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
846 u8 *array, int count)
851 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
853 memcpy(array, cell, count);
857 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
858 const char *prop_name, int count)
863 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
869 int fdtdec_get_config_int(const void *blob, const char *prop_name,
874 debug("%s: %s\n", __func__, prop_name);
875 config_node = fdt_path_offset(blob, "/config");
878 return fdtdec_get_int(blob, config_node, prop_name, default_val);
881 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
886 debug("%s: %s\n", __func__, prop_name);
887 config_node = fdt_path_offset(blob, "/config");
890 prop = fdt_get_property(blob, config_node, prop_name, NULL);
895 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
901 debug("%s: %s\n", __func__, prop_name);
902 nodeoffset = fdt_path_offset(blob, "/config");
906 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
910 return (char *)nodep;
913 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
914 fdt_addr_t *basep, fdt_size_t *sizep)
916 const fdt_addr_t *cell;
919 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
921 cell = fdt_getprop(blob, node, prop_name, &len);
922 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
923 debug("cell=%p, len=%d\n", cell, len);
927 *basep = fdt_addr_to_cpu(*cell);
928 *sizep = fdt_size_to_cpu(cell[1]);
929 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
936 * Read a flash entry from the fdt
938 * @param blob FDT blob
939 * @param node Offset of node to read
940 * @param name Name of node being read
941 * @param entry Place to put offset and size of this node
942 * @return 0 if ok, -ve on error
944 int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
945 struct fmap_entry *entry)
950 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
951 debug("Node '%s' has bad/missing 'reg' property\n", name);
952 return -FDT_ERR_NOTFOUND;
954 entry->offset = reg[0];
955 entry->length = reg[1];
956 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
957 prop = fdt_getprop(blob, node, "compress", NULL);
958 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
959 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
960 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
961 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
962 entry->hash = (uint8_t *)prop;
967 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
972 number = (number << 32) | fdt32_to_cpu(*ptr++);
977 int fdt_get_resource(const void *fdt, int node, const char *property,
978 unsigned int index, struct fdt_resource *res)
980 const fdt32_t *ptr, *end;
981 int na, ns, len, parent;
984 parent = fdt_parent_offset(fdt, node);
988 na = fdt_address_cells(fdt, parent);
989 ns = fdt_size_cells(fdt, parent);
991 ptr = fdt_getprop(fdt, node, property, &len);
995 end = ptr + len / sizeof(*ptr);
997 while (ptr + na + ns <= end) {
999 res->start = res->end = fdtdec_get_number(ptr, na);
1000 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
1008 return -FDT_ERR_NOTFOUND;
1011 int fdt_get_named_resource(const void *fdt, int node, const char *property,
1012 const char *prop_names, const char *name,
1013 struct fdt_resource *res)
1017 index = fdt_stringlist_search(fdt, node, prop_names, name);
1021 return fdt_get_resource(fdt, node, property, index, res);
1024 int fdtdec_decode_memory_region(const void *blob, int config_node,
1025 const char *mem_type, const char *suffix,
1026 fdt_addr_t *basep, fdt_size_t *sizep)
1030 fdt_size_t size, offset_size;
1031 fdt_addr_t base, offset;
1034 if (config_node == -1) {
1035 config_node = fdt_path_offset(blob, "/config");
1036 if (config_node < 0) {
1037 debug("%s: Cannot find /config node\n", __func__);
1044 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1046 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1048 debug("%s: No memory type for '%s', using /memory\n", __func__,
1053 node = fdt_path_offset(blob, mem);
1055 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1056 fdt_strerror(node));
1061 * Not strictly correct - the memory may have multiple banks. We just
1064 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1065 debug("%s: Failed to decode memory region %s\n", __func__,
1070 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1072 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1074 debug("%s: Failed to decode memory region '%s'\n", __func__,
1079 *basep = base + offset;
1080 *sizep = offset_size;
1085 static int decode_timing_property(const void *blob, int node, const char *name,
1086 struct timing_entry *result)
1088 int length, ret = 0;
1091 prop = fdt_getprop(blob, node, name, &length);
1093 debug("%s: could not find property %s\n",
1094 fdt_get_name(blob, node, NULL), name);
1098 if (length == sizeof(u32)) {
1099 result->typ = fdtdec_get_int(blob, node, name, 0);
1100 result->min = result->typ;
1101 result->max = result->typ;
1103 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1109 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1110 struct display_timing *dt)
1112 int i, node, timings_node;
1116 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1117 if (timings_node < 0)
1118 return timings_node;
1120 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1121 node > 0 && i != index;
1122 node = fdt_next_subnode(blob, node))
1128 memset(dt, 0, sizeof(*dt));
1130 ret |= decode_timing_property(blob, node, "hback-porch",
1132 ret |= decode_timing_property(blob, node, "hfront-porch",
1134 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1135 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1136 ret |= decode_timing_property(blob, node, "vback-porch",
1138 ret |= decode_timing_property(blob, node, "vfront-porch",
1140 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1141 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1142 ret |= decode_timing_property(blob, node, "clock-frequency",
1146 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1148 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1149 DISPLAY_FLAGS_VSYNC_LOW;
1151 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1153 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1154 DISPLAY_FLAGS_HSYNC_LOW;
1156 val = fdtdec_get_int(blob, node, "de-active", -1);
1158 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1159 DISPLAY_FLAGS_DE_LOW;
1161 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1163 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1164 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1167 if (fdtdec_get_bool(blob, node, "interlaced"))
1168 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1169 if (fdtdec_get_bool(blob, node, "doublescan"))
1170 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1171 if (fdtdec_get_bool(blob, node, "doubleclk"))
1172 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1177 int fdtdec_setup_memory_size(void)
1180 struct fdt_resource res;
1182 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1184 debug("%s: Missing /memory node\n", __func__);
1188 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1190 debug("%s: Unable to decode first memory bank\n", __func__);
1194 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1195 debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
1200 #if defined(CONFIG_NR_DRAM_BANKS)
1201 int fdtdec_setup_memory_banksize(void)
1204 struct fdt_resource res;
1206 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1208 debug("%s: Missing /memory node\n", __func__);
1212 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1213 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res);
1214 if (ret == -FDT_ERR_NOTFOUND)
1219 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1220 gd->bd->bi_dram[bank].size =
1221 (phys_size_t)(res.end - res.start + 1);
1223 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1225 (unsigned long long)gd->bd->bi_dram[bank].start,
1226 (unsigned long long)gd->bd->bi_dram[bank].size);
1233 int fdtdec_setup(void)
1235 #if CONFIG_IS_ENABLED(OF_CONTROL)
1236 # ifdef CONFIG_OF_EMBED
1237 /* Get a pointer to the FDT */
1238 gd->fdt_blob = __dtb_dt_begin;
1239 # elif defined CONFIG_OF_SEPARATE
1240 # ifdef CONFIG_SPL_BUILD
1241 /* FDT is at end of BSS unless it is in a different memory region */
1242 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1243 gd->fdt_blob = (ulong *)&_image_binary_end;
1245 gd->fdt_blob = (ulong *)&__bss_end;
1247 /* FDT is at end of image */
1248 gd->fdt_blob = (ulong *)&_end;
1250 # elif defined(CONFIG_OF_HOSTFILE)
1251 if (sandbox_read_fdt_from_file()) {
1252 puts("Failed to read control FDT\n");
1256 # ifndef CONFIG_SPL_BUILD
1257 /* Allow the early environment to override the fdt address */
1258 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1259 (uintptr_t)gd->fdt_blob);
1262 return fdtdec_prepare_fdt();
1265 #endif /* !USE_HOSTCC */