1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
10 #include <dm/of_extra.h>
13 #include <fdt_support.h>
16 #include <linux/libfdt.h>
18 #include <asm/sections.h>
19 #include <linux/ctype.h>
20 #include <linux/lzo.h>
22 DECLARE_GLOBAL_DATA_PTR;
25 * Here are the type we know about. One day we might allow drivers to
26 * register. For now we just put them here. The COMPAT macro allows us to
27 * turn this into a sparse list later, and keeps the ID with the name.
29 * NOTE: This list is basically a TODO list for things that need to be
30 * converted to driver model. So don't add new things here unless there is a
31 * good reason why driver-model conversion is infeasible. Examples include
32 * things which are used before driver model is available.
34 #define COMPAT(id, name) name
35 static const char * const compat_names[COMPAT_COUNT] = {
36 COMPAT(UNKNOWN, "<none>"),
37 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
38 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
39 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
40 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
41 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
42 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
43 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
44 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
45 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
46 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
47 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
48 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
49 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
50 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
51 COMPAT(INTEL_MICROCODE, "intel,microcode"),
52 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
53 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
54 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
55 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
56 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
57 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
58 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
59 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
60 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
61 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
62 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
63 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
64 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
65 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
66 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
67 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
68 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
69 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
70 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
73 const char *fdtdec_get_compatible(enum fdt_compat_id id)
75 /* We allow reading of the 'unknown' ID for testing purposes */
76 assert(id >= 0 && id < COMPAT_COUNT);
77 return compat_names[id];
80 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
81 const char *prop_name, int index, int na,
82 int ns, fdt_size_t *sizep,
85 const fdt32_t *prop, *prop_end;
86 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
90 debug("%s: %s: ", __func__, prop_name);
92 prop = fdt_getprop(blob, node, prop_name, &len);
94 debug("(not found)\n");
95 return FDT_ADDR_T_NONE;
97 prop_end = prop + (len / sizeof(*prop));
99 prop_addr = prop + (index * (na + ns));
100 prop_size = prop_addr + na;
101 prop_after_size = prop_size + ns;
102 if (prop_after_size > prop_end) {
103 debug("(not enough data: expected >= %d cells, got %d cells)\n",
104 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
105 return FDT_ADDR_T_NONE;
108 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
110 addr = fdt_translate_address(blob, node, prop_addr);
113 addr = fdtdec_get_number(prop_addr, na);
116 *sizep = fdtdec_get_number(prop_size, ns);
117 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
118 (unsigned long long)*sizep);
120 debug("addr=%08llx\n", (unsigned long long)addr);
126 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
127 int node, const char *prop_name,
128 int index, fdt_size_t *sizep,
133 debug("%s: ", __func__);
135 na = fdt_address_cells(blob, parent);
137 debug("(bad #address-cells)\n");
138 return FDT_ADDR_T_NONE;
141 ns = fdt_size_cells(blob, parent);
143 debug("(bad #size-cells)\n");
144 return FDT_ADDR_T_NONE;
147 debug("na=%d, ns=%d, ", na, ns);
149 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
150 ns, sizep, translate);
153 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
154 const char *prop_name, int index,
160 debug("%s: ", __func__);
162 parent = fdt_parent_offset(blob, node);
164 debug("(no parent found)\n");
165 return FDT_ADDR_T_NONE;
168 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
169 index, sizep, translate);
172 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
173 const char *prop_name, fdt_size_t *sizep)
175 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
177 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
178 sizeof(fdt_addr_t) / sizeof(fdt32_t),
182 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
184 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
187 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
188 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
189 const char *prop_name, struct fdt_pci_addr *addr)
195 debug("%s: %s: ", __func__, prop_name);
198 * If we follow the pci bus bindings strictly, we should check
199 * the value of the node's parent node's #address-cells and
200 * #size-cells. They need to be 3 and 2 accordingly. However,
201 * for simplicity we skip the check here.
203 cell = fdt_getprop(blob, node, prop_name, &len);
207 if ((len % FDT_PCI_REG_SIZE) == 0) {
208 int num = len / FDT_PCI_REG_SIZE;
211 for (i = 0; i < num; i++) {
212 debug("pci address #%d: %08lx %08lx %08lx\n", i,
213 (ulong)fdt32_to_cpu(cell[0]),
214 (ulong)fdt32_to_cpu(cell[1]),
215 (ulong)fdt32_to_cpu(cell[2]));
216 if ((fdt32_to_cpu(*cell) & type) == type) {
217 addr->phys_hi = fdt32_to_cpu(cell[0]);
218 addr->phys_mid = fdt32_to_cpu(cell[1]);
219 addr->phys_lo = fdt32_to_cpu(cell[1]);
223 cell += (FDT_PCI_ADDR_CELLS +
238 debug("(not found)\n");
242 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
244 const char *list, *end;
247 list = fdt_getprop(blob, node, "compatible", &len);
254 if (len >= strlen("pciVVVV,DDDD")) {
255 char *s = strstr(list, "pci");
258 * check if the string is something like pciVVVV,DDDD.RR
259 * or just pciVVVV,DDDD
261 if (s && s[7] == ',' &&
262 (s[12] == '.' || s[12] == 0)) {
264 *vendor = simple_strtol(s, NULL, 16);
267 *device = simple_strtol(s, NULL, 16);
278 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
283 /* extract the bar number from fdt_pci_addr */
284 barnum = addr->phys_hi & 0xff;
285 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
288 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
289 *bar = dm_pci_read_bar32(dev, barnum);
295 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
296 uint64_t default_val)
298 const uint64_t *cell64;
301 cell64 = fdt_getprop(blob, node, prop_name, &length);
302 if (!cell64 || length < sizeof(*cell64))
305 return fdt64_to_cpu(*cell64);
308 int fdtdec_get_is_enabled(const void *blob, int node)
313 * It should say "okay", so only allow that. Some fdts use "ok" but
314 * this is a bug. Please fix your device tree source file. See here
317 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
319 cell = fdt_getprop(blob, node, "status", NULL);
321 return strcmp(cell, "okay") == 0;
325 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
327 enum fdt_compat_id id;
329 /* Search our drivers */
330 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
331 if (fdt_node_check_compatible(blob, node,
332 compat_names[id]) == 0)
334 return COMPAT_UNKNOWN;
337 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
339 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
342 int fdtdec_next_compatible_subnode(const void *blob, int node,
343 enum fdt_compat_id id, int *depthp)
346 node = fdt_next_node(blob, node, depthp);
347 } while (*depthp > 1);
349 /* If this is a direct subnode, and compatible, return it */
350 if (*depthp == 1 && 0 == fdt_node_check_compatible(
351 blob, node, compat_names[id]))
354 return -FDT_ERR_NOTFOUND;
357 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
360 #define MAX_STR_LEN 20
361 char str[MAX_STR_LEN + 20];
364 /* snprintf() is not available */
365 assert(strlen(name) < MAX_STR_LEN);
366 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
367 node = fdt_path_offset(blob, str);
370 err = fdt_node_check_compatible(blob, node, compat_names[id]);
374 return -FDT_ERR_NOTFOUND;
379 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
380 enum fdt_compat_id id, int *node_list,
383 memset(node_list, '\0', sizeof(*node_list) * maxcount);
385 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
388 /* TODO: Can we tighten this code up a little? */
389 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
390 enum fdt_compat_id id, int *node_list,
393 int name_len = strlen(name);
401 /* find the alias node if present */
402 alias_node = fdt_path_offset(blob, "/aliases");
405 * start with nothing, and we can assume that the root node can't
408 memset(nodes, '\0', sizeof(nodes));
410 /* First find all the compatible nodes */
411 for (node = count = 0; node >= 0 && count < maxcount;) {
412 node = fdtdec_next_compatible(blob, node, id);
414 nodes[count++] = node;
417 debug("%s: warning: maxcount exceeded with alias '%s'\n",
420 /* Now find all the aliases */
421 for (offset = fdt_first_property_offset(blob, alias_node);
423 offset = fdt_next_property_offset(blob, offset)) {
424 const struct fdt_property *prop;
430 prop = fdt_get_property_by_offset(blob, offset, NULL);
431 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
432 if (prop->len && 0 == strncmp(path, name, name_len))
433 node = fdt_path_offset(blob, prop->data);
437 /* Get the alias number */
438 number = simple_strtoul(path + name_len, NULL, 10);
439 if (number < 0 || number >= maxcount) {
440 debug("%s: warning: alias '%s' is out of range\n",
445 /* Make sure the node we found is actually in our list! */
447 for (j = 0; j < count; j++)
448 if (nodes[j] == node) {
454 debug("%s: warning: alias '%s' points to a node "
455 "'%s' that is missing or is not compatible "
456 " with '%s'\n", __func__, path,
457 fdt_get_name(blob, node, NULL),
463 * Add this node to our list in the right place, and mark
466 if (fdtdec_get_is_enabled(blob, node)) {
467 if (node_list[number]) {
468 debug("%s: warning: alias '%s' requires that "
469 "a node be placed in the list in a "
470 "position which is already filled by "
471 "node '%s'\n", __func__, path,
472 fdt_get_name(blob, node, NULL));
475 node_list[number] = node;
476 if (number >= num_found)
477 num_found = number + 1;
482 /* Add any nodes not mentioned by an alias */
483 for (i = j = 0; i < maxcount; i++) {
485 for (; j < maxcount; j++)
487 fdtdec_get_is_enabled(blob, nodes[j]))
490 /* Have we run out of nodes to add? */
494 assert(!node_list[i]);
495 node_list[i] = nodes[j++];
504 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
507 int base_len = strlen(base);
508 const char *find_name;
513 find_name = fdt_get_name(blob, offset, &find_namelen);
514 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
516 aliases = fdt_path_offset(blob, "/aliases");
517 for (prop_offset = fdt_first_property_offset(blob, aliases);
519 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
525 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
526 debug(" - %s, %s\n", name, prop);
527 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
528 strncmp(name, base, base_len))
531 slash = strrchr(prop, '/');
532 if (strcmp(slash + 1, find_name))
534 val = trailing_strtol(name);
537 debug("Found seq %d\n", *seqp);
542 debug("Not found\n");
546 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
548 int base_len = strlen(base);
553 debug("Looking for highest alias id for '%s'\n", base);
555 aliases = fdt_path_offset(blob, "/aliases");
556 for (prop_offset = fdt_first_property_offset(blob, aliases);
558 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
563 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
564 debug(" - %s, %s\n", name, prop);
565 if (*prop != '/' || prop[len - 1] ||
566 strncmp(name, base, base_len))
569 val = trailing_strtol(name);
571 debug("Found seq %d\n", val);
579 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
585 chosen_node = fdt_path_offset(blob, "/chosen");
586 return fdt_getprop(blob, chosen_node, name, NULL);
589 int fdtdec_get_chosen_node(const void *blob, const char *name)
593 prop = fdtdec_get_chosen_prop(blob, name);
595 return -FDT_ERR_NOTFOUND;
596 return fdt_path_offset(blob, prop);
599 int fdtdec_check_fdt(void)
602 * We must have an FDT, but we cannot panic() yet since the console
603 * is not ready. So for now, just assert(). Boards which need an early
604 * FDT (prior to console ready) will need to make their own
605 * arrangements and do their own checks.
607 assert(!fdtdec_prepare_fdt());
612 * This function is a little odd in that it accesses global data. At some
613 * point if the architecture board.c files merge this will make more sense.
614 * Even now, it is common code.
616 int fdtdec_prepare_fdt(void)
618 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
619 fdt_check_header(gd->fdt_blob)) {
620 #ifdef CONFIG_SPL_BUILD
621 puts("Missing DTB\n");
623 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
626 printf("fdt_blob=%p\n", gd->fdt_blob);
627 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
637 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
642 debug("%s: %s\n", __func__, prop_name);
643 phandle = fdt_getprop(blob, node, prop_name, NULL);
645 return -FDT_ERR_NOTFOUND;
647 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
652 * Look up a property in a node and check that it has a minimum length.
654 * @param blob FDT blob
655 * @param node node to examine
656 * @param prop_name name of property to find
657 * @param min_len minimum property length in bytes
658 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
659 found, or -FDT_ERR_BADLAYOUT if not enough data
660 * @return pointer to cell, which is only valid if err == 0
662 static const void *get_prop_check_min_len(const void *blob, int node,
663 const char *prop_name, int min_len,
669 debug("%s: %s\n", __func__, prop_name);
670 cell = fdt_getprop(blob, node, prop_name, &len);
672 *err = -FDT_ERR_NOTFOUND;
673 else if (len < min_len)
674 *err = -FDT_ERR_BADLAYOUT;
680 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
681 u32 *array, int count)
686 debug("%s: %s\n", __func__, prop_name);
687 cell = get_prop_check_min_len(blob, node, prop_name,
688 sizeof(u32) * count, &err);
692 for (i = 0; i < count; i++)
693 array[i] = fdt32_to_cpu(cell[i]);
698 int fdtdec_get_int_array_count(const void *blob, int node,
699 const char *prop_name, u32 *array, int count)
705 debug("%s: %s\n", __func__, prop_name);
706 cell = fdt_getprop(blob, node, prop_name, &len);
708 return -FDT_ERR_NOTFOUND;
709 elems = len / sizeof(u32);
712 for (i = 0; i < count; i++)
713 array[i] = fdt32_to_cpu(cell[i]);
718 const u32 *fdtdec_locate_array(const void *blob, int node,
719 const char *prop_name, int count)
724 cell = get_prop_check_min_len(blob, node, prop_name,
725 sizeof(u32) * count, &err);
726 return err ? NULL : cell;
729 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
734 debug("%s: %s\n", __func__, prop_name);
735 cell = fdt_getprop(blob, node, prop_name, &len);
739 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
740 const char *list_name,
741 const char *cells_name,
742 int cell_count, int index,
743 struct fdtdec_phandle_args *out_args)
745 const __be32 *list, *list_end;
746 int rc = 0, size, cur_index = 0;
751 /* Retrieve the phandle list property */
752 list = fdt_getprop(blob, src_node, list_name, &size);
755 list_end = list + size / sizeof(*list);
757 /* Loop over the phandles until all the requested entry is found */
758 while (list < list_end) {
763 * If phandle is 0, then it is an empty entry with no
764 * arguments. Skip forward to the next entry.
766 phandle = be32_to_cpup(list++);
769 * Find the provider node and parse the #*-cells
770 * property to determine the argument length.
772 * This is not needed if the cell count is hard-coded
773 * (i.e. cells_name not set, but cell_count is set),
774 * except when we're going to return the found node
777 if (cells_name || cur_index == index) {
778 node = fdt_node_offset_by_phandle(blob,
781 debug("%s: could not find phandle\n",
782 fdt_get_name(blob, src_node,
789 count = fdtdec_get_int(blob, node, cells_name,
792 debug("%s: could not get %s for %s\n",
793 fdt_get_name(blob, src_node,
796 fdt_get_name(blob, node,
805 * Make sure that the arguments actually fit in the
806 * remaining property data length
808 if (list + count > list_end) {
809 debug("%s: arguments longer than property\n",
810 fdt_get_name(blob, src_node, NULL));
816 * All of the error cases above bail out of the loop, so at
817 * this point, the parsing is successful. If the requested
818 * index matches, then fill the out_args structure and return,
819 * or return -ENOENT for an empty entry.
822 if (cur_index == index) {
829 if (count > MAX_PHANDLE_ARGS) {
830 debug("%s: too many arguments %d\n",
831 fdt_get_name(blob, src_node,
833 count = MAX_PHANDLE_ARGS;
835 out_args->node = node;
836 out_args->args_count = count;
837 for (i = 0; i < count; i++) {
839 be32_to_cpup(list++);
843 /* Found it! return success */
853 * Result will be one of:
854 * -ENOENT : index is for empty phandle
855 * -EINVAL : parsing error on data
856 * [1..n] : Number of phandle (count mode; when index = -1)
858 rc = index < 0 ? cur_index : -ENOENT;
863 int fdtdec_get_child_count(const void *blob, int node)
868 fdt_for_each_subnode(subnode, blob, node)
874 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
875 u8 *array, int count)
880 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
882 memcpy(array, cell, count);
886 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
887 const char *prop_name, int count)
892 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
898 int fdtdec_get_config_int(const void *blob, const char *prop_name,
903 debug("%s: %s\n", __func__, prop_name);
904 config_node = fdt_path_offset(blob, "/config");
907 return fdtdec_get_int(blob, config_node, prop_name, default_val);
910 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
915 debug("%s: %s\n", __func__, prop_name);
916 config_node = fdt_path_offset(blob, "/config");
919 prop = fdt_get_property(blob, config_node, prop_name, NULL);
924 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
930 debug("%s: %s\n", __func__, prop_name);
931 nodeoffset = fdt_path_offset(blob, "/config");
935 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
939 return (char *)nodep;
942 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
947 number = (number << 32) | fdt32_to_cpu(*ptr++);
952 int fdt_get_resource(const void *fdt, int node, const char *property,
953 unsigned int index, struct fdt_resource *res)
955 const fdt32_t *ptr, *end;
956 int na, ns, len, parent;
959 parent = fdt_parent_offset(fdt, node);
963 na = fdt_address_cells(fdt, parent);
964 ns = fdt_size_cells(fdt, parent);
966 ptr = fdt_getprop(fdt, node, property, &len);
970 end = ptr + len / sizeof(*ptr);
972 while (ptr + na + ns <= end) {
974 res->start = fdtdec_get_number(ptr, na);
975 res->end = res->start;
976 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
984 return -FDT_ERR_NOTFOUND;
987 int fdt_get_named_resource(const void *fdt, int node, const char *property,
988 const char *prop_names, const char *name,
989 struct fdt_resource *res)
993 index = fdt_stringlist_search(fdt, node, prop_names, name);
997 return fdt_get_resource(fdt, node, property, index, res);
1000 static int decode_timing_property(const void *blob, int node, const char *name,
1001 struct timing_entry *result)
1003 int length, ret = 0;
1006 prop = fdt_getprop(blob, node, name, &length);
1008 debug("%s: could not find property %s\n",
1009 fdt_get_name(blob, node, NULL), name);
1013 if (length == sizeof(u32)) {
1014 result->typ = fdtdec_get_int(blob, node, name, 0);
1015 result->min = result->typ;
1016 result->max = result->typ;
1018 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1024 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1025 struct display_timing *dt)
1027 int i, node, timings_node;
1031 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1032 if (timings_node < 0)
1033 return timings_node;
1035 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1036 node > 0 && i != index;
1037 node = fdt_next_subnode(blob, node))
1043 memset(dt, 0, sizeof(*dt));
1045 ret |= decode_timing_property(blob, node, "hback-porch",
1047 ret |= decode_timing_property(blob, node, "hfront-porch",
1049 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1050 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1051 ret |= decode_timing_property(blob, node, "vback-porch",
1053 ret |= decode_timing_property(blob, node, "vfront-porch",
1055 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1056 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1057 ret |= decode_timing_property(blob, node, "clock-frequency",
1061 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1063 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1064 DISPLAY_FLAGS_VSYNC_LOW;
1066 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1068 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1069 DISPLAY_FLAGS_HSYNC_LOW;
1071 val = fdtdec_get_int(blob, node, "de-active", -1);
1073 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1074 DISPLAY_FLAGS_DE_LOW;
1076 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1078 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1079 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1082 if (fdtdec_get_bool(blob, node, "interlaced"))
1083 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1084 if (fdtdec_get_bool(blob, node, "doublescan"))
1085 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1086 if (fdtdec_get_bool(blob, node, "doubleclk"))
1087 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1092 int fdtdec_setup_mem_size_base_fdt(const void *blob)
1095 struct fdt_resource res;
1097 mem = fdt_path_offset(blob, "/memory");
1099 debug("%s: Missing /memory node\n", __func__);
1103 ret = fdt_get_resource(blob, mem, "reg", 0, &res);
1105 debug("%s: Unable to decode first memory bank\n", __func__);
1109 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1110 gd->ram_base = (unsigned long)res.start;
1111 debug("%s: Initial DRAM size %llx\n", __func__,
1112 (unsigned long long)gd->ram_size);
1117 int fdtdec_setup_mem_size_base(void)
1119 return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
1122 #if defined(CONFIG_NR_DRAM_BANKS)
1124 static int get_next_memory_node(const void *blob, int mem)
1127 mem = fdt_node_offset_by_prop_value(blob, mem,
1128 "device_type", "memory", 7);
1129 } while (!fdtdec_get_is_enabled(blob, mem));
1134 int fdtdec_setup_memory_banksize_fdt(const void *blob)
1136 int bank, ret, mem, reg = 0;
1137 struct fdt_resource res;
1139 mem = get_next_memory_node(blob, -1);
1141 debug("%s: Missing /memory node\n", __func__);
1145 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1146 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1147 if (ret == -FDT_ERR_NOTFOUND) {
1149 mem = get_next_memory_node(blob, mem);
1150 if (mem == -FDT_ERR_NOTFOUND)
1153 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1154 if (ret == -FDT_ERR_NOTFOUND)
1161 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1162 gd->bd->bi_dram[bank].size =
1163 (phys_size_t)(res.end - res.start + 1);
1165 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1167 (unsigned long long)gd->bd->bi_dram[bank].start,
1168 (unsigned long long)gd->bd->bi_dram[bank].size);
1174 int fdtdec_setup_memory_banksize(void)
1176 return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
1181 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1182 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1183 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1184 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1186 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1187 bool gzip = 0, lzo = 0;
1188 ulong sz_in = sz_src;
1192 if (CONFIG_IS_ENABLED(GZIP))
1193 if (gzip_parse_header(src, sz_in) >= 0)
1195 if (CONFIG_IS_ENABLED(LZO))
1196 if (!gzip && lzop_is_valid_header(src))
1203 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1204 dst = malloc(sz_out);
1206 puts("uncompress_blob: Unable to allocate memory\n");
1210 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1211 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1217 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1218 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1219 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1220 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1225 /* not a valid compressed blob */
1226 puts("uncompress_blob: Unable to uncompress\n");
1227 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1235 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1237 *dstp = (void *)src;
1243 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1245 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1246 * provide and/or fixup the fdt.
1248 __weak void *board_fdt_blob_setup(void)
1250 void *fdt_blob = NULL;
1251 #ifdef CONFIG_SPL_BUILD
1252 /* FDT is at end of BSS unless it is in a different memory region */
1253 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1254 fdt_blob = (ulong *)&_image_binary_end;
1256 fdt_blob = (ulong *)&__bss_end;
1258 /* FDT is at end of image */
1259 fdt_blob = (ulong *)&_end;
1265 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1270 if (!is_valid_ethaddr(mac))
1273 path = fdt_get_alias(fdt, "ethernet");
1277 debug("ethernet alias found: %s\n", path);
1279 offset = fdt_path_offset(fdt, path);
1281 debug("ethernet alias points to absent node %s\n", path);
1285 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1289 debug("MAC address: %pM\n", mac);
1294 static int fdtdec_init_reserved_memory(void *blob)
1296 int na, ns, node, err;
1299 /* inherit #address-cells and #size-cells from the root node */
1300 na = fdt_address_cells(blob, 0);
1301 ns = fdt_size_cells(blob, 0);
1303 node = fdt_add_subnode(blob, 0, "reserved-memory");
1307 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1311 value = cpu_to_fdt32(ns);
1313 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1317 value = cpu_to_fdt32(na);
1319 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1326 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1327 const struct fdt_memory *carveout,
1330 fdt32_t cells[4] = {}, *ptr = cells;
1331 uint32_t upper, lower, phandle;
1332 int parent, node, na, ns, err;
1336 /* create an empty /reserved-memory node if one doesn't exist */
1337 parent = fdt_path_offset(blob, "/reserved-memory");
1339 parent = fdtdec_init_reserved_memory(blob);
1344 /* only 1 or 2 #address-cells and #size-cells are supported */
1345 na = fdt_address_cells(blob, parent);
1346 if (na < 1 || na > 2)
1347 return -FDT_ERR_BADNCELLS;
1349 ns = fdt_size_cells(blob, parent);
1350 if (ns < 1 || ns > 2)
1351 return -FDT_ERR_BADNCELLS;
1353 /* find a matching node and return the phandle to that */
1354 fdt_for_each_subnode(node, blob, parent) {
1355 const char *name = fdt_get_name(blob, node, NULL);
1356 phys_addr_t addr, size;
1358 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
1359 if (addr == FDT_ADDR_T_NONE) {
1360 debug("failed to read address/size for %s\n", name);
1364 if (addr == carveout->start && (addr + size) == carveout->end) {
1365 *phandlep = fdt_get_phandle(blob, node);
1371 * Unpack the start address and generate the name of the new node
1372 * base on the basename and the unit-address.
1374 upper = upper_32_bits(carveout->start);
1375 lower = lower_32_bits(carveout->start);
1377 if (na > 1 && upper > 0)
1378 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1382 debug("address %08x:%08x exceeds addressable space\n",
1384 return -FDT_ERR_BADVALUE;
1387 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1390 node = fdt_add_subnode(blob, parent, name);
1394 err = fdt_generate_phandle(blob, &phandle);
1398 err = fdtdec_set_phandle(blob, node, phandle);
1402 /* store one or two address cells */
1404 *ptr++ = cpu_to_fdt32(upper);
1406 *ptr++ = cpu_to_fdt32(lower);
1408 /* store one or two size cells */
1409 size = carveout->end - carveout->start + 1;
1410 upper = upper_32_bits(size);
1411 lower = lower_32_bits(size);
1414 *ptr++ = cpu_to_fdt32(upper);
1416 *ptr++ = cpu_to_fdt32(lower);
1418 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1422 /* return the phandle for the new node for the caller to use */
1424 *phandlep = phandle;
1429 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1430 unsigned int index, struct fdt_memory *carveout)
1432 const fdt32_t *prop;
1437 offset = fdt_path_offset(blob, node);
1441 prop = fdt_getprop(blob, offset, name, &len);
1443 debug("failed to get %s for %s\n", name, node);
1444 return -FDT_ERR_NOTFOUND;
1447 if ((len % sizeof(phandle)) != 0) {
1448 debug("invalid phandle property\n");
1449 return -FDT_ERR_BADPHANDLE;
1452 if (len < (sizeof(phandle) * (index + 1))) {
1453 debug("invalid phandle index\n");
1454 return -FDT_ERR_BADPHANDLE;
1457 phandle = fdt32_to_cpu(prop[index]);
1459 offset = fdt_node_offset_by_phandle(blob, phandle);
1461 debug("failed to find node for phandle %u\n", phandle);
1465 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1468 if (carveout->start == FDT_ADDR_T_NONE) {
1469 debug("failed to read address/size from \"reg\" property\n");
1470 return -FDT_ERR_NOTFOUND;
1473 carveout->end = carveout->start + size - 1;
1478 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1479 unsigned int index, const char *name,
1480 const struct fdt_memory *carveout)
1486 /* XXX implement support for multiple phandles */
1488 debug("invalid index %u\n", index);
1489 return -FDT_ERR_BADOFFSET;
1492 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1494 debug("failed to add reserved memory: %d\n", err);
1498 offset = fdt_path_offset(blob, node);
1500 debug("failed to find offset for node %s: %d\n", node, offset);
1504 value = cpu_to_fdt32(phandle);
1506 err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
1508 debug("failed to set %s property for node %s: %d\n", prop_name,
1516 int fdtdec_setup(void)
1518 #if CONFIG_IS_ENABLED(OF_CONTROL)
1519 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1522 # ifdef CONFIG_OF_EMBED
1523 /* Get a pointer to the FDT */
1524 # ifdef CONFIG_SPL_BUILD
1525 gd->fdt_blob = __dtb_dt_spl_begin;
1527 gd->fdt_blob = __dtb_dt_begin;
1529 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1530 /* Allow the board to override the fdt address. */
1531 gd->fdt_blob = board_fdt_blob_setup();
1532 # elif defined(CONFIG_OF_HOSTFILE)
1533 if (sandbox_read_fdt_from_file()) {
1534 puts("Failed to read control FDT\n");
1538 # ifndef CONFIG_SPL_BUILD
1539 /* Allow the early environment to override the fdt address */
1540 # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
1541 gd->fdt_blob = (void *)prior_stage_fdt_address;
1543 gd->fdt_blob = map_sysmem
1544 (env_get_ulong("fdtcontroladdr", 16,
1545 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1549 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1551 * Try and uncompress the blob.
1552 * Unfortunately there is no way to know how big the input blob really
1553 * is. So let us set the maximum input size arbitrarily high. 16MB
1554 * ought to be more than enough for packed DTBs.
1556 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1557 gd->fdt_blob = fdt_blob;
1560 * Check if blob is a FIT images containings DTBs.
1561 * If so, pick the most relevant
1563 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1565 gd->multi_dtb_fit = gd->fdt_blob;
1566 gd->fdt_blob = fdt_blob;
1572 return fdtdec_prepare_fdt();
1575 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1576 int fdtdec_resetup(int *rescan)
1581 * If the current DTB is part of a compressed FIT image,
1582 * try to locate the best match from the uncompressed
1583 * FIT image stillpresent there. Save the time and space
1584 * required to uncompress it again.
1586 if (gd->multi_dtb_fit) {
1587 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1589 if (fdt_blob == gd->fdt_blob) {
1591 * The best match did not change. no need to tear down
1592 * the DM and rescan the fdt.
1599 gd->fdt_blob = fdt_blob;
1600 return fdtdec_prepare_fdt();
1604 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1605 * not a FIT image containings DTB, but a single DTB. There is no need
1606 * to teard down DM and rescan the DT in this case.
1613 #ifdef CONFIG_NR_DRAM_BANKS
1614 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1615 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1617 int addr_cells, size_cells;
1618 const u32 *cell, *end;
1619 u64 total_size, size, addr;
1625 debug("%s: board_id=%d\n", __func__, board_id);
1628 node = fdt_path_offset(blob, area);
1630 debug("No %s node found\n", area);
1634 cell = fdt_getprop(blob, node, "reg", &len);
1636 debug("No reg property found\n");
1640 addr_cells = fdt_address_cells(blob, node);
1641 size_cells = fdt_size_cells(blob, node);
1643 /* Check the board id and mask */
1644 for (child = fdt_first_subnode(blob, node);
1646 child = fdt_next_subnode(blob, child)) {
1647 int match_mask, match_value;
1649 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1650 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1652 if (match_value >= 0 &&
1653 ((board_id & match_mask) == match_value)) {
1654 /* Found matching mask */
1655 debug("Found matching mask %d\n", match_mask);
1657 cell = fdt_getprop(blob, node, "reg", &len);
1659 debug("No memory-banks property found\n");
1665 /* Note: if no matching subnode was found we use the parent node */
1668 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1669 CONFIG_NR_DRAM_BANKS);
1672 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1675 end = cell + len / 4 - addr_cells - size_cells;
1676 debug("cell at %p, end %p\n", cell, end);
1677 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1681 if (addr_cells == 2)
1682 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1683 addr += fdt32_to_cpu(*cell++);
1685 bd->bi_dram[bank].start = addr;
1687 *basep = (phys_addr_t)addr;
1690 if (size_cells == 2)
1691 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1692 size += fdt32_to_cpu(*cell++);
1697 debug("Auto-sizing %llx, size %llx: ", addr, size);
1698 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1699 if (new_size == size) {
1702 debug("sized to %llx\n", new_size);
1708 bd->bi_dram[bank].size = size;
1712 debug("Memory size %llu\n", total_size);
1714 *sizep = (phys_size_t)total_size;
1718 #endif /* CONFIG_NR_DRAM_BANKS */
1720 #endif /* !USE_HOSTCC */