1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
10 #include <dm/of_extra.h>
13 #include <fdt_support.h>
15 #include <linux/libfdt.h>
17 #include <asm/sections.h>
18 #include <linux/ctype.h>
19 #include <linux/lzo.h>
21 DECLARE_GLOBAL_DATA_PTR;
24 * Here are the type we know about. One day we might allow drivers to
25 * register. For now we just put them here. The COMPAT macro allows us to
26 * turn this into a sparse list later, and keeps the ID with the name.
28 * NOTE: This list is basically a TODO list for things that need to be
29 * converted to driver model. So don't add new things here unless there is a
30 * good reason why driver-model conversion is infeasible. Examples include
31 * things which are used before driver model is available.
33 #define COMPAT(id, name) name
34 static const char * const compat_names[COMPAT_COUNT] = {
35 COMPAT(UNKNOWN, "<none>"),
36 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
37 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
38 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
39 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
40 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
41 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
42 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
43 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
44 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
45 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
46 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
47 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
48 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
49 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
50 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
51 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
52 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
53 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
54 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
55 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
56 COMPAT(INTEL_MICROCODE, "intel,microcode"),
57 COMPAT(AMS_AS3722, "ams,as3722"),
58 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
61 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
62 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
75 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
76 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
79 const char *fdtdec_get_compatible(enum fdt_compat_id id)
81 /* We allow reading of the 'unknown' ID for testing purposes */
82 assert(id >= 0 && id < COMPAT_COUNT);
83 return compat_names[id];
86 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
87 const char *prop_name, int index, int na,
88 int ns, fdt_size_t *sizep,
91 const fdt32_t *prop, *prop_end;
92 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
96 debug("%s: %s: ", __func__, prop_name);
98 prop = fdt_getprop(blob, node, prop_name, &len);
100 debug("(not found)\n");
101 return FDT_ADDR_T_NONE;
103 prop_end = prop + (len / sizeof(*prop));
105 prop_addr = prop + (index * (na + ns));
106 prop_size = prop_addr + na;
107 prop_after_size = prop_size + ns;
108 if (prop_after_size > prop_end) {
109 debug("(not enough data: expected >= %d cells, got %d cells)\n",
110 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
111 return FDT_ADDR_T_NONE;
114 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
116 addr = fdt_translate_address(blob, node, prop_addr);
119 addr = fdtdec_get_number(prop_addr, na);
122 *sizep = fdtdec_get_number(prop_size, ns);
123 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
124 (unsigned long long)*sizep);
126 debug("addr=%08llx\n", (unsigned long long)addr);
132 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
133 int node, const char *prop_name,
134 int index, fdt_size_t *sizep,
139 debug("%s: ", __func__);
141 na = fdt_address_cells(blob, parent);
143 debug("(bad #address-cells)\n");
144 return FDT_ADDR_T_NONE;
147 ns = fdt_size_cells(blob, parent);
149 debug("(bad #size-cells)\n");
150 return FDT_ADDR_T_NONE;
153 debug("na=%d, ns=%d, ", na, ns);
155 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
156 ns, sizep, translate);
159 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
160 const char *prop_name, int index,
166 debug("%s: ", __func__);
168 parent = fdt_parent_offset(blob, node);
170 debug("(no parent found)\n");
171 return FDT_ADDR_T_NONE;
174 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
175 index, sizep, translate);
178 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
179 const char *prop_name, fdt_size_t *sizep)
181 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
183 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
184 sizeof(fdt_addr_t) / sizeof(fdt32_t),
188 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
190 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
193 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
194 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
195 const char *prop_name, struct fdt_pci_addr *addr)
201 debug("%s: %s: ", __func__, prop_name);
204 * If we follow the pci bus bindings strictly, we should check
205 * the value of the node's parent node's #address-cells and
206 * #size-cells. They need to be 3 and 2 accordingly. However,
207 * for simplicity we skip the check here.
209 cell = fdt_getprop(blob, node, prop_name, &len);
213 if ((len % FDT_PCI_REG_SIZE) == 0) {
214 int num = len / FDT_PCI_REG_SIZE;
217 for (i = 0; i < num; i++) {
218 debug("pci address #%d: %08lx %08lx %08lx\n", i,
219 (ulong)fdt32_to_cpu(cell[0]),
220 (ulong)fdt32_to_cpu(cell[1]),
221 (ulong)fdt32_to_cpu(cell[2]));
222 if ((fdt32_to_cpu(*cell) & type) == type) {
223 addr->phys_hi = fdt32_to_cpu(cell[0]);
224 addr->phys_mid = fdt32_to_cpu(cell[1]);
225 addr->phys_lo = fdt32_to_cpu(cell[1]);
229 cell += (FDT_PCI_ADDR_CELLS +
244 debug("(not found)\n");
248 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
250 const char *list, *end;
253 list = fdt_getprop(blob, node, "compatible", &len);
260 if (len >= strlen("pciVVVV,DDDD")) {
261 char *s = strstr(list, "pci");
264 * check if the string is something like pciVVVV,DDDD.RR
265 * or just pciVVVV,DDDD
267 if (s && s[7] == ',' &&
268 (s[12] == '.' || s[12] == 0)) {
270 *vendor = simple_strtol(s, NULL, 16);
273 *device = simple_strtol(s, NULL, 16);
284 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
289 /* extract the bar number from fdt_pci_addr */
290 barnum = addr->phys_hi & 0xff;
291 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
294 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
295 *bar = dm_pci_read_bar32(dev, barnum);
301 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
302 uint64_t default_val)
304 const uint64_t *cell64;
307 cell64 = fdt_getprop(blob, node, prop_name, &length);
308 if (!cell64 || length < sizeof(*cell64))
311 return fdt64_to_cpu(*cell64);
314 int fdtdec_get_is_enabled(const void *blob, int node)
319 * It should say "okay", so only allow that. Some fdts use "ok" but
320 * this is a bug. Please fix your device tree source file. See here
323 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
325 cell = fdt_getprop(blob, node, "status", NULL);
327 return strcmp(cell, "okay") == 0;
331 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
333 enum fdt_compat_id id;
335 /* Search our drivers */
336 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
337 if (fdt_node_check_compatible(blob, node,
338 compat_names[id]) == 0)
340 return COMPAT_UNKNOWN;
343 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
345 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
348 int fdtdec_next_compatible_subnode(const void *blob, int node,
349 enum fdt_compat_id id, int *depthp)
352 node = fdt_next_node(blob, node, depthp);
353 } while (*depthp > 1);
355 /* If this is a direct subnode, and compatible, return it */
356 if (*depthp == 1 && 0 == fdt_node_check_compatible(
357 blob, node, compat_names[id]))
360 return -FDT_ERR_NOTFOUND;
363 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
366 #define MAX_STR_LEN 20
367 char str[MAX_STR_LEN + 20];
370 /* snprintf() is not available */
371 assert(strlen(name) < MAX_STR_LEN);
372 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
373 node = fdt_path_offset(blob, str);
376 err = fdt_node_check_compatible(blob, node, compat_names[id]);
380 return -FDT_ERR_NOTFOUND;
385 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
386 enum fdt_compat_id id, int *node_list,
389 memset(node_list, '\0', sizeof(*node_list) * maxcount);
391 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
394 /* TODO: Can we tighten this code up a little? */
395 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
396 enum fdt_compat_id id, int *node_list,
399 int name_len = strlen(name);
407 /* find the alias node if present */
408 alias_node = fdt_path_offset(blob, "/aliases");
411 * start with nothing, and we can assume that the root node can't
414 memset(nodes, '\0', sizeof(nodes));
416 /* First find all the compatible nodes */
417 for (node = count = 0; node >= 0 && count < maxcount;) {
418 node = fdtdec_next_compatible(blob, node, id);
420 nodes[count++] = node;
423 debug("%s: warning: maxcount exceeded with alias '%s'\n",
426 /* Now find all the aliases */
427 for (offset = fdt_first_property_offset(blob, alias_node);
429 offset = fdt_next_property_offset(blob, offset)) {
430 const struct fdt_property *prop;
436 prop = fdt_get_property_by_offset(blob, offset, NULL);
437 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
438 if (prop->len && 0 == strncmp(path, name, name_len))
439 node = fdt_path_offset(blob, prop->data);
443 /* Get the alias number */
444 number = simple_strtoul(path + name_len, NULL, 10);
445 if (number < 0 || number >= maxcount) {
446 debug("%s: warning: alias '%s' is out of range\n",
451 /* Make sure the node we found is actually in our list! */
453 for (j = 0; j < count; j++)
454 if (nodes[j] == node) {
460 debug("%s: warning: alias '%s' points to a node "
461 "'%s' that is missing or is not compatible "
462 " with '%s'\n", __func__, path,
463 fdt_get_name(blob, node, NULL),
469 * Add this node to our list in the right place, and mark
472 if (fdtdec_get_is_enabled(blob, node)) {
473 if (node_list[number]) {
474 debug("%s: warning: alias '%s' requires that "
475 "a node be placed in the list in a "
476 "position which is already filled by "
477 "node '%s'\n", __func__, path,
478 fdt_get_name(blob, node, NULL));
481 node_list[number] = node;
482 if (number >= num_found)
483 num_found = number + 1;
488 /* Add any nodes not mentioned by an alias */
489 for (i = j = 0; i < maxcount; i++) {
491 for (; j < maxcount; j++)
493 fdtdec_get_is_enabled(blob, nodes[j]))
496 /* Have we run out of nodes to add? */
500 assert(!node_list[i]);
501 node_list[i] = nodes[j++];
510 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
513 int base_len = strlen(base);
514 const char *find_name;
519 find_name = fdt_get_name(blob, offset, &find_namelen);
520 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
522 aliases = fdt_path_offset(blob, "/aliases");
523 for (prop_offset = fdt_first_property_offset(blob, aliases);
525 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
531 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
532 debug(" - %s, %s\n", name, prop);
533 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
534 strncmp(name, base, base_len))
537 slash = strrchr(prop, '/');
538 if (strcmp(slash + 1, find_name))
540 val = trailing_strtol(name);
543 debug("Found seq %d\n", *seqp);
548 debug("Not found\n");
552 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
554 int base_len = strlen(base);
559 debug("Looking for highest alias id for '%s'\n", base);
561 aliases = fdt_path_offset(blob, "/aliases");
562 for (prop_offset = fdt_first_property_offset(blob, aliases);
564 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
569 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
570 debug(" - %s, %s\n", name, prop);
571 if (*prop != '/' || prop[len - 1] ||
572 strncmp(name, base, base_len))
575 val = trailing_strtol(name);
577 debug("Found seq %d\n", val);
585 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
591 chosen_node = fdt_path_offset(blob, "/chosen");
592 return fdt_getprop(blob, chosen_node, name, NULL);
595 int fdtdec_get_chosen_node(const void *blob, const char *name)
599 prop = fdtdec_get_chosen_prop(blob, name);
601 return -FDT_ERR_NOTFOUND;
602 return fdt_path_offset(blob, prop);
605 int fdtdec_check_fdt(void)
608 * We must have an FDT, but we cannot panic() yet since the console
609 * is not ready. So for now, just assert(). Boards which need an early
610 * FDT (prior to console ready) will need to make their own
611 * arrangements and do their own checks.
613 assert(!fdtdec_prepare_fdt());
618 * This function is a little odd in that it accesses global data. At some
619 * point if the architecture board.c files merge this will make more sense.
620 * Even now, it is common code.
622 int fdtdec_prepare_fdt(void)
624 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
625 fdt_check_header(gd->fdt_blob)) {
626 #ifdef CONFIG_SPL_BUILD
627 puts("Missing DTB\n");
629 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
632 printf("fdt_blob=%p\n", gd->fdt_blob);
633 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
643 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
648 debug("%s: %s\n", __func__, prop_name);
649 phandle = fdt_getprop(blob, node, prop_name, NULL);
651 return -FDT_ERR_NOTFOUND;
653 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
658 * Look up a property in a node and check that it has a minimum length.
660 * @param blob FDT blob
661 * @param node node to examine
662 * @param prop_name name of property to find
663 * @param min_len minimum property length in bytes
664 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
665 found, or -FDT_ERR_BADLAYOUT if not enough data
666 * @return pointer to cell, which is only valid if err == 0
668 static const void *get_prop_check_min_len(const void *blob, int node,
669 const char *prop_name, int min_len,
675 debug("%s: %s\n", __func__, prop_name);
676 cell = fdt_getprop(blob, node, prop_name, &len);
678 *err = -FDT_ERR_NOTFOUND;
679 else if (len < min_len)
680 *err = -FDT_ERR_BADLAYOUT;
686 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
687 u32 *array, int count)
692 debug("%s: %s\n", __func__, prop_name);
693 cell = get_prop_check_min_len(blob, node, prop_name,
694 sizeof(u32) * count, &err);
698 for (i = 0; i < count; i++)
699 array[i] = fdt32_to_cpu(cell[i]);
704 int fdtdec_get_int_array_count(const void *blob, int node,
705 const char *prop_name, u32 *array, int count)
711 debug("%s: %s\n", __func__, prop_name);
712 cell = fdt_getprop(blob, node, prop_name, &len);
714 return -FDT_ERR_NOTFOUND;
715 elems = len / sizeof(u32);
718 for (i = 0; i < count; i++)
719 array[i] = fdt32_to_cpu(cell[i]);
724 const u32 *fdtdec_locate_array(const void *blob, int node,
725 const char *prop_name, int count)
730 cell = get_prop_check_min_len(blob, node, prop_name,
731 sizeof(u32) * count, &err);
732 return err ? NULL : cell;
735 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
740 debug("%s: %s\n", __func__, prop_name);
741 cell = fdt_getprop(blob, node, prop_name, &len);
745 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
746 const char *list_name,
747 const char *cells_name,
748 int cell_count, int index,
749 struct fdtdec_phandle_args *out_args)
751 const __be32 *list, *list_end;
752 int rc = 0, size, cur_index = 0;
757 /* Retrieve the phandle list property */
758 list = fdt_getprop(blob, src_node, list_name, &size);
761 list_end = list + size / sizeof(*list);
763 /* Loop over the phandles until all the requested entry is found */
764 while (list < list_end) {
769 * If phandle is 0, then it is an empty entry with no
770 * arguments. Skip forward to the next entry.
772 phandle = be32_to_cpup(list++);
775 * Find the provider node and parse the #*-cells
776 * property to determine the argument length.
778 * This is not needed if the cell count is hard-coded
779 * (i.e. cells_name not set, but cell_count is set),
780 * except when we're going to return the found node
783 if (cells_name || cur_index == index) {
784 node = fdt_node_offset_by_phandle(blob,
787 debug("%s: could not find phandle\n",
788 fdt_get_name(blob, src_node,
795 count = fdtdec_get_int(blob, node, cells_name,
798 debug("%s: could not get %s for %s\n",
799 fdt_get_name(blob, src_node,
802 fdt_get_name(blob, node,
811 * Make sure that the arguments actually fit in the
812 * remaining property data length
814 if (list + count > list_end) {
815 debug("%s: arguments longer than property\n",
816 fdt_get_name(blob, src_node, NULL));
822 * All of the error cases above bail out of the loop, so at
823 * this point, the parsing is successful. If the requested
824 * index matches, then fill the out_args structure and return,
825 * or return -ENOENT for an empty entry.
828 if (cur_index == index) {
835 if (count > MAX_PHANDLE_ARGS) {
836 debug("%s: too many arguments %d\n",
837 fdt_get_name(blob, src_node,
839 count = MAX_PHANDLE_ARGS;
841 out_args->node = node;
842 out_args->args_count = count;
843 for (i = 0; i < count; i++) {
845 be32_to_cpup(list++);
849 /* Found it! return success */
859 * Result will be one of:
860 * -ENOENT : index is for empty phandle
861 * -EINVAL : parsing error on data
862 * [1..n] : Number of phandle (count mode; when index = -1)
864 rc = index < 0 ? cur_index : -ENOENT;
869 int fdtdec_get_child_count(const void *blob, int node)
874 fdt_for_each_subnode(subnode, blob, node)
880 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
881 u8 *array, int count)
886 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
888 memcpy(array, cell, count);
892 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
893 const char *prop_name, int count)
898 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
904 int fdtdec_get_config_int(const void *blob, const char *prop_name,
909 debug("%s: %s\n", __func__, prop_name);
910 config_node = fdt_path_offset(blob, "/config");
913 return fdtdec_get_int(blob, config_node, prop_name, default_val);
916 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
921 debug("%s: %s\n", __func__, prop_name);
922 config_node = fdt_path_offset(blob, "/config");
925 prop = fdt_get_property(blob, config_node, prop_name, NULL);
930 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
936 debug("%s: %s\n", __func__, prop_name);
937 nodeoffset = fdt_path_offset(blob, "/config");
941 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
945 return (char *)nodep;
948 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
953 number = (number << 32) | fdt32_to_cpu(*ptr++);
958 int fdt_get_resource(const void *fdt, int node, const char *property,
959 unsigned int index, struct fdt_resource *res)
961 const fdt32_t *ptr, *end;
962 int na, ns, len, parent;
965 parent = fdt_parent_offset(fdt, node);
969 na = fdt_address_cells(fdt, parent);
970 ns = fdt_size_cells(fdt, parent);
972 ptr = fdt_getprop(fdt, node, property, &len);
976 end = ptr + len / sizeof(*ptr);
978 while (ptr + na + ns <= end) {
980 res->start = fdtdec_get_number(ptr, na);
981 res->end = res->start;
982 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
990 return -FDT_ERR_NOTFOUND;
993 int fdt_get_named_resource(const void *fdt, int node, const char *property,
994 const char *prop_names, const char *name,
995 struct fdt_resource *res)
999 index = fdt_stringlist_search(fdt, node, prop_names, name);
1003 return fdt_get_resource(fdt, node, property, index, res);
1006 static int decode_timing_property(const void *blob, int node, const char *name,
1007 struct timing_entry *result)
1009 int length, ret = 0;
1012 prop = fdt_getprop(blob, node, name, &length);
1014 debug("%s: could not find property %s\n",
1015 fdt_get_name(blob, node, NULL), name);
1019 if (length == sizeof(u32)) {
1020 result->typ = fdtdec_get_int(blob, node, name, 0);
1021 result->min = result->typ;
1022 result->max = result->typ;
1024 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1030 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1031 struct display_timing *dt)
1033 int i, node, timings_node;
1037 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1038 if (timings_node < 0)
1039 return timings_node;
1041 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1042 node > 0 && i != index;
1043 node = fdt_next_subnode(blob, node))
1049 memset(dt, 0, sizeof(*dt));
1051 ret |= decode_timing_property(blob, node, "hback-porch",
1053 ret |= decode_timing_property(blob, node, "hfront-porch",
1055 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1056 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1057 ret |= decode_timing_property(blob, node, "vback-porch",
1059 ret |= decode_timing_property(blob, node, "vfront-porch",
1061 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1062 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1063 ret |= decode_timing_property(blob, node, "clock-frequency",
1067 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1069 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1070 DISPLAY_FLAGS_VSYNC_LOW;
1072 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1074 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1075 DISPLAY_FLAGS_HSYNC_LOW;
1077 val = fdtdec_get_int(blob, node, "de-active", -1);
1079 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1080 DISPLAY_FLAGS_DE_LOW;
1082 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1084 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1085 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1088 if (fdtdec_get_bool(blob, node, "interlaced"))
1089 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1090 if (fdtdec_get_bool(blob, node, "doublescan"))
1091 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1092 if (fdtdec_get_bool(blob, node, "doubleclk"))
1093 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1098 int fdtdec_setup_mem_size_base(void)
1101 struct fdt_resource res;
1103 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1105 debug("%s: Missing /memory node\n", __func__);
1109 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1111 debug("%s: Unable to decode first memory bank\n", __func__);
1115 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1116 gd->ram_base = (unsigned long)res.start;
1117 debug("%s: Initial DRAM size %llx\n", __func__,
1118 (unsigned long long)gd->ram_size);
1123 #if defined(CONFIG_NR_DRAM_BANKS)
1125 static int get_next_memory_node(const void *blob, int mem)
1128 mem = fdt_node_offset_by_prop_value(gd->fdt_blob, mem,
1129 "device_type", "memory", 7);
1130 } while (!fdtdec_get_is_enabled(blob, mem));
1135 int fdtdec_setup_memory_banksize(void)
1137 int bank, ret, mem, reg = 0;
1138 struct fdt_resource res;
1140 mem = get_next_memory_node(gd->fdt_blob, -1);
1142 debug("%s: Missing /memory node\n", __func__);
1146 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1147 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1148 if (ret == -FDT_ERR_NOTFOUND) {
1150 mem = get_next_memory_node(gd->fdt_blob, mem);
1151 if (mem == -FDT_ERR_NOTFOUND)
1154 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", reg++, &res);
1155 if (ret == -FDT_ERR_NOTFOUND)
1162 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1163 gd->bd->bi_dram[bank].size =
1164 (phys_size_t)(res.end - res.start + 1);
1166 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1168 (unsigned long long)gd->bd->bi_dram[bank].start,
1169 (unsigned long long)gd->bd->bi_dram[bank].size);
1176 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1177 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1178 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1179 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1181 size_t sz_out = CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ;
1182 ulong sz_in = sz_src;
1186 if (CONFIG_IS_ENABLED(GZIP))
1187 if (gzip_parse_header(src, sz_in) < 0)
1189 if (CONFIG_IS_ENABLED(LZO))
1190 if (!lzop_is_valid_header(src))
1193 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1194 dst = malloc(sz_out);
1196 puts("uncompress_blob: Unable to allocate memory\n");
1200 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1201 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1207 if (CONFIG_IS_ENABLED(GZIP))
1208 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1209 else if (CONFIG_IS_ENABLED(LZO))
1210 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1213 /* not a valid compressed blob */
1214 puts("uncompress_blob: Unable to uncompress\n");
1215 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1223 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1225 *dstp = (void *)src;
1231 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1233 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1234 * provide and/or fixup the fdt.
1236 __weak void *board_fdt_blob_setup(void)
1238 void *fdt_blob = NULL;
1239 #ifdef CONFIG_SPL_BUILD
1240 /* FDT is at end of BSS unless it is in a different memory region */
1241 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1242 fdt_blob = (ulong *)&_image_binary_end;
1244 fdt_blob = (ulong *)&__bss_end;
1246 /* FDT is at end of image */
1247 fdt_blob = (ulong *)&_end;
1253 int fdtdec_setup(void)
1255 #if CONFIG_IS_ENABLED(OF_CONTROL)
1256 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1259 # ifdef CONFIG_OF_EMBED
1260 /* Get a pointer to the FDT */
1261 # ifdef CONFIG_SPL_BUILD
1262 gd->fdt_blob = __dtb_dt_spl_begin;
1264 gd->fdt_blob = __dtb_dt_begin;
1266 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1267 /* Allow the board to override the fdt address. */
1268 gd->fdt_blob = board_fdt_blob_setup();
1269 # elif defined(CONFIG_OF_HOSTFILE)
1270 if (sandbox_read_fdt_from_file()) {
1271 puts("Failed to read control FDT\n");
1275 # ifndef CONFIG_SPL_BUILD
1276 /* Allow the early environment to override the fdt address */
1277 # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
1278 gd->fdt_blob = (void *)prior_stage_fdt_address;
1280 gd->fdt_blob = map_sysmem
1281 (env_get_ulong("fdtcontroladdr", 16,
1282 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1286 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1288 * Try and uncompress the blob.
1289 * Unfortunately there is no way to know how big the input blob really
1290 * is. So let us set the maximum input size arbitrarily high. 16MB
1291 * ought to be more than enough for packed DTBs.
1293 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1294 gd->fdt_blob = fdt_blob;
1297 * Check if blob is a FIT images containings DTBs.
1298 * If so, pick the most relevant
1300 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1302 gd->multi_dtb_fit = gd->fdt_blob;
1303 gd->fdt_blob = fdt_blob;
1309 return fdtdec_prepare_fdt();
1312 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1313 int fdtdec_resetup(int *rescan)
1318 * If the current DTB is part of a compressed FIT image,
1319 * try to locate the best match from the uncompressed
1320 * FIT image stillpresent there. Save the time and space
1321 * required to uncompress it again.
1323 if (gd->multi_dtb_fit) {
1324 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1326 if (fdt_blob == gd->fdt_blob) {
1328 * The best match did not change. no need to tear down
1329 * the DM and rescan the fdt.
1336 gd->fdt_blob = fdt_blob;
1337 return fdtdec_prepare_fdt();
1341 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1342 * not a FIT image containings DTB, but a single DTB. There is no need
1343 * to teard down DM and rescan the DT in this case.
1350 #ifdef CONFIG_NR_DRAM_BANKS
1351 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1352 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1354 int addr_cells, size_cells;
1355 const u32 *cell, *end;
1356 u64 total_size, size, addr;
1362 debug("%s: board_id=%d\n", __func__, board_id);
1365 node = fdt_path_offset(blob, area);
1367 debug("No %s node found\n", area);
1371 cell = fdt_getprop(blob, node, "reg", &len);
1373 debug("No reg property found\n");
1377 addr_cells = fdt_address_cells(blob, node);
1378 size_cells = fdt_size_cells(blob, node);
1380 /* Check the board id and mask */
1381 for (child = fdt_first_subnode(blob, node);
1383 child = fdt_next_subnode(blob, child)) {
1384 int match_mask, match_value;
1386 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1387 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1389 if (match_value >= 0 &&
1390 ((board_id & match_mask) == match_value)) {
1391 /* Found matching mask */
1392 debug("Found matching mask %d\n", match_mask);
1394 cell = fdt_getprop(blob, node, "reg", &len);
1396 debug("No memory-banks property found\n");
1402 /* Note: if no matching subnode was found we use the parent node */
1405 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1406 CONFIG_NR_DRAM_BANKS);
1409 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1412 end = cell + len / 4 - addr_cells - size_cells;
1413 debug("cell at %p, end %p\n", cell, end);
1414 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1418 if (addr_cells == 2)
1419 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1420 addr += fdt32_to_cpu(*cell++);
1422 bd->bi_dram[bank].start = addr;
1424 *basep = (phys_addr_t)addr;
1427 if (size_cells == 2)
1428 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1429 size += fdt32_to_cpu(*cell++);
1434 debug("Auto-sizing %llx, size %llx: ", addr, size);
1435 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1436 if (new_size == size) {
1439 debug("sized to %llx\n", new_size);
1445 bd->bi_dram[bank].size = size;
1449 debug("Memory size %llu\n", total_size);
1451 *sizep = (phys_size_t)total_size;
1455 #endif /* CONFIG_NR_DRAM_BANKS */
1457 #endif /* !USE_HOSTCC */