1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
10 #include <dm/of_extra.h>
13 #include <fdt_support.h>
15 #include <linux/libfdt.h>
17 #include <asm/sections.h>
18 #include <linux/ctype.h>
19 #include <linux/lzo.h>
21 DECLARE_GLOBAL_DATA_PTR;
24 * Here are the type we know about. One day we might allow drivers to
25 * register. For now we just put them here. The COMPAT macro allows us to
26 * turn this into a sparse list later, and keeps the ID with the name.
28 * NOTE: This list is basically a TODO list for things that need to be
29 * converted to driver model. So don't add new things here unless there is a
30 * good reason why driver-model conversion is infeasible. Examples include
31 * things which are used before driver model is available.
33 #define COMPAT(id, name) name
34 static const char * const compat_names[COMPAT_COUNT] = {
35 COMPAT(UNKNOWN, "<none>"),
36 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
37 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
38 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
39 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
40 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
41 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
42 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
43 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
44 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
45 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
46 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
47 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
48 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
49 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
50 COMPAT(INTEL_MICROCODE, "intel,microcode"),
51 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
52 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
53 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
54 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
55 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
56 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
57 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
58 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
59 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
60 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
61 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
62 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
63 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
64 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
65 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
66 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
67 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
68 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
69 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
72 const char *fdtdec_get_compatible(enum fdt_compat_id id)
74 /* We allow reading of the 'unknown' ID for testing purposes */
75 assert(id >= 0 && id < COMPAT_COUNT);
76 return compat_names[id];
79 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
80 const char *prop_name, int index, int na,
81 int ns, fdt_size_t *sizep,
84 const fdt32_t *prop, *prop_end;
85 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
89 debug("%s: %s: ", __func__, prop_name);
91 prop = fdt_getprop(blob, node, prop_name, &len);
93 debug("(not found)\n");
94 return FDT_ADDR_T_NONE;
96 prop_end = prop + (len / sizeof(*prop));
98 prop_addr = prop + (index * (na + ns));
99 prop_size = prop_addr + na;
100 prop_after_size = prop_size + ns;
101 if (prop_after_size > prop_end) {
102 debug("(not enough data: expected >= %d cells, got %d cells)\n",
103 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
104 return FDT_ADDR_T_NONE;
107 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
109 addr = fdt_translate_address(blob, node, prop_addr);
112 addr = fdtdec_get_number(prop_addr, na);
115 *sizep = fdtdec_get_number(prop_size, ns);
116 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
117 (unsigned long long)*sizep);
119 debug("addr=%08llx\n", (unsigned long long)addr);
125 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
126 int node, const char *prop_name,
127 int index, fdt_size_t *sizep,
132 debug("%s: ", __func__);
134 na = fdt_address_cells(blob, parent);
136 debug("(bad #address-cells)\n");
137 return FDT_ADDR_T_NONE;
140 ns = fdt_size_cells(blob, parent);
142 debug("(bad #size-cells)\n");
143 return FDT_ADDR_T_NONE;
146 debug("na=%d, ns=%d, ", na, ns);
148 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
149 ns, sizep, translate);
152 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
153 const char *prop_name, int index,
159 debug("%s: ", __func__);
161 parent = fdt_parent_offset(blob, node);
163 debug("(no parent found)\n");
164 return FDT_ADDR_T_NONE;
167 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
168 index, sizep, translate);
171 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
172 const char *prop_name, fdt_size_t *sizep)
174 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
176 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
177 sizeof(fdt_addr_t) / sizeof(fdt32_t),
181 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
183 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
186 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
187 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
188 const char *prop_name, struct fdt_pci_addr *addr)
194 debug("%s: %s: ", __func__, prop_name);
197 * If we follow the pci bus bindings strictly, we should check
198 * the value of the node's parent node's #address-cells and
199 * #size-cells. They need to be 3 and 2 accordingly. However,
200 * for simplicity we skip the check here.
202 cell = fdt_getprop(blob, node, prop_name, &len);
206 if ((len % FDT_PCI_REG_SIZE) == 0) {
207 int num = len / FDT_PCI_REG_SIZE;
210 for (i = 0; i < num; i++) {
211 debug("pci address #%d: %08lx %08lx %08lx\n", i,
212 (ulong)fdt32_to_cpu(cell[0]),
213 (ulong)fdt32_to_cpu(cell[1]),
214 (ulong)fdt32_to_cpu(cell[2]));
215 if ((fdt32_to_cpu(*cell) & type) == type) {
216 addr->phys_hi = fdt32_to_cpu(cell[0]);
217 addr->phys_mid = fdt32_to_cpu(cell[1]);
218 addr->phys_lo = fdt32_to_cpu(cell[1]);
222 cell += (FDT_PCI_ADDR_CELLS +
237 debug("(not found)\n");
241 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
243 const char *list, *end;
246 list = fdt_getprop(blob, node, "compatible", &len);
253 if (len >= strlen("pciVVVV,DDDD")) {
254 char *s = strstr(list, "pci");
257 * check if the string is something like pciVVVV,DDDD.RR
258 * or just pciVVVV,DDDD
260 if (s && s[7] == ',' &&
261 (s[12] == '.' || s[12] == 0)) {
263 *vendor = simple_strtol(s, NULL, 16);
266 *device = simple_strtol(s, NULL, 16);
277 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
282 /* extract the bar number from fdt_pci_addr */
283 barnum = addr->phys_hi & 0xff;
284 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
287 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
288 *bar = dm_pci_read_bar32(dev, barnum);
294 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
295 uint64_t default_val)
297 const uint64_t *cell64;
300 cell64 = fdt_getprop(blob, node, prop_name, &length);
301 if (!cell64 || length < sizeof(*cell64))
304 return fdt64_to_cpu(*cell64);
307 int fdtdec_get_is_enabled(const void *blob, int node)
312 * It should say "okay", so only allow that. Some fdts use "ok" but
313 * this is a bug. Please fix your device tree source file. See here
316 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
318 cell = fdt_getprop(blob, node, "status", NULL);
320 return strcmp(cell, "okay") == 0;
324 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
326 enum fdt_compat_id id;
328 /* Search our drivers */
329 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
330 if (fdt_node_check_compatible(blob, node,
331 compat_names[id]) == 0)
333 return COMPAT_UNKNOWN;
336 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
338 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
341 int fdtdec_next_compatible_subnode(const void *blob, int node,
342 enum fdt_compat_id id, int *depthp)
345 node = fdt_next_node(blob, node, depthp);
346 } while (*depthp > 1);
348 /* If this is a direct subnode, and compatible, return it */
349 if (*depthp == 1 && 0 == fdt_node_check_compatible(
350 blob, node, compat_names[id]))
353 return -FDT_ERR_NOTFOUND;
356 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
359 #define MAX_STR_LEN 20
360 char str[MAX_STR_LEN + 20];
363 /* snprintf() is not available */
364 assert(strlen(name) < MAX_STR_LEN);
365 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
366 node = fdt_path_offset(blob, str);
369 err = fdt_node_check_compatible(blob, node, compat_names[id]);
373 return -FDT_ERR_NOTFOUND;
378 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
379 enum fdt_compat_id id, int *node_list,
382 memset(node_list, '\0', sizeof(*node_list) * maxcount);
384 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
387 /* TODO: Can we tighten this code up a little? */
388 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
389 enum fdt_compat_id id, int *node_list,
392 int name_len = strlen(name);
400 /* find the alias node if present */
401 alias_node = fdt_path_offset(blob, "/aliases");
404 * start with nothing, and we can assume that the root node can't
407 memset(nodes, '\0', sizeof(nodes));
409 /* First find all the compatible nodes */
410 for (node = count = 0; node >= 0 && count < maxcount;) {
411 node = fdtdec_next_compatible(blob, node, id);
413 nodes[count++] = node;
416 debug("%s: warning: maxcount exceeded with alias '%s'\n",
419 /* Now find all the aliases */
420 for (offset = fdt_first_property_offset(blob, alias_node);
422 offset = fdt_next_property_offset(blob, offset)) {
423 const struct fdt_property *prop;
429 prop = fdt_get_property_by_offset(blob, offset, NULL);
430 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
431 if (prop->len && 0 == strncmp(path, name, name_len))
432 node = fdt_path_offset(blob, prop->data);
436 /* Get the alias number */
437 number = simple_strtoul(path + name_len, NULL, 10);
438 if (number < 0 || number >= maxcount) {
439 debug("%s: warning: alias '%s' is out of range\n",
444 /* Make sure the node we found is actually in our list! */
446 for (j = 0; j < count; j++)
447 if (nodes[j] == node) {
453 debug("%s: warning: alias '%s' points to a node "
454 "'%s' that is missing or is not compatible "
455 " with '%s'\n", __func__, path,
456 fdt_get_name(blob, node, NULL),
462 * Add this node to our list in the right place, and mark
465 if (fdtdec_get_is_enabled(blob, node)) {
466 if (node_list[number]) {
467 debug("%s: warning: alias '%s' requires that "
468 "a node be placed in the list in a "
469 "position which is already filled by "
470 "node '%s'\n", __func__, path,
471 fdt_get_name(blob, node, NULL));
474 node_list[number] = node;
475 if (number >= num_found)
476 num_found = number + 1;
481 /* Add any nodes not mentioned by an alias */
482 for (i = j = 0; i < maxcount; i++) {
484 for (; j < maxcount; j++)
486 fdtdec_get_is_enabled(blob, nodes[j]))
489 /* Have we run out of nodes to add? */
493 assert(!node_list[i]);
494 node_list[i] = nodes[j++];
503 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
506 int base_len = strlen(base);
507 const char *find_name;
512 find_name = fdt_get_name(blob, offset, &find_namelen);
513 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
515 aliases = fdt_path_offset(blob, "/aliases");
516 for (prop_offset = fdt_first_property_offset(blob, aliases);
518 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
524 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
525 debug(" - %s, %s\n", name, prop);
526 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
527 strncmp(name, base, base_len))
530 slash = strrchr(prop, '/');
531 if (strcmp(slash + 1, find_name))
533 val = trailing_strtol(name);
536 debug("Found seq %d\n", *seqp);
541 debug("Not found\n");
545 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
547 int base_len = strlen(base);
552 debug("Looking for highest alias id for '%s'\n", base);
554 aliases = fdt_path_offset(blob, "/aliases");
555 for (prop_offset = fdt_first_property_offset(blob, aliases);
557 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
562 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
563 debug(" - %s, %s\n", name, prop);
564 if (*prop != '/' || prop[len - 1] ||
565 strncmp(name, base, base_len))
568 val = trailing_strtol(name);
570 debug("Found seq %d\n", val);
578 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
584 chosen_node = fdt_path_offset(blob, "/chosen");
585 return fdt_getprop(blob, chosen_node, name, NULL);
588 int fdtdec_get_chosen_node(const void *blob, const char *name)
592 prop = fdtdec_get_chosen_prop(blob, name);
594 return -FDT_ERR_NOTFOUND;
595 return fdt_path_offset(blob, prop);
598 int fdtdec_check_fdt(void)
601 * We must have an FDT, but we cannot panic() yet since the console
602 * is not ready. So for now, just assert(). Boards which need an early
603 * FDT (prior to console ready) will need to make their own
604 * arrangements and do their own checks.
606 assert(!fdtdec_prepare_fdt());
611 * This function is a little odd in that it accesses global data. At some
612 * point if the architecture board.c files merge this will make more sense.
613 * Even now, it is common code.
615 int fdtdec_prepare_fdt(void)
617 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
618 fdt_check_header(gd->fdt_blob)) {
619 #ifdef CONFIG_SPL_BUILD
620 puts("Missing DTB\n");
622 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
625 printf("fdt_blob=%p\n", gd->fdt_blob);
626 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
636 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
641 debug("%s: %s\n", __func__, prop_name);
642 phandle = fdt_getprop(blob, node, prop_name, NULL);
644 return -FDT_ERR_NOTFOUND;
646 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
651 * Look up a property in a node and check that it has a minimum length.
653 * @param blob FDT blob
654 * @param node node to examine
655 * @param prop_name name of property to find
656 * @param min_len minimum property length in bytes
657 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
658 found, or -FDT_ERR_BADLAYOUT if not enough data
659 * @return pointer to cell, which is only valid if err == 0
661 static const void *get_prop_check_min_len(const void *blob, int node,
662 const char *prop_name, int min_len,
668 debug("%s: %s\n", __func__, prop_name);
669 cell = fdt_getprop(blob, node, prop_name, &len);
671 *err = -FDT_ERR_NOTFOUND;
672 else if (len < min_len)
673 *err = -FDT_ERR_BADLAYOUT;
679 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
680 u32 *array, int count)
685 debug("%s: %s\n", __func__, prop_name);
686 cell = get_prop_check_min_len(blob, node, prop_name,
687 sizeof(u32) * count, &err);
691 for (i = 0; i < count; i++)
692 array[i] = fdt32_to_cpu(cell[i]);
697 int fdtdec_get_int_array_count(const void *blob, int node,
698 const char *prop_name, u32 *array, int count)
704 debug("%s: %s\n", __func__, prop_name);
705 cell = fdt_getprop(blob, node, prop_name, &len);
707 return -FDT_ERR_NOTFOUND;
708 elems = len / sizeof(u32);
711 for (i = 0; i < count; i++)
712 array[i] = fdt32_to_cpu(cell[i]);
717 const u32 *fdtdec_locate_array(const void *blob, int node,
718 const char *prop_name, int count)
723 cell = get_prop_check_min_len(blob, node, prop_name,
724 sizeof(u32) * count, &err);
725 return err ? NULL : cell;
728 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
733 debug("%s: %s\n", __func__, prop_name);
734 cell = fdt_getprop(blob, node, prop_name, &len);
738 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
739 const char *list_name,
740 const char *cells_name,
741 int cell_count, int index,
742 struct fdtdec_phandle_args *out_args)
744 const __be32 *list, *list_end;
745 int rc = 0, size, cur_index = 0;
750 /* Retrieve the phandle list property */
751 list = fdt_getprop(blob, src_node, list_name, &size);
754 list_end = list + size / sizeof(*list);
756 /* Loop over the phandles until all the requested entry is found */
757 while (list < list_end) {
762 * If phandle is 0, then it is an empty entry with no
763 * arguments. Skip forward to the next entry.
765 phandle = be32_to_cpup(list++);
768 * Find the provider node and parse the #*-cells
769 * property to determine the argument length.
771 * This is not needed if the cell count is hard-coded
772 * (i.e. cells_name not set, but cell_count is set),
773 * except when we're going to return the found node
776 if (cells_name || cur_index == index) {
777 node = fdt_node_offset_by_phandle(blob,
780 debug("%s: could not find phandle\n",
781 fdt_get_name(blob, src_node,
788 count = fdtdec_get_int(blob, node, cells_name,
791 debug("%s: could not get %s for %s\n",
792 fdt_get_name(blob, src_node,
795 fdt_get_name(blob, node,
804 * Make sure that the arguments actually fit in the
805 * remaining property data length
807 if (list + count > list_end) {
808 debug("%s: arguments longer than property\n",
809 fdt_get_name(blob, src_node, NULL));
815 * All of the error cases above bail out of the loop, so at
816 * this point, the parsing is successful. If the requested
817 * index matches, then fill the out_args structure and return,
818 * or return -ENOENT for an empty entry.
821 if (cur_index == index) {
828 if (count > MAX_PHANDLE_ARGS) {
829 debug("%s: too many arguments %d\n",
830 fdt_get_name(blob, src_node,
832 count = MAX_PHANDLE_ARGS;
834 out_args->node = node;
835 out_args->args_count = count;
836 for (i = 0; i < count; i++) {
838 be32_to_cpup(list++);
842 /* Found it! return success */
852 * Result will be one of:
853 * -ENOENT : index is for empty phandle
854 * -EINVAL : parsing error on data
855 * [1..n] : Number of phandle (count mode; when index = -1)
857 rc = index < 0 ? cur_index : -ENOENT;
862 int fdtdec_get_child_count(const void *blob, int node)
867 fdt_for_each_subnode(subnode, blob, node)
873 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
874 u8 *array, int count)
879 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
881 memcpy(array, cell, count);
885 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
886 const char *prop_name, int count)
891 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
897 int fdtdec_get_config_int(const void *blob, const char *prop_name,
902 debug("%s: %s\n", __func__, prop_name);
903 config_node = fdt_path_offset(blob, "/config");
906 return fdtdec_get_int(blob, config_node, prop_name, default_val);
909 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
914 debug("%s: %s\n", __func__, prop_name);
915 config_node = fdt_path_offset(blob, "/config");
918 prop = fdt_get_property(blob, config_node, prop_name, NULL);
923 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
929 debug("%s: %s\n", __func__, prop_name);
930 nodeoffset = fdt_path_offset(blob, "/config");
934 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
938 return (char *)nodep;
941 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
946 number = (number << 32) | fdt32_to_cpu(*ptr++);
951 int fdt_get_resource(const void *fdt, int node, const char *property,
952 unsigned int index, struct fdt_resource *res)
954 const fdt32_t *ptr, *end;
955 int na, ns, len, parent;
958 parent = fdt_parent_offset(fdt, node);
962 na = fdt_address_cells(fdt, parent);
963 ns = fdt_size_cells(fdt, parent);
965 ptr = fdt_getprop(fdt, node, property, &len);
969 end = ptr + len / sizeof(*ptr);
971 while (ptr + na + ns <= end) {
973 res->start = fdtdec_get_number(ptr, na);
974 res->end = res->start;
975 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
983 return -FDT_ERR_NOTFOUND;
986 int fdt_get_named_resource(const void *fdt, int node, const char *property,
987 const char *prop_names, const char *name,
988 struct fdt_resource *res)
992 index = fdt_stringlist_search(fdt, node, prop_names, name);
996 return fdt_get_resource(fdt, node, property, index, res);
999 static int decode_timing_property(const void *blob, int node, const char *name,
1000 struct timing_entry *result)
1002 int length, ret = 0;
1005 prop = fdt_getprop(blob, node, name, &length);
1007 debug("%s: could not find property %s\n",
1008 fdt_get_name(blob, node, NULL), name);
1012 if (length == sizeof(u32)) {
1013 result->typ = fdtdec_get_int(blob, node, name, 0);
1014 result->min = result->typ;
1015 result->max = result->typ;
1017 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1023 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1024 struct display_timing *dt)
1026 int i, node, timings_node;
1030 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1031 if (timings_node < 0)
1032 return timings_node;
1034 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1035 node > 0 && i != index;
1036 node = fdt_next_subnode(blob, node))
1042 memset(dt, 0, sizeof(*dt));
1044 ret |= decode_timing_property(blob, node, "hback-porch",
1046 ret |= decode_timing_property(blob, node, "hfront-porch",
1048 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1049 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1050 ret |= decode_timing_property(blob, node, "vback-porch",
1052 ret |= decode_timing_property(blob, node, "vfront-porch",
1054 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1055 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1056 ret |= decode_timing_property(blob, node, "clock-frequency",
1060 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1062 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1063 DISPLAY_FLAGS_VSYNC_LOW;
1065 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1067 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1068 DISPLAY_FLAGS_HSYNC_LOW;
1070 val = fdtdec_get_int(blob, node, "de-active", -1);
1072 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1073 DISPLAY_FLAGS_DE_LOW;
1075 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1077 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1078 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1081 if (fdtdec_get_bool(blob, node, "interlaced"))
1082 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1083 if (fdtdec_get_bool(blob, node, "doublescan"))
1084 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1085 if (fdtdec_get_bool(blob, node, "doubleclk"))
1086 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1091 int fdtdec_setup_mem_size_base_fdt(const void *blob)
1094 struct fdt_resource res;
1096 mem = fdt_path_offset(blob, "/memory");
1098 debug("%s: Missing /memory node\n", __func__);
1102 ret = fdt_get_resource(blob, mem, "reg", 0, &res);
1104 debug("%s: Unable to decode first memory bank\n", __func__);
1108 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1109 gd->ram_base = (unsigned long)res.start;
1110 debug("%s: Initial DRAM size %llx\n", __func__,
1111 (unsigned long long)gd->ram_size);
1116 int fdtdec_setup_mem_size_base(void)
1118 return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
1121 #if defined(CONFIG_NR_DRAM_BANKS)
1123 static int get_next_memory_node(const void *blob, int mem)
1126 mem = fdt_node_offset_by_prop_value(blob, mem,
1127 "device_type", "memory", 7);
1128 } while (!fdtdec_get_is_enabled(blob, mem));
1133 int fdtdec_setup_memory_banksize_fdt(const void *blob)
1135 int bank, ret, mem, reg = 0;
1136 struct fdt_resource res;
1138 mem = get_next_memory_node(blob, -1);
1140 debug("%s: Missing /memory node\n", __func__);
1144 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1145 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1146 if (ret == -FDT_ERR_NOTFOUND) {
1148 mem = get_next_memory_node(blob, mem);
1149 if (mem == -FDT_ERR_NOTFOUND)
1152 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1153 if (ret == -FDT_ERR_NOTFOUND)
1160 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1161 gd->bd->bi_dram[bank].size =
1162 (phys_size_t)(res.end - res.start + 1);
1164 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1166 (unsigned long long)gd->bd->bi_dram[bank].start,
1167 (unsigned long long)gd->bd->bi_dram[bank].size);
1173 int fdtdec_setup_memory_banksize(void)
1175 return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
1180 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1181 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1182 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1183 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1185 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1186 bool gzip = 0, lzo = 0;
1187 ulong sz_in = sz_src;
1191 if (CONFIG_IS_ENABLED(GZIP))
1192 if (gzip_parse_header(src, sz_in) >= 0)
1194 if (CONFIG_IS_ENABLED(LZO))
1195 if (!gzip && lzop_is_valid_header(src))
1202 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1203 dst = malloc(sz_out);
1205 puts("uncompress_blob: Unable to allocate memory\n");
1209 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1210 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1216 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1217 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1218 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1219 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1224 /* not a valid compressed blob */
1225 puts("uncompress_blob: Unable to uncompress\n");
1226 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1234 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1236 *dstp = (void *)src;
1242 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1244 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1245 * provide and/or fixup the fdt.
1247 __weak void *board_fdt_blob_setup(void)
1249 void *fdt_blob = NULL;
1250 #ifdef CONFIG_SPL_BUILD
1251 /* FDT is at end of BSS unless it is in a different memory region */
1252 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1253 fdt_blob = (ulong *)&_image_binary_end;
1255 fdt_blob = (ulong *)&__bss_end;
1257 /* FDT is at end of image */
1258 fdt_blob = (ulong *)&_end;
1264 static int fdtdec_init_reserved_memory(void *blob)
1266 int na, ns, node, err;
1269 /* inherit #address-cells and #size-cells from the root node */
1270 na = fdt_address_cells(blob, 0);
1271 ns = fdt_size_cells(blob, 0);
1273 node = fdt_add_subnode(blob, 0, "reserved-memory");
1277 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1281 value = cpu_to_fdt32(ns);
1283 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1287 value = cpu_to_fdt32(na);
1289 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1296 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1297 const struct fdt_memory *carveout,
1300 fdt32_t cells[4] = {}, *ptr = cells;
1301 uint32_t upper, lower, phandle;
1302 int parent, node, na, ns, err;
1305 /* create an empty /reserved-memory node if one doesn't exist */
1306 parent = fdt_path_offset(blob, "/reserved-memory");
1308 parent = fdtdec_init_reserved_memory(blob);
1313 /* only 1 or 2 #address-cells and #size-cells are supported */
1314 na = fdt_address_cells(blob, parent);
1315 if (na < 1 || na > 2)
1316 return -FDT_ERR_BADNCELLS;
1318 ns = fdt_size_cells(blob, parent);
1319 if (ns < 1 || ns > 2)
1320 return -FDT_ERR_BADNCELLS;
1322 /* find a matching node and return the phandle to that */
1323 fdt_for_each_subnode(node, blob, parent) {
1324 const char *name = fdt_get_name(blob, node, NULL);
1325 phys_addr_t addr, size;
1327 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
1328 if (addr == FDT_ADDR_T_NONE) {
1329 debug("failed to read address/size for %s\n", name);
1333 if (addr == carveout->start && (addr + size) == carveout->end) {
1334 *phandlep = fdt_get_phandle(blob, node);
1340 * Unpack the start address and generate the name of the new node
1341 * base on the basename and the unit-address.
1343 lower = fdt_addr_unpack(carveout->start, &upper);
1345 if (na > 1 && upper > 0)
1346 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1350 debug("address %08x:%08x exceeds addressable space\n",
1352 return -FDT_ERR_BADVALUE;
1355 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1358 node = fdt_add_subnode(blob, parent, name);
1362 err = fdt_generate_phandle(blob, &phandle);
1366 err = fdtdec_set_phandle(blob, node, phandle);
1370 /* store one or two address cells */
1372 *ptr++ = cpu_to_fdt32(upper);
1374 *ptr++ = cpu_to_fdt32(lower);
1376 /* store one or two size cells */
1377 lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper);
1380 *ptr++ = cpu_to_fdt32(upper);
1382 *ptr++ = cpu_to_fdt32(lower);
1384 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1388 /* return the phandle for the new node for the caller to use */
1390 *phandlep = phandle;
1395 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1396 unsigned int index, struct fdt_memory *carveout)
1398 const fdt32_t *prop;
1403 offset = fdt_path_offset(blob, node);
1407 prop = fdt_getprop(blob, offset, name, &len);
1409 debug("failed to get %s for %s\n", name, node);
1410 return -FDT_ERR_NOTFOUND;
1413 if ((len % sizeof(phandle)) != 0) {
1414 debug("invalid phandle property\n");
1415 return -FDT_ERR_BADPHANDLE;
1418 if (len < (sizeof(phandle) * (index + 1))) {
1419 debug("invalid phandle index\n");
1420 return -FDT_ERR_BADPHANDLE;
1423 phandle = fdt32_to_cpu(prop[index]);
1425 offset = fdt_node_offset_by_phandle(blob, phandle);
1427 debug("failed to find node for phandle %u\n", phandle);
1431 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1434 if (carveout->start == FDT_ADDR_T_NONE) {
1435 debug("failed to read address/size from \"reg\" property\n");
1436 return -FDT_ERR_NOTFOUND;
1439 carveout->end = carveout->start + size - 1;
1444 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1445 unsigned int index, const char *name,
1446 const struct fdt_memory *carveout)
1452 /* XXX implement support for multiple phandles */
1454 debug("invalid index %u\n", index);
1455 return -FDT_ERR_BADOFFSET;
1458 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1460 debug("failed to add reserved memory: %d\n", err);
1464 offset = fdt_path_offset(blob, node);
1466 debug("failed to find offset for node %s: %d\n", node, offset);
1470 value = cpu_to_fdt32(phandle);
1472 err = fdt_setprop(blob, offset, prop_name, &value, sizeof(value));
1474 debug("failed to set %s property for node %s: %d\n", prop_name,
1482 int fdtdec_setup(void)
1484 #if CONFIG_IS_ENABLED(OF_CONTROL)
1485 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1488 # ifdef CONFIG_OF_EMBED
1489 /* Get a pointer to the FDT */
1490 # ifdef CONFIG_SPL_BUILD
1491 gd->fdt_blob = __dtb_dt_spl_begin;
1493 gd->fdt_blob = __dtb_dt_begin;
1495 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1496 /* Allow the board to override the fdt address. */
1497 gd->fdt_blob = board_fdt_blob_setup();
1498 # elif defined(CONFIG_OF_HOSTFILE)
1499 if (sandbox_read_fdt_from_file()) {
1500 puts("Failed to read control FDT\n");
1504 # ifndef CONFIG_SPL_BUILD
1505 /* Allow the early environment to override the fdt address */
1506 # if CONFIG_IS_ENABLED(OF_PRIOR_STAGE)
1507 gd->fdt_blob = (void *)prior_stage_fdt_address;
1509 gd->fdt_blob = map_sysmem
1510 (env_get_ulong("fdtcontroladdr", 16,
1511 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1515 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1517 * Try and uncompress the blob.
1518 * Unfortunately there is no way to know how big the input blob really
1519 * is. So let us set the maximum input size arbitrarily high. 16MB
1520 * ought to be more than enough for packed DTBs.
1522 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1523 gd->fdt_blob = fdt_blob;
1526 * Check if blob is a FIT images containings DTBs.
1527 * If so, pick the most relevant
1529 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1531 gd->multi_dtb_fit = gd->fdt_blob;
1532 gd->fdt_blob = fdt_blob;
1538 return fdtdec_prepare_fdt();
1541 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1542 int fdtdec_resetup(int *rescan)
1547 * If the current DTB is part of a compressed FIT image,
1548 * try to locate the best match from the uncompressed
1549 * FIT image stillpresent there. Save the time and space
1550 * required to uncompress it again.
1552 if (gd->multi_dtb_fit) {
1553 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1555 if (fdt_blob == gd->fdt_blob) {
1557 * The best match did not change. no need to tear down
1558 * the DM and rescan the fdt.
1565 gd->fdt_blob = fdt_blob;
1566 return fdtdec_prepare_fdt();
1570 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1571 * not a FIT image containings DTB, but a single DTB. There is no need
1572 * to teard down DM and rescan the DT in this case.
1579 #ifdef CONFIG_NR_DRAM_BANKS
1580 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1581 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1583 int addr_cells, size_cells;
1584 const u32 *cell, *end;
1585 u64 total_size, size, addr;
1591 debug("%s: board_id=%d\n", __func__, board_id);
1594 node = fdt_path_offset(blob, area);
1596 debug("No %s node found\n", area);
1600 cell = fdt_getprop(blob, node, "reg", &len);
1602 debug("No reg property found\n");
1606 addr_cells = fdt_address_cells(blob, node);
1607 size_cells = fdt_size_cells(blob, node);
1609 /* Check the board id and mask */
1610 for (child = fdt_first_subnode(blob, node);
1612 child = fdt_next_subnode(blob, child)) {
1613 int match_mask, match_value;
1615 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1616 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1618 if (match_value >= 0 &&
1619 ((board_id & match_mask) == match_value)) {
1620 /* Found matching mask */
1621 debug("Found matching mask %d\n", match_mask);
1623 cell = fdt_getprop(blob, node, "reg", &len);
1625 debug("No memory-banks property found\n");
1631 /* Note: if no matching subnode was found we use the parent node */
1634 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1635 CONFIG_NR_DRAM_BANKS);
1638 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1641 end = cell + len / 4 - addr_cells - size_cells;
1642 debug("cell at %p, end %p\n", cell, end);
1643 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1647 if (addr_cells == 2)
1648 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1649 addr += fdt32_to_cpu(*cell++);
1651 bd->bi_dram[bank].start = addr;
1653 *basep = (phys_addr_t)addr;
1656 if (size_cells == 2)
1657 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1658 size += fdt32_to_cpu(*cell++);
1663 debug("Auto-sizing %llx, size %llx: ", addr, size);
1664 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1665 if (new_size == size) {
1668 debug("sized to %llx\n", new_size);
1674 bd->bi_dram[bank].size = size;
1678 debug("Memory size %llu\n", total_size);
1680 *sizep = (phys_size_t)total_size;
1684 #endif /* CONFIG_NR_DRAM_BANKS */
1686 #endif /* !USE_HOSTCC */