1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
15 #include <dm/of_extra.h>
19 #include <fdt_support.h>
22 #include <linux/libfdt.h>
24 #include <asm/sections.h>
25 #include <linux/ctype.h>
26 #include <linux/lzo.h>
27 #include <linux/ioport.h>
29 DECLARE_GLOBAL_DATA_PTR;
32 * Here are the type we know about. One day we might allow drivers to
33 * register. For now we just put them here. The COMPAT macro allows us to
34 * turn this into a sparse list later, and keeps the ID with the name.
36 * NOTE: This list is basically a TODO list for things that need to be
37 * converted to driver model. So don't add new things here unless there is a
38 * good reason why driver-model conversion is infeasible. Examples include
39 * things which are used before driver model is available.
41 #define COMPAT(id, name) name
42 static const char * const compat_names[COMPAT_COUNT] = {
43 COMPAT(UNKNOWN, "<none>"),
44 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
45 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
46 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
47 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
48 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
49 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
50 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
51 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
52 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
53 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
54 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
55 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
56 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
57 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
58 COMPAT(INTEL_MICROCODE, "intel,microcode"),
59 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
60 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
61 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
62 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
63 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
64 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
65 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
66 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
67 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
68 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
69 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
74 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
75 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
76 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
77 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
80 const char *fdtdec_get_compatible(enum fdt_compat_id id)
82 /* We allow reading of the 'unknown' ID for testing purposes */
83 assert(id >= 0 && id < COMPAT_COUNT);
84 return compat_names[id];
87 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
88 const char *prop_name, int index, int na,
89 int ns, fdt_size_t *sizep,
92 const fdt32_t *prop, *prop_end;
93 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
97 debug("%s: %s: ", __func__, prop_name);
99 prop = fdt_getprop(blob, node, prop_name, &len);
101 debug("(not found)\n");
102 return FDT_ADDR_T_NONE;
104 prop_end = prop + (len / sizeof(*prop));
106 prop_addr = prop + (index * (na + ns));
107 prop_size = prop_addr + na;
108 prop_after_size = prop_size + ns;
109 if (prop_after_size > prop_end) {
110 debug("(not enough data: expected >= %d cells, got %d cells)\n",
111 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
112 return FDT_ADDR_T_NONE;
115 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
117 addr = fdt_translate_address(blob, node, prop_addr);
120 addr = fdtdec_get_number(prop_addr, na);
123 *sizep = fdtdec_get_number(prop_size, ns);
124 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
125 (unsigned long long)*sizep);
127 debug("addr=%08llx\n", (unsigned long long)addr);
133 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
134 int node, const char *prop_name,
135 int index, fdt_size_t *sizep,
140 debug("%s: ", __func__);
142 na = fdt_address_cells(blob, parent);
144 debug("(bad #address-cells)\n");
145 return FDT_ADDR_T_NONE;
148 ns = fdt_size_cells(blob, parent);
150 debug("(bad #size-cells)\n");
151 return FDT_ADDR_T_NONE;
154 debug("na=%d, ns=%d, ", na, ns);
156 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
157 ns, sizep, translate);
160 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
161 const char *prop_name, int index,
167 debug("%s: ", __func__);
169 parent = fdt_parent_offset(blob, node);
171 debug("(no parent found)\n");
172 return FDT_ADDR_T_NONE;
175 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
176 index, sizep, translate);
179 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
180 const char *prop_name, fdt_size_t *sizep)
182 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
184 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
185 sizeof(fdt_addr_t) / sizeof(fdt32_t),
189 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
191 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
194 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
195 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
197 const char *list, *end;
200 list = fdt_getprop(blob, node, "compatible", &len);
207 if (len >= strlen("pciVVVV,DDDD")) {
208 char *s = strstr(list, "pci");
211 * check if the string is something like pciVVVV,DDDD.RR
212 * or just pciVVVV,DDDD
214 if (s && s[7] == ',' &&
215 (s[12] == '.' || s[12] == 0)) {
217 *vendor = simple_strtol(s, NULL, 16);
220 *device = simple_strtol(s, NULL, 16);
231 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
236 /* extract the bar number from fdt_pci_addr */
237 barnum = addr->phys_hi & 0xff;
238 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
241 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
242 *bar = dm_pci_read_bar32(dev, barnum);
247 int fdtdec_get_pci_bus_range(const void *blob, int node,
248 struct fdt_resource *res)
253 values = fdt_getprop(blob, node, "bus-range", &len);
254 if (!values || len < sizeof(*values) * 2)
257 res->start = fdt32_to_cpu(*values++);
258 res->end = fdt32_to_cpu(*values);
264 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
265 uint64_t default_val)
267 const unaligned_fdt64_t *cell64;
270 cell64 = fdt_getprop(blob, node, prop_name, &length);
271 if (!cell64 || length < sizeof(*cell64))
274 return fdt64_to_cpu(*cell64);
277 int fdtdec_get_is_enabled(const void *blob, int node)
282 * It should say "okay", so only allow that. Some fdts use "ok" but
283 * this is a bug. Please fix your device tree source file. See here
286 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
288 cell = fdt_getprop(blob, node, "status", NULL);
290 return strcmp(cell, "okay") == 0;
294 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
296 enum fdt_compat_id id;
298 /* Search our drivers */
299 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
300 if (fdt_node_check_compatible(blob, node,
301 compat_names[id]) == 0)
303 return COMPAT_UNKNOWN;
306 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
308 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
311 int fdtdec_next_compatible_subnode(const void *blob, int node,
312 enum fdt_compat_id id, int *depthp)
315 node = fdt_next_node(blob, node, depthp);
316 } while (*depthp > 1);
318 /* If this is a direct subnode, and compatible, return it */
319 if (*depthp == 1 && 0 == fdt_node_check_compatible(
320 blob, node, compat_names[id]))
323 return -FDT_ERR_NOTFOUND;
326 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
329 #define MAX_STR_LEN 20
330 char str[MAX_STR_LEN + 20];
333 /* snprintf() is not available */
334 assert(strlen(name) < MAX_STR_LEN);
335 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
336 node = fdt_path_offset(blob, str);
339 err = fdt_node_check_compatible(blob, node, compat_names[id]);
343 return -FDT_ERR_NOTFOUND;
348 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
349 enum fdt_compat_id id, int *node_list,
352 memset(node_list, '\0', sizeof(*node_list) * maxcount);
354 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
357 /* TODO: Can we tighten this code up a little? */
358 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
359 enum fdt_compat_id id, int *node_list,
362 int name_len = strlen(name);
370 /* find the alias node if present */
371 alias_node = fdt_path_offset(blob, "/aliases");
374 * start with nothing, and we can assume that the root node can't
377 memset(nodes, '\0', sizeof(nodes));
379 /* First find all the compatible nodes */
380 for (node = count = 0; node >= 0 && count < maxcount;) {
381 node = fdtdec_next_compatible(blob, node, id);
383 nodes[count++] = node;
386 debug("%s: warning: maxcount exceeded with alias '%s'\n",
389 /* Now find all the aliases */
390 for (offset = fdt_first_property_offset(blob, alias_node);
392 offset = fdt_next_property_offset(blob, offset)) {
393 const struct fdt_property *prop;
399 prop = fdt_get_property_by_offset(blob, offset, NULL);
400 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
401 if (prop->len && 0 == strncmp(path, name, name_len))
402 node = fdt_path_offset(blob, prop->data);
406 /* Get the alias number */
407 number = simple_strtoul(path + name_len, NULL, 10);
408 if (number < 0 || number >= maxcount) {
409 debug("%s: warning: alias '%s' is out of range\n",
414 /* Make sure the node we found is actually in our list! */
416 for (j = 0; j < count; j++)
417 if (nodes[j] == node) {
423 debug("%s: warning: alias '%s' points to a node "
424 "'%s' that is missing or is not compatible "
425 " with '%s'\n", __func__, path,
426 fdt_get_name(blob, node, NULL),
432 * Add this node to our list in the right place, and mark
435 if (fdtdec_get_is_enabled(blob, node)) {
436 if (node_list[number]) {
437 debug("%s: warning: alias '%s' requires that "
438 "a node be placed in the list in a "
439 "position which is already filled by "
440 "node '%s'\n", __func__, path,
441 fdt_get_name(blob, node, NULL));
444 node_list[number] = node;
445 if (number >= num_found)
446 num_found = number + 1;
451 /* Add any nodes not mentioned by an alias */
452 for (i = j = 0; i < maxcount; i++) {
454 for (; j < maxcount; j++)
456 fdtdec_get_is_enabled(blob, nodes[j]))
459 /* Have we run out of nodes to add? */
463 assert(!node_list[i]);
464 node_list[i] = nodes[j++];
473 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
476 int base_len = strlen(base);
477 const char *find_name;
482 find_name = fdt_get_name(blob, offset, &find_namelen);
483 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
485 aliases = fdt_path_offset(blob, "/aliases");
486 for (prop_offset = fdt_first_property_offset(blob, aliases);
488 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
494 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
495 debug(" - %s, %s\n", name, prop);
496 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
497 strncmp(name, base, base_len))
500 slash = strrchr(prop, '/');
501 if (strcmp(slash + 1, find_name))
503 val = trailing_strtol(name);
506 debug("Found seq %d\n", *seqp);
511 debug("Not found\n");
515 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
517 int base_len = strlen(base);
522 debug("Looking for highest alias id for '%s'\n", base);
524 aliases = fdt_path_offset(blob, "/aliases");
525 for (prop_offset = fdt_first_property_offset(blob, aliases);
527 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
532 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
533 debug(" - %s, %s\n", name, prop);
534 if (*prop != '/' || prop[len - 1] ||
535 strncmp(name, base, base_len))
538 val = trailing_strtol(name);
540 debug("Found seq %d\n", val);
548 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
554 chosen_node = fdt_path_offset(blob, "/chosen");
555 return fdt_getprop(blob, chosen_node, name, NULL);
558 int fdtdec_get_chosen_node(const void *blob, const char *name)
562 prop = fdtdec_get_chosen_prop(blob, name);
564 return -FDT_ERR_NOTFOUND;
565 return fdt_path_offset(blob, prop);
568 int fdtdec_check_fdt(void)
571 * We must have an FDT, but we cannot panic() yet since the console
572 * is not ready. So for now, just assert(). Boards which need an early
573 * FDT (prior to console ready) will need to make their own
574 * arrangements and do their own checks.
576 assert(!fdtdec_prepare_fdt());
581 * This function is a little odd in that it accesses global data. At some
582 * point if the architecture board.c files merge this will make more sense.
583 * Even now, it is common code.
585 int fdtdec_prepare_fdt(void)
587 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
588 fdt_check_header(gd->fdt_blob)) {
589 #ifdef CONFIG_SPL_BUILD
590 puts("Missing DTB\n");
592 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
595 printf("fdt_blob=%p\n", gd->fdt_blob);
596 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
606 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
611 debug("%s: %s\n", __func__, prop_name);
612 phandle = fdt_getprop(blob, node, prop_name, NULL);
614 return -FDT_ERR_NOTFOUND;
616 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
621 * Look up a property in a node and check that it has a minimum length.
623 * @param blob FDT blob
624 * @param node node to examine
625 * @param prop_name name of property to find
626 * @param min_len minimum property length in bytes
627 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
628 found, or -FDT_ERR_BADLAYOUT if not enough data
629 * @return pointer to cell, which is only valid if err == 0
631 static const void *get_prop_check_min_len(const void *blob, int node,
632 const char *prop_name, int min_len,
638 debug("%s: %s\n", __func__, prop_name);
639 cell = fdt_getprop(blob, node, prop_name, &len);
641 *err = -FDT_ERR_NOTFOUND;
642 else if (len < min_len)
643 *err = -FDT_ERR_BADLAYOUT;
649 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
650 u32 *array, int count)
655 debug("%s: %s\n", __func__, prop_name);
656 cell = get_prop_check_min_len(blob, node, prop_name,
657 sizeof(u32) * count, &err);
661 for (i = 0; i < count; i++)
662 array[i] = fdt32_to_cpu(cell[i]);
667 int fdtdec_get_int_array_count(const void *blob, int node,
668 const char *prop_name, u32 *array, int count)
674 debug("%s: %s\n", __func__, prop_name);
675 cell = fdt_getprop(blob, node, prop_name, &len);
677 return -FDT_ERR_NOTFOUND;
678 elems = len / sizeof(u32);
681 for (i = 0; i < count; i++)
682 array[i] = fdt32_to_cpu(cell[i]);
687 const u32 *fdtdec_locate_array(const void *blob, int node,
688 const char *prop_name, int count)
693 cell = get_prop_check_min_len(blob, node, prop_name,
694 sizeof(u32) * count, &err);
695 return err ? NULL : cell;
698 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
703 debug("%s: %s\n", __func__, prop_name);
704 cell = fdt_getprop(blob, node, prop_name, &len);
708 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
709 const char *list_name,
710 const char *cells_name,
711 int cell_count, int index,
712 struct fdtdec_phandle_args *out_args)
714 const __be32 *list, *list_end;
715 int rc = 0, size, cur_index = 0;
720 /* Retrieve the phandle list property */
721 list = fdt_getprop(blob, src_node, list_name, &size);
724 list_end = list + size / sizeof(*list);
726 /* Loop over the phandles until all the requested entry is found */
727 while (list < list_end) {
732 * If phandle is 0, then it is an empty entry with no
733 * arguments. Skip forward to the next entry.
735 phandle = be32_to_cpup(list++);
738 * Find the provider node and parse the #*-cells
739 * property to determine the argument length.
741 * This is not needed if the cell count is hard-coded
742 * (i.e. cells_name not set, but cell_count is set),
743 * except when we're going to return the found node
746 if (cells_name || cur_index == index) {
747 node = fdt_node_offset_by_phandle(blob,
750 debug("%s: could not find phandle\n",
751 fdt_get_name(blob, src_node,
758 count = fdtdec_get_int(blob, node, cells_name,
761 debug("%s: could not get %s for %s\n",
762 fdt_get_name(blob, src_node,
765 fdt_get_name(blob, node,
774 * Make sure that the arguments actually fit in the
775 * remaining property data length
777 if (list + count > list_end) {
778 debug("%s: arguments longer than property\n",
779 fdt_get_name(blob, src_node, NULL));
785 * All of the error cases above bail out of the loop, so at
786 * this point, the parsing is successful. If the requested
787 * index matches, then fill the out_args structure and return,
788 * or return -ENOENT for an empty entry.
791 if (cur_index == index) {
798 if (count > MAX_PHANDLE_ARGS) {
799 debug("%s: too many arguments %d\n",
800 fdt_get_name(blob, src_node,
802 count = MAX_PHANDLE_ARGS;
804 out_args->node = node;
805 out_args->args_count = count;
806 for (i = 0; i < count; i++) {
808 be32_to_cpup(list++);
812 /* Found it! return success */
822 * Result will be one of:
823 * -ENOENT : index is for empty phandle
824 * -EINVAL : parsing error on data
825 * [1..n] : Number of phandle (count mode; when index = -1)
827 rc = index < 0 ? cur_index : -ENOENT;
832 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
833 u8 *array, int count)
838 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
840 memcpy(array, cell, count);
844 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
845 const char *prop_name, int count)
850 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
856 int fdtdec_get_config_int(const void *blob, const char *prop_name,
861 debug("%s: %s\n", __func__, prop_name);
862 config_node = fdt_path_offset(blob, "/config");
865 return fdtdec_get_int(blob, config_node, prop_name, default_val);
868 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
873 debug("%s: %s\n", __func__, prop_name);
874 config_node = fdt_path_offset(blob, "/config");
877 prop = fdt_get_property(blob, config_node, prop_name, NULL);
882 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
888 debug("%s: %s\n", __func__, prop_name);
889 nodeoffset = fdt_path_offset(blob, "/config");
893 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
897 return (char *)nodep;
900 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
905 number = (number << 32) | fdt32_to_cpu(*ptr++);
910 int fdt_get_resource(const void *fdt, int node, const char *property,
911 unsigned int index, struct fdt_resource *res)
913 const fdt32_t *ptr, *end;
914 int na, ns, len, parent;
917 parent = fdt_parent_offset(fdt, node);
921 na = fdt_address_cells(fdt, parent);
922 ns = fdt_size_cells(fdt, parent);
924 ptr = fdt_getprop(fdt, node, property, &len);
928 end = ptr + len / sizeof(*ptr);
930 while (ptr + na + ns <= end) {
932 res->start = fdtdec_get_number(ptr, na);
933 res->end = res->start;
934 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
942 return -FDT_ERR_NOTFOUND;
945 int fdt_get_named_resource(const void *fdt, int node, const char *property,
946 const char *prop_names, const char *name,
947 struct fdt_resource *res)
951 index = fdt_stringlist_search(fdt, node, prop_names, name);
955 return fdt_get_resource(fdt, node, property, index, res);
958 static int decode_timing_property(const void *blob, int node, const char *name,
959 struct timing_entry *result)
964 prop = fdt_getprop(blob, node, name, &length);
966 debug("%s: could not find property %s\n",
967 fdt_get_name(blob, node, NULL), name);
971 if (length == sizeof(u32)) {
972 result->typ = fdtdec_get_int(blob, node, name, 0);
973 result->min = result->typ;
974 result->max = result->typ;
976 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
982 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
983 struct display_timing *dt)
985 int i, node, timings_node;
989 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
990 if (timings_node < 0)
993 for (i = 0, node = fdt_first_subnode(blob, timings_node);
994 node > 0 && i != index;
995 node = fdt_next_subnode(blob, node))
1001 memset(dt, 0, sizeof(*dt));
1003 ret |= decode_timing_property(blob, node, "hback-porch",
1005 ret |= decode_timing_property(blob, node, "hfront-porch",
1007 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1008 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1009 ret |= decode_timing_property(blob, node, "vback-porch",
1011 ret |= decode_timing_property(blob, node, "vfront-porch",
1013 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1014 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1015 ret |= decode_timing_property(blob, node, "clock-frequency",
1019 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1021 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1022 DISPLAY_FLAGS_VSYNC_LOW;
1024 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1026 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1027 DISPLAY_FLAGS_HSYNC_LOW;
1029 val = fdtdec_get_int(blob, node, "de-active", -1);
1031 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1032 DISPLAY_FLAGS_DE_LOW;
1034 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1036 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1037 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1040 if (fdtdec_get_bool(blob, node, "interlaced"))
1041 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1042 if (fdtdec_get_bool(blob, node, "doublescan"))
1043 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1044 if (fdtdec_get_bool(blob, node, "doubleclk"))
1045 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1050 int fdtdec_setup_mem_size_base(void)
1054 struct resource res;
1056 mem = ofnode_path("/memory");
1057 if (!ofnode_valid(mem)) {
1058 debug("%s: Missing /memory node\n", __func__);
1062 ret = ofnode_read_resource(mem, 0, &res);
1064 debug("%s: Unable to decode first memory bank\n", __func__);
1068 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1069 gd->ram_base = (unsigned long)res.start;
1070 debug("%s: Initial DRAM size %llx\n", __func__,
1071 (unsigned long long)gd->ram_size);
1076 ofnode get_next_memory_node(ofnode mem)
1079 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
1080 } while (!ofnode_is_available(mem));
1085 int fdtdec_setup_memory_banksize(void)
1087 int bank, ret, reg = 0;
1088 struct resource res;
1089 ofnode mem = ofnode_null();
1091 mem = get_next_memory_node(mem);
1092 if (!ofnode_valid(mem)) {
1093 debug("%s: Missing /memory node\n", __func__);
1097 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1098 ret = ofnode_read_resource(mem, reg++, &res);
1101 mem = get_next_memory_node(mem);
1102 if (!ofnode_valid(mem))
1105 ret = ofnode_read_resource(mem, reg++, &res);
1113 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1114 gd->bd->bi_dram[bank].size =
1115 (phys_size_t)(res.end - res.start + 1);
1117 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1119 (unsigned long long)gd->bd->bi_dram[bank].start,
1120 (unsigned long long)gd->bd->bi_dram[bank].size);
1126 int fdtdec_setup_mem_size_base_lowest(void)
1128 int bank, ret, reg = 0;
1129 struct resource res;
1132 ofnode mem = ofnode_null();
1134 gd->ram_base = (unsigned long)~0;
1136 mem = get_next_memory_node(mem);
1137 if (!ofnode_valid(mem)) {
1138 debug("%s: Missing /memory node\n", __func__);
1142 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1143 ret = ofnode_read_resource(mem, reg++, &res);
1146 mem = get_next_memory_node(mem);
1147 if (!ofnode_valid(mem))
1150 ret = ofnode_read_resource(mem, reg++, &res);
1158 base = (unsigned long)res.start;
1159 size = (phys_size_t)(res.end - res.start + 1);
1161 if (gd->ram_base > base && size) {
1162 gd->ram_base = base;
1163 gd->ram_size = size;
1164 debug("%s: Initial DRAM base %lx size %lx\n",
1165 __func__, base, (unsigned long)size);
1172 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1173 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1174 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1175 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1177 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1178 bool gzip = 0, lzo = 0;
1179 ulong sz_in = sz_src;
1183 if (CONFIG_IS_ENABLED(GZIP))
1184 if (gzip_parse_header(src, sz_in) >= 0)
1186 if (CONFIG_IS_ENABLED(LZO))
1187 if (!gzip && lzop_is_valid_header(src))
1194 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1195 dst = malloc(sz_out);
1197 puts("uncompress_blob: Unable to allocate memory\n");
1201 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1202 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1208 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1209 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1210 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1211 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1216 /* not a valid compressed blob */
1217 puts("uncompress_blob: Unable to uncompress\n");
1218 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1226 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1228 *dstp = (void *)src;
1234 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1236 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1237 * provide and/or fixup the fdt.
1239 __weak void *board_fdt_blob_setup(void)
1241 void *fdt_blob = NULL;
1242 #ifdef CONFIG_SPL_BUILD
1243 /* FDT is at end of BSS unless it is in a different memory region */
1244 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1245 fdt_blob = (ulong *)&_image_binary_end;
1247 fdt_blob = (ulong *)&__bss_end;
1249 /* FDT is at end of image */
1250 fdt_blob = (ulong *)&_end;
1256 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1261 if (!is_valid_ethaddr(mac))
1264 path = fdt_get_alias(fdt, "ethernet");
1268 debug("ethernet alias found: %s\n", path);
1270 offset = fdt_path_offset(fdt, path);
1272 debug("ethernet alias points to absent node %s\n", path);
1276 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1280 debug("MAC address: %pM\n", mac);
1285 static int fdtdec_init_reserved_memory(void *blob)
1287 int na, ns, node, err;
1290 /* inherit #address-cells and #size-cells from the root node */
1291 na = fdt_address_cells(blob, 0);
1292 ns = fdt_size_cells(blob, 0);
1294 node = fdt_add_subnode(blob, 0, "reserved-memory");
1298 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1302 value = cpu_to_fdt32(ns);
1304 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1308 value = cpu_to_fdt32(na);
1310 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1317 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1318 const struct fdt_memory *carveout,
1319 uint32_t *phandlep, bool no_map)
1321 fdt32_t cells[4] = {}, *ptr = cells;
1322 uint32_t upper, lower, phandle;
1323 int parent, node, na, ns, err;
1327 /* create an empty /reserved-memory node if one doesn't exist */
1328 parent = fdt_path_offset(blob, "/reserved-memory");
1330 parent = fdtdec_init_reserved_memory(blob);
1335 /* only 1 or 2 #address-cells and #size-cells are supported */
1336 na = fdt_address_cells(blob, parent);
1337 if (na < 1 || na > 2)
1338 return -FDT_ERR_BADNCELLS;
1340 ns = fdt_size_cells(blob, parent);
1341 if (ns < 1 || ns > 2)
1342 return -FDT_ERR_BADNCELLS;
1344 /* find a matching node and return the phandle to that */
1345 fdt_for_each_subnode(node, blob, parent) {
1346 const char *name = fdt_get_name(blob, node, NULL);
1350 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1352 if (addr == FDT_ADDR_T_NONE) {
1353 debug("failed to read address/size for %s\n", name);
1357 if (addr == carveout->start && (addr + size - 1) ==
1360 *phandlep = fdt_get_phandle(blob, node);
1366 * Unpack the start address and generate the name of the new node
1367 * base on the basename and the unit-address.
1369 upper = upper_32_bits(carveout->start);
1370 lower = lower_32_bits(carveout->start);
1372 if (na > 1 && upper > 0)
1373 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1377 debug("address %08x:%08x exceeds addressable space\n",
1379 return -FDT_ERR_BADVALUE;
1382 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1385 node = fdt_add_subnode(blob, parent, name);
1390 err = fdt_generate_phandle(blob, &phandle);
1394 err = fdtdec_set_phandle(blob, node, phandle);
1399 /* store one or two address cells */
1401 *ptr++ = cpu_to_fdt32(upper);
1403 *ptr++ = cpu_to_fdt32(lower);
1405 /* store one or two size cells */
1406 size = carveout->end - carveout->start + 1;
1407 upper = upper_32_bits(size);
1408 lower = lower_32_bits(size);
1411 *ptr++ = cpu_to_fdt32(upper);
1413 *ptr++ = cpu_to_fdt32(lower);
1415 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1420 err = fdt_setprop(blob, node, "no-map", NULL, 0);
1425 /* return the phandle for the new node for the caller to use */
1427 *phandlep = phandle;
1432 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1433 unsigned int index, struct fdt_memory *carveout)
1435 const fdt32_t *prop;
1440 offset = fdt_path_offset(blob, node);
1444 prop = fdt_getprop(blob, offset, name, &len);
1446 debug("failed to get %s for %s\n", name, node);
1447 return -FDT_ERR_NOTFOUND;
1450 if ((len % sizeof(phandle)) != 0) {
1451 debug("invalid phandle property\n");
1452 return -FDT_ERR_BADPHANDLE;
1455 if (len < (sizeof(phandle) * (index + 1))) {
1456 debug("invalid phandle index\n");
1457 return -FDT_ERR_BADPHANDLE;
1460 phandle = fdt32_to_cpu(prop[index]);
1462 offset = fdt_node_offset_by_phandle(blob, phandle);
1464 debug("failed to find node for phandle %u\n", phandle);
1468 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1471 if (carveout->start == FDT_ADDR_T_NONE) {
1472 debug("failed to read address/size from \"reg\" property\n");
1473 return -FDT_ERR_NOTFOUND;
1476 carveout->end = carveout->start + size - 1;
1481 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1482 unsigned int index, const char *name,
1483 const struct fdt_memory *carveout)
1486 int err, offset, len;
1490 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false);
1492 debug("failed to add reserved memory: %d\n", err);
1496 offset = fdt_path_offset(blob, node);
1498 debug("failed to find offset for node %s: %d\n", node, offset);
1502 value = cpu_to_fdt32(phandle);
1504 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1505 if (len == -FDT_ERR_NOTFOUND)
1511 if ((index + 1) * sizeof(value) > len) {
1512 err = fdt_setprop_placeholder(blob, offset, prop_name,
1513 (index + 1) * sizeof(value),
1516 debug("failed to resize reserved memory property: %s\n",
1522 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1524 index * sizeof(value),
1525 &value, sizeof(value));
1527 debug("failed to update %s property for node %s: %s\n",
1528 prop_name, node, fdt_strerror(err));
1535 __weak int fdtdec_board_setup(const void *fdt_blob)
1540 int fdtdec_setup(void)
1543 #if CONFIG_IS_ENABLED(OF_CONTROL)
1544 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1547 # ifdef CONFIG_OF_EMBED
1548 /* Get a pointer to the FDT */
1549 # ifdef CONFIG_SPL_BUILD
1550 gd->fdt_blob = __dtb_dt_spl_begin;
1552 gd->fdt_blob = __dtb_dt_begin;
1554 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1555 /* Allow the board to override the fdt address. */
1556 gd->fdt_blob = board_fdt_blob_setup();
1557 # elif defined(CONFIG_OF_HOSTFILE)
1558 if (sandbox_read_fdt_from_file()) {
1559 puts("Failed to read control FDT\n");
1562 # elif defined(CONFIG_OF_PRIOR_STAGE)
1563 gd->fdt_blob = (void *)prior_stage_fdt_address;
1565 # ifndef CONFIG_SPL_BUILD
1566 /* Allow the early environment to override the fdt address */
1567 gd->fdt_blob = map_sysmem
1568 (env_get_ulong("fdtcontroladdr", 16,
1569 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1572 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1574 * Try and uncompress the blob.
1575 * Unfortunately there is no way to know how big the input blob really
1576 * is. So let us set the maximum input size arbitrarily high. 16MB
1577 * ought to be more than enough for packed DTBs.
1579 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1580 gd->fdt_blob = fdt_blob;
1583 * Check if blob is a FIT images containings DTBs.
1584 * If so, pick the most relevant
1586 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1588 gd->multi_dtb_fit = gd->fdt_blob;
1589 gd->fdt_blob = fdt_blob;
1595 ret = fdtdec_prepare_fdt();
1597 ret = fdtdec_board_setup(gd->fdt_blob);
1601 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1602 int fdtdec_resetup(int *rescan)
1607 * If the current DTB is part of a compressed FIT image,
1608 * try to locate the best match from the uncompressed
1609 * FIT image stillpresent there. Save the time and space
1610 * required to uncompress it again.
1612 if (gd->multi_dtb_fit) {
1613 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1615 if (fdt_blob == gd->fdt_blob) {
1617 * The best match did not change. no need to tear down
1618 * the DM and rescan the fdt.
1625 gd->fdt_blob = fdt_blob;
1626 return fdtdec_prepare_fdt();
1630 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1631 * not a FIT image containings DTB, but a single DTB. There is no need
1632 * to teard down DM and rescan the DT in this case.
1639 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1640 phys_addr_t *basep, phys_size_t *sizep,
1643 int addr_cells, size_cells;
1644 const u32 *cell, *end;
1645 u64 total_size, size, addr;
1651 debug("%s: board_id=%d\n", __func__, board_id);
1654 node = fdt_path_offset(blob, area);
1656 debug("No %s node found\n", area);
1660 cell = fdt_getprop(blob, node, "reg", &len);
1662 debug("No reg property found\n");
1666 addr_cells = fdt_address_cells(blob, node);
1667 size_cells = fdt_size_cells(blob, node);
1669 /* Check the board id and mask */
1670 for (child = fdt_first_subnode(blob, node);
1672 child = fdt_next_subnode(blob, child)) {
1673 int match_mask, match_value;
1675 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1676 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1678 if (match_value >= 0 &&
1679 ((board_id & match_mask) == match_value)) {
1680 /* Found matching mask */
1681 debug("Found matching mask %d\n", match_mask);
1683 cell = fdt_getprop(blob, node, "reg", &len);
1685 debug("No memory-banks property found\n");
1691 /* Note: if no matching subnode was found we use the parent node */
1694 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1695 CONFIG_NR_DRAM_BANKS);
1698 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1701 end = cell + len / 4 - addr_cells - size_cells;
1702 debug("cell at %p, end %p\n", cell, end);
1703 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1707 if (addr_cells == 2)
1708 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1709 addr += fdt32_to_cpu(*cell++);
1711 bd->bi_dram[bank].start = addr;
1713 *basep = (phys_addr_t)addr;
1716 if (size_cells == 2)
1717 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1718 size += fdt32_to_cpu(*cell++);
1723 debug("Auto-sizing %llx, size %llx: ", addr, size);
1724 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1725 if (new_size == size) {
1728 debug("sized to %llx\n", new_size);
1734 bd->bi_dram[bank].size = size;
1738 debug("Memory size %llu\n", total_size);
1740 *sizep = (phys_size_t)total_size;
1745 #endif /* !USE_HOSTCC */