2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
12 #include <fdt_support.h>
14 #include <asm/sections.h>
15 #include <linux/ctype.h>
17 DECLARE_GLOBAL_DATA_PTR;
20 * Here are the type we know about. One day we might allow drivers to
21 * register. For now we just put them here. The COMPAT macro allows us to
22 * turn this into a sparse list later, and keeps the ID with the name.
24 * NOTE: This list is basically a TODO list for things that need to be
25 * converted to driver model. So don't add new things here unless there is a
26 * good reason why driver-model conversion is infeasible. Examples include
27 * things which are used before driver model is available.
29 #define COMPAT(id, name) name
30 static const char * const compat_names[COMPAT_COUNT] = {
31 COMPAT(UNKNOWN, "<none>"),
32 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
33 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
34 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
35 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
36 COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"),
37 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
38 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
39 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
40 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
41 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
42 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
43 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
44 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
45 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
46 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
47 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
48 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
49 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
50 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
51 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
52 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
53 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
54 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
55 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
56 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
57 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
58 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
59 COMPAT(INTEL_MICROCODE, "intel,microcode"),
60 COMPAT(AMS_AS3722, "ams,as3722"),
61 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
62 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
63 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
64 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
65 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
66 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
67 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
68 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
69 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
70 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
71 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
72 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
74 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
75 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
76 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
79 const char *fdtdec_get_compatible(enum fdt_compat_id id)
81 /* We allow reading of the 'unknown' ID for testing purposes */
82 assert(id >= 0 && id < COMPAT_COUNT);
83 return compat_names[id];
86 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
87 const char *prop_name, int index, int na, int ns,
88 fdt_size_t *sizep, bool translate)
90 const fdt32_t *prop, *prop_end;
91 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
95 debug("%s: %s: ", __func__, prop_name);
97 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
98 debug("(na too large for fdt_addr_t type)\n");
99 return FDT_ADDR_T_NONE;
102 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
103 debug("(ns too large for fdt_size_t type)\n");
104 return FDT_ADDR_T_NONE;
107 prop = fdt_getprop(blob, node, prop_name, &len);
109 debug("(not found)\n");
110 return FDT_ADDR_T_NONE;
112 prop_end = prop + (len / sizeof(*prop));
114 prop_addr = prop + (index * (na + ns));
115 prop_size = prop_addr + na;
116 prop_after_size = prop_size + ns;
117 if (prop_after_size > prop_end) {
118 debug("(not enough data: expected >= %d cells, got %d cells)\n",
119 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
120 return FDT_ADDR_T_NONE;
123 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
125 addr = fdt_translate_address(blob, node, prop_addr);
128 addr = fdtdec_get_number(prop_addr, na);
131 *sizep = fdtdec_get_number(prop_size, ns);
132 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
133 (unsigned long long)*sizep);
135 debug("addr=%08llx\n", (unsigned long long)addr);
141 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
142 int node, const char *prop_name, int index, fdt_size_t *sizep,
147 debug("%s: ", __func__);
149 na = fdt_address_cells(blob, parent);
151 debug("(bad #address-cells)\n");
152 return FDT_ADDR_T_NONE;
155 ns = fdt_size_cells(blob, parent);
157 debug("(bad #size-cells)\n");
158 return FDT_ADDR_T_NONE;
161 debug("na=%d, ns=%d, ", na, ns);
163 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
164 ns, sizep, translate);
167 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
168 const char *prop_name, int index, fdt_size_t *sizep,
173 debug("%s: ", __func__);
175 parent = fdt_parent_offset(blob, node);
177 debug("(no parent found)\n");
178 return FDT_ADDR_T_NONE;
181 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
182 index, sizep, translate);
185 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
186 const char *prop_name, fdt_size_t *sizep)
188 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
190 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
191 sizeof(fdt_addr_t) / sizeof(fdt32_t),
195 fdt_addr_t fdtdec_get_addr(const void *blob, int node,
196 const char *prop_name)
198 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
201 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
202 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
203 const char *prop_name, struct fdt_pci_addr *addr)
209 debug("%s: %s: ", __func__, prop_name);
212 * If we follow the pci bus bindings strictly, we should check
213 * the value of the node's parent node's #address-cells and
214 * #size-cells. They need to be 3 and 2 accordingly. However,
215 * for simplicity we skip the check here.
217 cell = fdt_getprop(blob, node, prop_name, &len);
221 if ((len % FDT_PCI_REG_SIZE) == 0) {
222 int num = len / FDT_PCI_REG_SIZE;
225 for (i = 0; i < num; i++) {
226 debug("pci address #%d: %08lx %08lx %08lx\n", i,
227 (ulong)fdt32_to_cpu(cell[0]),
228 (ulong)fdt32_to_cpu(cell[1]),
229 (ulong)fdt32_to_cpu(cell[2]));
230 if ((fdt32_to_cpu(*cell) & type) == type) {
231 addr->phys_hi = fdt32_to_cpu(cell[0]);
232 addr->phys_mid = fdt32_to_cpu(cell[1]);
233 addr->phys_lo = fdt32_to_cpu(cell[1]);
236 cell += (FDT_PCI_ADDR_CELLS +
252 debug("(not found)\n");
256 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
258 const char *list, *end;
261 list = fdt_getprop(blob, node, "compatible", &len);
270 if (len >= strlen("pciVVVV,DDDD")) {
271 s = strstr(list, "pci");
274 * check if the string is something like pciVVVV,DDDD.RR
275 * or just pciVVVV,DDDD
277 if (s && s[7] == ',' &&
278 (s[12] == '.' || s[12] == 0)) {
280 *vendor = simple_strtol(s, NULL, 16);
283 *device = simple_strtol(s, NULL, 16);
294 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
299 /* extract the bar number from fdt_pci_addr */
300 barnum = addr->phys_hi & 0xff;
301 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
304 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
305 *bar = dm_pci_read_bar32(dev, barnum);
311 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
312 uint64_t default_val)
314 const uint64_t *cell64;
317 cell64 = fdt_getprop(blob, node, prop_name, &length);
318 if (!cell64 || length < sizeof(*cell64))
321 return fdt64_to_cpu(*cell64);
324 int fdtdec_get_is_enabled(const void *blob, int node)
329 * It should say "okay", so only allow that. Some fdts use "ok" but
330 * this is a bug. Please fix your device tree source file. See here
333 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
335 cell = fdt_getprop(blob, node, "status", NULL);
337 return 0 == strcmp(cell, "okay");
341 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
343 enum fdt_compat_id id;
345 /* Search our drivers */
346 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
347 if (0 == fdt_node_check_compatible(blob, node,
350 return COMPAT_UNKNOWN;
353 int fdtdec_next_compatible(const void *blob, int node,
354 enum fdt_compat_id id)
356 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
359 int fdtdec_next_compatible_subnode(const void *blob, int node,
360 enum fdt_compat_id id, int *depthp)
363 node = fdt_next_node(blob, node, depthp);
364 } while (*depthp > 1);
366 /* If this is a direct subnode, and compatible, return it */
367 if (*depthp == 1 && 0 == fdt_node_check_compatible(
368 blob, node, compat_names[id]))
371 return -FDT_ERR_NOTFOUND;
374 int fdtdec_next_alias(const void *blob, const char *name,
375 enum fdt_compat_id id, int *upto)
377 #define MAX_STR_LEN 20
378 char str[MAX_STR_LEN + 20];
381 /* snprintf() is not available */
382 assert(strlen(name) < MAX_STR_LEN);
383 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
384 node = fdt_path_offset(blob, str);
387 err = fdt_node_check_compatible(blob, node, compat_names[id]);
391 return -FDT_ERR_NOTFOUND;
396 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
397 enum fdt_compat_id id, int *node_list, int maxcount)
399 memset(node_list, '\0', sizeof(*node_list) * maxcount);
401 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
404 /* TODO: Can we tighten this code up a little? */
405 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
406 enum fdt_compat_id id, int *node_list, int maxcount)
408 int name_len = strlen(name);
416 /* find the alias node if present */
417 alias_node = fdt_path_offset(blob, "/aliases");
420 * start with nothing, and we can assume that the root node can't
423 memset(nodes, '\0', sizeof(nodes));
425 /* First find all the compatible nodes */
426 for (node = count = 0; node >= 0 && count < maxcount;) {
427 node = fdtdec_next_compatible(blob, node, id);
429 nodes[count++] = node;
432 debug("%s: warning: maxcount exceeded with alias '%s'\n",
435 /* Now find all the aliases */
436 for (offset = fdt_first_property_offset(blob, alias_node);
438 offset = fdt_next_property_offset(blob, offset)) {
439 const struct fdt_property *prop;
445 prop = fdt_get_property_by_offset(blob, offset, NULL);
446 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
447 if (prop->len && 0 == strncmp(path, name, name_len))
448 node = fdt_path_offset(blob, prop->data);
452 /* Get the alias number */
453 number = simple_strtoul(path + name_len, NULL, 10);
454 if (number < 0 || number >= maxcount) {
455 debug("%s: warning: alias '%s' is out of range\n",
460 /* Make sure the node we found is actually in our list! */
462 for (j = 0; j < count; j++)
463 if (nodes[j] == node) {
469 debug("%s: warning: alias '%s' points to a node "
470 "'%s' that is missing or is not compatible "
471 " with '%s'\n", __func__, path,
472 fdt_get_name(blob, node, NULL),
478 * Add this node to our list in the right place, and mark
481 if (fdtdec_get_is_enabled(blob, node)) {
482 if (node_list[number]) {
483 debug("%s: warning: alias '%s' requires that "
484 "a node be placed in the list in a "
485 "position which is already filled by "
486 "node '%s'\n", __func__, path,
487 fdt_get_name(blob, node, NULL));
490 node_list[number] = node;
491 if (number >= num_found)
492 num_found = number + 1;
497 /* Add any nodes not mentioned by an alias */
498 for (i = j = 0; i < maxcount; i++) {
500 for (; j < maxcount; j++)
502 fdtdec_get_is_enabled(blob, nodes[j]))
505 /* Have we run out of nodes to add? */
509 assert(!node_list[i]);
510 node_list[i] = nodes[j++];
519 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
522 int base_len = strlen(base);
523 const char *find_name;
528 find_name = fdt_get_name(blob, offset, &find_namelen);
529 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
531 aliases = fdt_path_offset(blob, "/aliases");
532 for (prop_offset = fdt_first_property_offset(blob, aliases);
534 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
540 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
541 debug(" - %s, %s\n", name, prop);
542 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
543 strncmp(name, base, base_len))
546 slash = strrchr(prop, '/');
547 if (strcmp(slash + 1, find_name))
549 val = trailing_strtol(name);
552 debug("Found seq %d\n", *seqp);
557 debug("Not found\n");
561 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
567 chosen_node = fdt_path_offset(blob, "/chosen");
568 return fdt_getprop(blob, chosen_node, name, NULL);
571 int fdtdec_get_chosen_node(const void *blob, const char *name)
575 prop = fdtdec_get_chosen_prop(blob, name);
577 return -FDT_ERR_NOTFOUND;
578 return fdt_path_offset(blob, prop);
581 int fdtdec_check_fdt(void)
584 * We must have an FDT, but we cannot panic() yet since the console
585 * is not ready. So for now, just assert(). Boards which need an early
586 * FDT (prior to console ready) will need to make their own
587 * arrangements and do their own checks.
589 assert(!fdtdec_prepare_fdt());
594 * This function is a little odd in that it accesses global data. At some
595 * point if the architecture board.c files merge this will make more sense.
596 * Even now, it is common code.
598 int fdtdec_prepare_fdt(void)
600 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
601 fdt_check_header(gd->fdt_blob)) {
602 #ifdef CONFIG_SPL_BUILD
603 puts("Missing DTB\n");
605 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
608 printf("fdt_blob=%p\n", gd->fdt_blob);
609 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
619 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
624 debug("%s: %s\n", __func__, prop_name);
625 phandle = fdt_getprop(blob, node, prop_name, NULL);
627 return -FDT_ERR_NOTFOUND;
629 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
634 * Look up a property in a node and check that it has a minimum length.
636 * @param blob FDT blob
637 * @param node node to examine
638 * @param prop_name name of property to find
639 * @param min_len minimum property length in bytes
640 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
641 found, or -FDT_ERR_BADLAYOUT if not enough data
642 * @return pointer to cell, which is only valid if err == 0
644 static const void *get_prop_check_min_len(const void *blob, int node,
645 const char *prop_name, int min_len, int *err)
650 debug("%s: %s\n", __func__, prop_name);
651 cell = fdt_getprop(blob, node, prop_name, &len);
653 *err = -FDT_ERR_NOTFOUND;
654 else if (len < min_len)
655 *err = -FDT_ERR_BADLAYOUT;
661 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
662 u32 *array, int count)
667 debug("%s: %s\n", __func__, prop_name);
668 cell = get_prop_check_min_len(blob, node, prop_name,
669 sizeof(u32) * count, &err);
671 for (i = 0; i < count; i++)
672 array[i] = fdt32_to_cpu(cell[i]);
677 int fdtdec_get_int_array_count(const void *blob, int node,
678 const char *prop_name, u32 *array, int count)
684 debug("%s: %s\n", __func__, prop_name);
685 cell = fdt_getprop(blob, node, prop_name, &len);
687 return -FDT_ERR_NOTFOUND;
688 elems = len / sizeof(u32);
691 for (i = 0; i < count; i++)
692 array[i] = fdt32_to_cpu(cell[i]);
697 const u32 *fdtdec_locate_array(const void *blob, int node,
698 const char *prop_name, int count)
703 cell = get_prop_check_min_len(blob, node, prop_name,
704 sizeof(u32) * count, &err);
705 return err ? NULL : cell;
708 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
713 debug("%s: %s\n", __func__, prop_name);
714 cell = fdt_getprop(blob, node, prop_name, &len);
718 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
719 const char *list_name,
720 const char *cells_name,
721 int cell_count, int index,
722 struct fdtdec_phandle_args *out_args)
724 const __be32 *list, *list_end;
725 int rc = 0, size, cur_index = 0;
730 /* Retrieve the phandle list property */
731 list = fdt_getprop(blob, src_node, list_name, &size);
734 list_end = list + size / sizeof(*list);
736 /* Loop over the phandles until all the requested entry is found */
737 while (list < list_end) {
742 * If phandle is 0, then it is an empty entry with no
743 * arguments. Skip forward to the next entry.
745 phandle = be32_to_cpup(list++);
748 * Find the provider node and parse the #*-cells
749 * property to determine the argument length.
751 * This is not needed if the cell count is hard-coded
752 * (i.e. cells_name not set, but cell_count is set),
753 * except when we're going to return the found node
756 if (cells_name || cur_index == index) {
757 node = fdt_node_offset_by_phandle(blob,
760 debug("%s: could not find phandle\n",
761 fdt_get_name(blob, src_node,
768 count = fdtdec_get_int(blob, node, cells_name,
771 debug("%s: could not get %s for %s\n",
772 fdt_get_name(blob, src_node,
775 fdt_get_name(blob, node,
784 * Make sure that the arguments actually fit in the
785 * remaining property data length
787 if (list + count > list_end) {
788 debug("%s: arguments longer than property\n",
789 fdt_get_name(blob, src_node, NULL));
795 * All of the error cases above bail out of the loop, so at
796 * this point, the parsing is successful. If the requested
797 * index matches, then fill the out_args structure and return,
798 * or return -ENOENT for an empty entry.
801 if (cur_index == index) {
808 if (count > MAX_PHANDLE_ARGS) {
809 debug("%s: too many arguments %d\n",
810 fdt_get_name(blob, src_node,
812 count = MAX_PHANDLE_ARGS;
814 out_args->node = node;
815 out_args->args_count = count;
816 for (i = 0; i < count; i++) {
818 be32_to_cpup(list++);
822 /* Found it! return success */
832 * Result will be one of:
833 * -ENOENT : index is for empty phandle
834 * -EINVAL : parsing error on data
835 * [1..n] : Number of phandle (count mode; when index = -1)
837 rc = index < 0 ? cur_index : -ENOENT;
842 int fdtdec_get_child_count(const void *blob, int node)
847 fdt_for_each_subnode(subnode, blob, node)
853 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
854 u8 *array, int count)
859 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
861 memcpy(array, cell, count);
865 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
866 const char *prop_name, int count)
871 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
877 int fdtdec_get_config_int(const void *blob, const char *prop_name,
882 debug("%s: %s\n", __func__, prop_name);
883 config_node = fdt_path_offset(blob, "/config");
886 return fdtdec_get_int(blob, config_node, prop_name, default_val);
889 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
894 debug("%s: %s\n", __func__, prop_name);
895 config_node = fdt_path_offset(blob, "/config");
898 prop = fdt_get_property(blob, config_node, prop_name, NULL);
903 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
909 debug("%s: %s\n", __func__, prop_name);
910 nodeoffset = fdt_path_offset(blob, "/config");
914 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
918 return (char *)nodep;
921 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
922 fdt_addr_t *basep, fdt_size_t *sizep)
924 const fdt_addr_t *cell;
927 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
929 cell = fdt_getprop(blob, node, prop_name, &len);
930 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
931 debug("cell=%p, len=%d\n", cell, len);
935 *basep = fdt_addr_to_cpu(*cell);
936 *sizep = fdt_size_to_cpu(cell[1]);
937 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
944 * Read a flash entry from the fdt
946 * @param blob FDT blob
947 * @param node Offset of node to read
948 * @param name Name of node being read
949 * @param entry Place to put offset and size of this node
950 * @return 0 if ok, -ve on error
952 int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
953 struct fmap_entry *entry)
958 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
959 debug("Node '%s' has bad/missing 'reg' property\n", name);
960 return -FDT_ERR_NOTFOUND;
962 entry->offset = reg[0];
963 entry->length = reg[1];
964 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
965 prop = fdt_getprop(blob, node, "compress", NULL);
966 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
967 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
968 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
969 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
970 entry->hash = (uint8_t *)prop;
975 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
980 number = (number << 32) | fdt32_to_cpu(*ptr++);
985 int fdt_get_resource(const void *fdt, int node, const char *property,
986 unsigned int index, struct fdt_resource *res)
988 const fdt32_t *ptr, *end;
989 int na, ns, len, parent;
992 parent = fdt_parent_offset(fdt, node);
996 na = fdt_address_cells(fdt, parent);
997 ns = fdt_size_cells(fdt, parent);
999 ptr = fdt_getprop(fdt, node, property, &len);
1003 end = ptr + len / sizeof(*ptr);
1005 while (ptr + na + ns <= end) {
1007 res->start = res->end = fdtdec_get_number(ptr, na);
1008 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
1016 return -FDT_ERR_NOTFOUND;
1019 int fdt_get_named_resource(const void *fdt, int node, const char *property,
1020 const char *prop_names, const char *name,
1021 struct fdt_resource *res)
1025 index = fdt_stringlist_search(fdt, node, prop_names, name);
1029 return fdt_get_resource(fdt, node, property, index, res);
1032 int fdtdec_decode_memory_region(const void *blob, int config_node,
1033 const char *mem_type, const char *suffix,
1034 fdt_addr_t *basep, fdt_size_t *sizep)
1038 fdt_size_t size, offset_size;
1039 fdt_addr_t base, offset;
1042 if (config_node == -1) {
1043 config_node = fdt_path_offset(blob, "/config");
1044 if (config_node < 0) {
1045 debug("%s: Cannot find /config node\n", __func__);
1052 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1054 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1056 debug("%s: No memory type for '%s', using /memory\n", __func__,
1061 node = fdt_path_offset(blob, mem);
1063 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1064 fdt_strerror(node));
1069 * Not strictly correct - the memory may have multiple banks. We just
1072 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1073 debug("%s: Failed to decode memory region %s\n", __func__,
1078 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1080 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1082 debug("%s: Failed to decode memory region '%s'\n", __func__,
1087 *basep = base + offset;
1088 *sizep = offset_size;
1093 static int decode_timing_property(const void *blob, int node, const char *name,
1094 struct timing_entry *result)
1096 int length, ret = 0;
1099 prop = fdt_getprop(blob, node, name, &length);
1101 debug("%s: could not find property %s\n",
1102 fdt_get_name(blob, node, NULL), name);
1106 if (length == sizeof(u32)) {
1107 result->typ = fdtdec_get_int(blob, node, name, 0);
1108 result->min = result->typ;
1109 result->max = result->typ;
1111 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1117 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1118 struct display_timing *dt)
1120 int i, node, timings_node;
1124 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1125 if (timings_node < 0)
1126 return timings_node;
1128 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1129 node > 0 && i != index;
1130 node = fdt_next_subnode(blob, node))
1136 memset(dt, 0, sizeof(*dt));
1138 ret |= decode_timing_property(blob, node, "hback-porch",
1140 ret |= decode_timing_property(blob, node, "hfront-porch",
1142 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1143 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1144 ret |= decode_timing_property(blob, node, "vback-porch",
1146 ret |= decode_timing_property(blob, node, "vfront-porch",
1148 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1149 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1150 ret |= decode_timing_property(blob, node, "clock-frequency",
1154 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1156 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1157 DISPLAY_FLAGS_VSYNC_LOW;
1159 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1161 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1162 DISPLAY_FLAGS_HSYNC_LOW;
1164 val = fdtdec_get_int(blob, node, "de-active", -1);
1166 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1167 DISPLAY_FLAGS_DE_LOW;
1169 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1171 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1172 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1175 if (fdtdec_get_bool(blob, node, "interlaced"))
1176 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1177 if (fdtdec_get_bool(blob, node, "doublescan"))
1178 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1179 if (fdtdec_get_bool(blob, node, "doubleclk"))
1180 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1185 int fdtdec_setup_memory_size(void)
1188 struct fdt_resource res;
1190 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1192 debug("%s: Missing /memory node\n", __func__);
1196 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res);
1198 debug("%s: Unable to decode first memory bank\n", __func__);
1202 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1203 debug("%s: Initial DRAM size %llx\n", __func__, (u64)gd->ram_size);
1208 #if defined(CONFIG_NR_DRAM_BANKS)
1209 int fdtdec_setup_memory_banksize(void)
1212 struct fdt_resource res;
1214 mem = fdt_path_offset(gd->fdt_blob, "/memory");
1216 debug("%s: Missing /memory node\n", __func__);
1220 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1221 ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res);
1222 if (ret == -FDT_ERR_NOTFOUND)
1227 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1228 gd->bd->bi_dram[bank].size =
1229 (phys_size_t)(res.end - res.start + 1);
1231 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1233 (unsigned long long)gd->bd->bi_dram[bank].start,
1234 (unsigned long long)gd->bd->bi_dram[bank].size);
1241 int fdtdec_setup(void)
1243 #if CONFIG_IS_ENABLED(OF_CONTROL)
1244 # ifdef CONFIG_OF_EMBED
1245 /* Get a pointer to the FDT */
1246 gd->fdt_blob = __dtb_dt_begin;
1247 # elif defined CONFIG_OF_SEPARATE
1248 # ifdef CONFIG_SPL_BUILD
1249 /* FDT is at end of BSS unless it is in a different memory region */
1250 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1251 gd->fdt_blob = (ulong *)&_image_binary_end;
1253 gd->fdt_blob = (ulong *)&__bss_end;
1255 /* FDT is at end of image */
1256 gd->fdt_blob = (ulong *)&_end;
1258 # elif defined(CONFIG_OF_BOARD)
1259 /* Allow the board to override the fdt address. */
1260 gd->fdt_blob = board_fdt_blob_setup();
1261 # elif defined(CONFIG_OF_HOSTFILE)
1262 if (sandbox_read_fdt_from_file()) {
1263 puts("Failed to read control FDT\n");
1267 # ifndef CONFIG_SPL_BUILD
1268 /* Allow the early environment to override the fdt address */
1269 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1270 (uintptr_t)gd->fdt_blob);
1273 return fdtdec_prepare_fdt();
1276 #endif /* !USE_HOSTCC */