2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/sections.h>
14 #include <linux/ctype.h>
16 DECLARE_GLOBAL_DATA_PTR;
19 * Here are the type we know about. One day we might allow drivers to
20 * register. For now we just put them here. The COMPAT macro allows us to
21 * turn this into a sparse list later, and keeps the ID with the name.
23 #define COMPAT(id, name) name
24 static const char * const compat_names[COMPAT_COUNT] = {
25 COMPAT(UNKNOWN, "<none>"),
26 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
27 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
28 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
29 COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
30 COMPAT(NVIDIA_TEGRA124_SOR, "nvidia,tegra124-sor"),
31 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
32 COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
33 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
34 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
35 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
36 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
37 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
38 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
39 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
40 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
41 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
42 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
43 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
44 COMPAT(GOOGLE_CROS_EC_KEYB, "google,cros-ec-keyb"),
45 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
46 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
47 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
48 COMPAT(SAMSUNG_EXYNOS_FIMD, "samsung,exynos-fimd"),
49 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
50 COMPAT(SAMSUNG_EXYNOS5_DP, "samsung,exynos5-dp"),
51 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
52 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
53 COMPAT(SAMSUNG_EXYNOS_SERIAL, "samsung,exynos4210-uart"),
54 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
55 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
56 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
57 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
58 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
59 COMPAT(INTEL_MICROCODE, "intel,microcode"),
60 COMPAT(INTEL_PANTHERPOINT_AHCI, "intel,pantherpoint-ahci"),
61 COMPAT(INTEL_MODEL_206AX, "intel,model-206ax"),
62 COMPAT(INTEL_GMA, "intel,gma"),
63 COMPAT(AMS_AS3722, "ams,as3722"),
64 COMPAT(INTEL_ICH_SPI, "intel,ich-spi"),
65 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
66 COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
67 COMPAT(COMPAT_INTEL_PCH, "intel,bd82x6x"),
68 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
69 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
70 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
71 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
72 COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
73 COMPAT(COMPAT_INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
76 const char *fdtdec_get_compatible(enum fdt_compat_id id)
78 /* We allow reading of the 'unknown' ID for testing purposes */
79 assert(id >= 0 && id < COMPAT_COUNT);
80 return compat_names[id];
83 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
84 const char *prop_name, int index, int na, int ns,
87 const fdt32_t *prop, *prop_end;
88 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
92 debug("%s: %s: ", __func__, prop_name);
94 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
95 debug("(na too large for fdt_addr_t type)\n");
96 return FDT_ADDR_T_NONE;
99 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
100 debug("(ns too large for fdt_size_t type)\n");
101 return FDT_ADDR_T_NONE;
104 prop = fdt_getprop(blob, node, prop_name, &len);
106 debug("(not found)\n");
107 return FDT_ADDR_T_NONE;
109 prop_end = prop + (len / sizeof(*prop));
111 prop_addr = prop + (index * (na + ns));
112 prop_size = prop_addr + na;
113 prop_after_size = prop_size + ns;
114 if (prop_after_size > prop_end) {
115 debug("(not enough data: expected >= %d cells, got %d cells)\n",
116 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
117 return FDT_ADDR_T_NONE;
120 addr = fdtdec_get_number(prop_addr, na);
123 *sizep = fdtdec_get_number(prop_size, ns);
124 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
125 (unsigned long long)*sizep);
127 debug("addr=%08llx\n", (unsigned long long)addr);
133 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
134 int node, const char *prop_name, int index, fdt_size_t *sizep)
138 debug("%s: ", __func__);
140 na = fdt_address_cells(blob, parent);
142 debug("(bad #address-cells)\n");
143 return FDT_ADDR_T_NONE;
146 ns = fdt_size_cells(blob, parent);
148 debug("(bad #size-cells)\n");
149 return FDT_ADDR_T_NONE;
152 debug("na=%d, ns=%d, ", na, ns);
154 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
158 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
159 const char *prop_name, int index, fdt_size_t *sizep)
163 debug("%s: ", __func__);
165 parent = fdt_parent_offset(blob, node);
167 debug("(no parent found)\n");
168 return FDT_ADDR_T_NONE;
171 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
175 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
176 const char *prop_name, fdt_size_t *sizep)
178 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
180 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
181 sizeof(fdt_addr_t) / sizeof(fdt32_t),
185 fdt_addr_t fdtdec_get_addr(const void *blob, int node,
186 const char *prop_name)
188 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
191 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
192 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
193 const char *prop_name, struct fdt_pci_addr *addr)
199 debug("%s: %s: ", __func__, prop_name);
202 * If we follow the pci bus bindings strictly, we should check
203 * the value of the node's parent node's #address-cells and
204 * #size-cells. They need to be 3 and 2 accordingly. However,
205 * for simplicity we skip the check here.
207 cell = fdt_getprop(blob, node, prop_name, &len);
211 if ((len % FDT_PCI_REG_SIZE) == 0) {
212 int num = len / FDT_PCI_REG_SIZE;
215 for (i = 0; i < num; i++) {
216 debug("pci address #%d: %08lx %08lx %08lx\n", i,
217 (ulong)fdt32_to_cpu(cell[0]),
218 (ulong)fdt32_to_cpu(cell[1]),
219 (ulong)fdt32_to_cpu(cell[2]));
220 if ((fdt32_to_cpu(*cell) & type) == type) {
221 addr->phys_hi = fdt32_to_cpu(cell[0]);
222 addr->phys_mid = fdt32_to_cpu(cell[1]);
223 addr->phys_lo = fdt32_to_cpu(cell[1]);
226 cell += (FDT_PCI_ADDR_CELLS +
242 debug("(not found)\n");
246 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
248 const char *list, *end;
251 list = fdt_getprop(blob, node, "compatible", &len);
260 if (len >= strlen("pciVVVV,DDDD")) {
261 s = strstr(list, "pci");
264 * check if the string is something like pciVVVV,DDDD.RR
265 * or just pciVVVV,DDDD
267 if (s && s[7] == ',' &&
268 (s[12] == '.' || s[12] == 0)) {
270 *vendor = simple_strtol(s, NULL, 16);
273 *device = simple_strtol(s, NULL, 16);
284 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
289 /* extract the bar number from fdt_pci_addr */
290 barnum = addr->phys_hi & 0xff;
291 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
294 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
295 *bar = dm_pci_read_bar32(dev, barnum);
301 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
302 uint64_t default_val)
304 const uint64_t *cell64;
307 cell64 = fdt_getprop(blob, node, prop_name, &length);
308 if (!cell64 || length < sizeof(*cell64))
311 return fdt64_to_cpu(*cell64);
314 int fdtdec_get_is_enabled(const void *blob, int node)
319 * It should say "okay", so only allow that. Some fdts use "ok" but
320 * this is a bug. Please fix your device tree source file. See here
323 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
325 cell = fdt_getprop(blob, node, "status", NULL);
327 return 0 == strcmp(cell, "okay");
331 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
333 enum fdt_compat_id id;
335 /* Search our drivers */
336 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
337 if (0 == fdt_node_check_compatible(blob, node,
340 return COMPAT_UNKNOWN;
343 int fdtdec_next_compatible(const void *blob, int node,
344 enum fdt_compat_id id)
346 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
349 int fdtdec_next_compatible_subnode(const void *blob, int node,
350 enum fdt_compat_id id, int *depthp)
353 node = fdt_next_node(blob, node, depthp);
354 } while (*depthp > 1);
356 /* If this is a direct subnode, and compatible, return it */
357 if (*depthp == 1 && 0 == fdt_node_check_compatible(
358 blob, node, compat_names[id]))
361 return -FDT_ERR_NOTFOUND;
364 int fdtdec_next_alias(const void *blob, const char *name,
365 enum fdt_compat_id id, int *upto)
367 #define MAX_STR_LEN 20
368 char str[MAX_STR_LEN + 20];
371 /* snprintf() is not available */
372 assert(strlen(name) < MAX_STR_LEN);
373 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
374 node = fdt_path_offset(blob, str);
377 err = fdt_node_check_compatible(blob, node, compat_names[id]);
381 return -FDT_ERR_NOTFOUND;
386 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
387 enum fdt_compat_id id, int *node_list, int maxcount)
389 memset(node_list, '\0', sizeof(*node_list) * maxcount);
391 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
394 /* TODO: Can we tighten this code up a little? */
395 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
396 enum fdt_compat_id id, int *node_list, int maxcount)
398 int name_len = strlen(name);
406 /* find the alias node if present */
407 alias_node = fdt_path_offset(blob, "/aliases");
410 * start with nothing, and we can assume that the root node can't
413 memset(nodes, '\0', sizeof(nodes));
415 /* First find all the compatible nodes */
416 for (node = count = 0; node >= 0 && count < maxcount;) {
417 node = fdtdec_next_compatible(blob, node, id);
419 nodes[count++] = node;
422 debug("%s: warning: maxcount exceeded with alias '%s'\n",
425 /* Now find all the aliases */
426 for (offset = fdt_first_property_offset(blob, alias_node);
428 offset = fdt_next_property_offset(blob, offset)) {
429 const struct fdt_property *prop;
435 prop = fdt_get_property_by_offset(blob, offset, NULL);
436 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
437 if (prop->len && 0 == strncmp(path, name, name_len))
438 node = fdt_path_offset(blob, prop->data);
442 /* Get the alias number */
443 number = simple_strtoul(path + name_len, NULL, 10);
444 if (number < 0 || number >= maxcount) {
445 debug("%s: warning: alias '%s' is out of range\n",
450 /* Make sure the node we found is actually in our list! */
452 for (j = 0; j < count; j++)
453 if (nodes[j] == node) {
459 debug("%s: warning: alias '%s' points to a node "
460 "'%s' that is missing or is not compatible "
461 " with '%s'\n", __func__, path,
462 fdt_get_name(blob, node, NULL),
468 * Add this node to our list in the right place, and mark
471 if (fdtdec_get_is_enabled(blob, node)) {
472 if (node_list[number]) {
473 debug("%s: warning: alias '%s' requires that "
474 "a node be placed in the list in a "
475 "position which is already filled by "
476 "node '%s'\n", __func__, path,
477 fdt_get_name(blob, node, NULL));
480 node_list[number] = node;
481 if (number >= num_found)
482 num_found = number + 1;
487 /* Add any nodes not mentioned by an alias */
488 for (i = j = 0; i < maxcount; i++) {
490 for (; j < maxcount; j++)
492 fdtdec_get_is_enabled(blob, nodes[j]))
495 /* Have we run out of nodes to add? */
499 assert(!node_list[i]);
500 node_list[i] = nodes[j++];
509 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
512 int base_len = strlen(base);
513 const char *find_name;
518 find_name = fdt_get_name(blob, offset, &find_namelen);
519 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
521 aliases = fdt_path_offset(blob, "/aliases");
522 for (prop_offset = fdt_first_property_offset(blob, aliases);
524 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
530 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
531 debug(" - %s, %s\n", name, prop);
532 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
533 strncmp(name, base, base_len))
536 slash = strrchr(prop, '/');
537 if (strcmp(slash + 1, find_name))
539 val = trailing_strtol(name);
542 debug("Found seq %d\n", *seqp);
547 debug("Not found\n");
551 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
557 chosen_node = fdt_path_offset(blob, "/chosen");
558 return fdt_getprop(blob, chosen_node, name, NULL);
561 int fdtdec_get_chosen_node(const void *blob, const char *name)
565 prop = fdtdec_get_chosen_prop(blob, name);
567 return -FDT_ERR_NOTFOUND;
568 return fdt_path_offset(blob, prop);
571 int fdtdec_check_fdt(void)
574 * We must have an FDT, but we cannot panic() yet since the console
575 * is not ready. So for now, just assert(). Boards which need an early
576 * FDT (prior to console ready) will need to make their own
577 * arrangements and do their own checks.
579 assert(!fdtdec_prepare_fdt());
584 * This function is a little odd in that it accesses global data. At some
585 * point if the architecture board.c files merge this will make more sense.
586 * Even now, it is common code.
588 int fdtdec_prepare_fdt(void)
590 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
591 fdt_check_header(gd->fdt_blob)) {
592 #ifdef CONFIG_SPL_BUILD
593 puts("Missing DTB\n");
595 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
598 printf("fdt_blob=%p\n", gd->fdt_blob);
599 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
609 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
614 debug("%s: %s\n", __func__, prop_name);
615 phandle = fdt_getprop(blob, node, prop_name, NULL);
617 return -FDT_ERR_NOTFOUND;
619 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
624 * Look up a property in a node and check that it has a minimum length.
626 * @param blob FDT blob
627 * @param node node to examine
628 * @param prop_name name of property to find
629 * @param min_len minimum property length in bytes
630 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
631 found, or -FDT_ERR_BADLAYOUT if not enough data
632 * @return pointer to cell, which is only valid if err == 0
634 static const void *get_prop_check_min_len(const void *blob, int node,
635 const char *prop_name, int min_len, int *err)
640 debug("%s: %s\n", __func__, prop_name);
641 cell = fdt_getprop(blob, node, prop_name, &len);
643 *err = -FDT_ERR_NOTFOUND;
644 else if (len < min_len)
645 *err = -FDT_ERR_BADLAYOUT;
651 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
652 u32 *array, int count)
657 debug("%s: %s\n", __func__, prop_name);
658 cell = get_prop_check_min_len(blob, node, prop_name,
659 sizeof(u32) * count, &err);
661 for (i = 0; i < count; i++)
662 array[i] = fdt32_to_cpu(cell[i]);
667 int fdtdec_get_int_array_count(const void *blob, int node,
668 const char *prop_name, u32 *array, int count)
674 debug("%s: %s\n", __func__, prop_name);
675 cell = fdt_getprop(blob, node, prop_name, &len);
677 return -FDT_ERR_NOTFOUND;
678 elems = len / sizeof(u32);
681 for (i = 0; i < count; i++)
682 array[i] = fdt32_to_cpu(cell[i]);
687 const u32 *fdtdec_locate_array(const void *blob, int node,
688 const char *prop_name, int count)
693 cell = get_prop_check_min_len(blob, node, prop_name,
694 sizeof(u32) * count, &err);
695 return err ? NULL : cell;
698 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
703 debug("%s: %s\n", __func__, prop_name);
704 cell = fdt_getprop(blob, node, prop_name, &len);
708 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
709 const char *list_name,
710 const char *cells_name,
711 int cell_count, int index,
712 struct fdtdec_phandle_args *out_args)
714 const __be32 *list, *list_end;
715 int rc = 0, size, cur_index = 0;
720 /* Retrieve the phandle list property */
721 list = fdt_getprop(blob, src_node, list_name, &size);
724 list_end = list + size / sizeof(*list);
726 /* Loop over the phandles until all the requested entry is found */
727 while (list < list_end) {
732 * If phandle is 0, then it is an empty entry with no
733 * arguments. Skip forward to the next entry.
735 phandle = be32_to_cpup(list++);
738 * Find the provider node and parse the #*-cells
739 * property to determine the argument length.
741 * This is not needed if the cell count is hard-coded
742 * (i.e. cells_name not set, but cell_count is set),
743 * except when we're going to return the found node
746 if (cells_name || cur_index == index) {
747 node = fdt_node_offset_by_phandle(blob,
750 debug("%s: could not find phandle\n",
751 fdt_get_name(blob, src_node,
758 count = fdtdec_get_int(blob, node, cells_name,
761 debug("%s: could not get %s for %s\n",
762 fdt_get_name(blob, src_node,
765 fdt_get_name(blob, node,
774 * Make sure that the arguments actually fit in the
775 * remaining property data length
777 if (list + count > list_end) {
778 debug("%s: arguments longer than property\n",
779 fdt_get_name(blob, src_node, NULL));
785 * All of the error cases above bail out of the loop, so at
786 * this point, the parsing is successful. If the requested
787 * index matches, then fill the out_args structure and return,
788 * or return -ENOENT for an empty entry.
791 if (cur_index == index) {
798 if (count > MAX_PHANDLE_ARGS) {
799 debug("%s: too many arguments %d\n",
800 fdt_get_name(blob, src_node,
802 count = MAX_PHANDLE_ARGS;
804 out_args->node = node;
805 out_args->args_count = count;
806 for (i = 0; i < count; i++) {
808 be32_to_cpup(list++);
812 /* Found it! return success */
822 * Result will be one of:
823 * -ENOENT : index is for empty phandle
824 * -EINVAL : parsing error on data
825 * [1..n] : Number of phandle (count mode; when index = -1)
827 rc = index < 0 ? cur_index : -ENOENT;
832 int fdtdec_get_child_count(const void *blob, int node)
837 fdt_for_each_subnode(blob, subnode, node)
843 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
844 u8 *array, int count)
849 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
851 memcpy(array, cell, count);
855 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
856 const char *prop_name, int count)
861 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
867 int fdtdec_get_config_int(const void *blob, const char *prop_name,
872 debug("%s: %s\n", __func__, prop_name);
873 config_node = fdt_path_offset(blob, "/config");
876 return fdtdec_get_int(blob, config_node, prop_name, default_val);
879 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
884 debug("%s: %s\n", __func__, prop_name);
885 config_node = fdt_path_offset(blob, "/config");
888 prop = fdt_get_property(blob, config_node, prop_name, NULL);
893 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
899 debug("%s: %s\n", __func__, prop_name);
900 nodeoffset = fdt_path_offset(blob, "/config");
904 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
908 return (char *)nodep;
911 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
912 fdt_addr_t *basep, fdt_size_t *sizep)
914 const fdt_addr_t *cell;
917 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
919 cell = fdt_getprop(blob, node, prop_name, &len);
920 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
921 debug("cell=%p, len=%d\n", cell, len);
925 *basep = fdt_addr_to_cpu(*cell);
926 *sizep = fdt_size_to_cpu(cell[1]);
927 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
934 * Read a flash entry from the fdt
936 * @param blob FDT blob
937 * @param node Offset of node to read
938 * @param name Name of node being read
939 * @param entry Place to put offset and size of this node
940 * @return 0 if ok, -ve on error
942 int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
943 struct fmap_entry *entry)
948 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
949 debug("Node '%s' has bad/missing 'reg' property\n", name);
950 return -FDT_ERR_NOTFOUND;
952 entry->offset = reg[0];
953 entry->length = reg[1];
954 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
955 prop = fdt_getprop(blob, node, "compress", NULL);
956 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
957 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
958 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
959 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
960 entry->hash = (uint8_t *)prop;
965 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
970 number = (number << 32) | fdt32_to_cpu(*ptr++);
975 int fdt_get_resource(const void *fdt, int node, const char *property,
976 unsigned int index, struct fdt_resource *res)
978 const fdt32_t *ptr, *end;
979 int na, ns, len, parent;
982 parent = fdt_parent_offset(fdt, node);
986 na = fdt_address_cells(fdt, parent);
987 ns = fdt_size_cells(fdt, parent);
989 ptr = fdt_getprop(fdt, node, property, &len);
993 end = ptr + len / sizeof(*ptr);
995 while (ptr + na + ns <= end) {
997 res->start = res->end = fdtdec_get_number(ptr, na);
998 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
1006 return -FDT_ERR_NOTFOUND;
1009 int fdt_get_named_resource(const void *fdt, int node, const char *property,
1010 const char *prop_names, const char *name,
1011 struct fdt_resource *res)
1015 index = fdt_find_string(fdt, node, prop_names, name);
1019 return fdt_get_resource(fdt, node, property, index, res);
1022 int fdtdec_decode_memory_region(const void *blob, int config_node,
1023 const char *mem_type, const char *suffix,
1024 fdt_addr_t *basep, fdt_size_t *sizep)
1028 fdt_size_t size, offset_size;
1029 fdt_addr_t base, offset;
1032 if (config_node == -1) {
1033 config_node = fdt_path_offset(blob, "/config");
1034 if (config_node < 0) {
1035 debug("%s: Cannot find /config node\n", __func__);
1042 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1044 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1046 debug("%s: No memory type for '%s', using /memory\n", __func__,
1051 node = fdt_path_offset(blob, mem);
1053 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1054 fdt_strerror(node));
1059 * Not strictly correct - the memory may have multiple banks. We just
1062 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1063 debug("%s: Failed to decode memory region %s\n", __func__,
1068 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1070 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1072 debug("%s: Failed to decode memory region '%s'\n", __func__,
1077 *basep = base + offset;
1078 *sizep = offset_size;
1083 static int decode_timing_property(const void *blob, int node, const char *name,
1084 struct timing_entry *result)
1086 int length, ret = 0;
1089 prop = fdt_getprop(blob, node, name, &length);
1091 debug("%s: could not find property %s\n",
1092 fdt_get_name(blob, node, NULL), name);
1096 if (length == sizeof(u32)) {
1097 result->typ = fdtdec_get_int(blob, node, name, 0);
1098 result->min = result->typ;
1099 result->max = result->typ;
1101 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1107 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1108 struct display_timing *dt)
1110 int i, node, timings_node;
1114 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1115 if (timings_node < 0)
1116 return timings_node;
1118 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1119 node > 0 && i != index;
1120 node = fdt_next_subnode(blob, node))
1126 memset(dt, 0, sizeof(*dt));
1128 ret |= decode_timing_property(blob, node, "hback-porch",
1130 ret |= decode_timing_property(blob, node, "hfront-porch",
1132 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1133 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1134 ret |= decode_timing_property(blob, node, "vback-porch",
1136 ret |= decode_timing_property(blob, node, "vfront-porch",
1138 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1139 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1140 ret |= decode_timing_property(blob, node, "clock-frequency",
1144 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1146 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1147 DISPLAY_FLAGS_VSYNC_LOW;
1149 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1151 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1152 DISPLAY_FLAGS_HSYNC_LOW;
1154 val = fdtdec_get_int(blob, node, "de-active", -1);
1156 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1157 DISPLAY_FLAGS_DE_LOW;
1159 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1161 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1162 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1165 if (fdtdec_get_bool(blob, node, "interlaced"))
1166 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1167 if (fdtdec_get_bool(blob, node, "doublescan"))
1168 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1169 if (fdtdec_get_bool(blob, node, "doubleclk"))
1170 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1175 int fdtdec_setup(void)
1177 #if CONFIG_IS_ENABLED(OF_CONTROL)
1178 # ifdef CONFIG_OF_EMBED
1179 /* Get a pointer to the FDT */
1180 gd->fdt_blob = __dtb_dt_begin;
1181 # elif defined CONFIG_OF_SEPARATE
1182 # ifdef CONFIG_SPL_BUILD
1183 /* FDT is at end of BSS unless it is in a different memory region */
1184 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1185 gd->fdt_blob = (ulong *)&_image_binary_end;
1187 gd->fdt_blob = (ulong *)&__bss_end;
1189 /* FDT is at end of image */
1190 gd->fdt_blob = (ulong *)&_end;
1192 # elif defined(CONFIG_OF_HOSTFILE)
1193 if (sandbox_read_fdt_from_file()) {
1194 puts("Failed to read control FDT\n");
1198 # ifndef CONFIG_SPL_BUILD
1199 /* Allow the early environment to override the fdt address */
1200 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1201 (uintptr_t)gd->fdt_blob);
1204 return fdtdec_prepare_fdt();
1207 #endif /* !USE_HOSTCC */