1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
9 #include <display_options.h>
19 #include <fdt_support.h>
22 #include <linux/libfdt.h>
24 #include <asm/global_data.h>
25 #include <asm/sections.h>
26 #include <dm/ofnode.h>
27 #include <dm/of_extra.h>
28 #include <linux/ctype.h>
29 #include <linux/lzo.h>
30 #include <linux/ioport.h>
32 DECLARE_GLOBAL_DATA_PTR;
35 * Here are the type we know about. One day we might allow drivers to
36 * register. For now we just put them here. The COMPAT macro allows us to
37 * turn this into a sparse list later, and keeps the ID with the name.
39 * NOTE: This list is basically a TODO list for things that need to be
40 * converted to driver model. So don't add new things here unless there is a
41 * good reason why driver-model conversion is infeasible. Examples include
42 * things which are used before driver model is available.
44 #define COMPAT(id, name) name
45 static const char * const compat_names[COMPAT_COUNT] = {
46 COMPAT(UNKNOWN, "<none>"),
47 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
48 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
49 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
50 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
51 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
52 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
53 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
54 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
55 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
56 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
57 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
58 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
59 COMPAT(INTEL_MICROCODE, "intel,microcode"),
60 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
61 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
62 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
63 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
64 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
65 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
66 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
67 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
68 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
69 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
70 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
71 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
74 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
75 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
76 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
77 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
78 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
81 static const char *const fdt_src_name[] = {
82 [FDTSRC_SEPARATE] = "separate",
84 [FDTSRC_BOARD] = "board",
85 [FDTSRC_EMBED] = "embed",
89 const char *fdtdec_get_srcname(void)
91 return fdt_src_name[gd->fdt_src];
94 const char *fdtdec_get_compatible(enum fdt_compat_id id)
96 /* We allow reading of the 'unknown' ID for testing purposes */
97 assert(id >= 0 && id < COMPAT_COUNT);
98 return compat_names[id];
101 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
102 const char *prop_name, int index, int na,
103 int ns, fdt_size_t *sizep,
106 const fdt32_t *prop, *prop_end;
107 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
111 debug("%s: %s: ", __func__, prop_name);
113 prop = fdt_getprop(blob, node, prop_name, &len);
115 debug("(not found)\n");
116 return FDT_ADDR_T_NONE;
118 prop_end = prop + (len / sizeof(*prop));
120 prop_addr = prop + (index * (na + ns));
121 prop_size = prop_addr + na;
122 prop_after_size = prop_size + ns;
123 if (prop_after_size > prop_end) {
124 debug("(not enough data: expected >= %d cells, got %d cells)\n",
125 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
126 return FDT_ADDR_T_NONE;
129 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
131 addr = fdt_translate_address(blob, node, prop_addr);
134 addr = fdtdec_get_number(prop_addr, na);
137 *sizep = fdtdec_get_number(prop_size, ns);
138 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
139 (unsigned long long)*sizep);
141 debug("addr=%08llx\n", (unsigned long long)addr);
147 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
148 int node, const char *prop_name,
149 int index, fdt_size_t *sizep,
154 debug("%s: ", __func__);
156 na = fdt_address_cells(blob, parent);
158 debug("(bad #address-cells)\n");
159 return FDT_ADDR_T_NONE;
162 ns = fdt_size_cells(blob, parent);
164 debug("(bad #size-cells)\n");
165 return FDT_ADDR_T_NONE;
168 debug("na=%d, ns=%d, ", na, ns);
170 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
171 ns, sizep, translate);
174 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
175 const char *prop_name, int index,
181 debug("%s: ", __func__);
183 parent = fdt_parent_offset(blob, node);
185 debug("(no parent found)\n");
186 return FDT_ADDR_T_NONE;
189 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
190 index, sizep, translate);
193 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
194 const char *prop_name, fdt_size_t *sizep)
196 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
198 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
199 sizeof(fdt_addr_t) / sizeof(fdt32_t),
203 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
205 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
208 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
210 const char *list, *end;
213 list = fdt_getprop(blob, node, "compatible", &len);
220 if (len >= strlen("pciVVVV,DDDD")) {
221 char *s = strstr(list, "pci");
224 * check if the string is something like pciVVVV,DDDD.RR
225 * or just pciVVVV,DDDD
227 if (s && s[7] == ',' &&
228 (s[12] == '.' || s[12] == 0)) {
230 *vendor = simple_strtol(s, NULL, 16);
233 *device = simple_strtol(s, NULL, 16);
244 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
249 /* extract the bar number from fdt_pci_addr */
250 barnum = addr->phys_hi & 0xff;
251 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
254 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
256 *bar = dm_pci_read_bar32(dev, barnum);
261 int fdtdec_get_pci_bus_range(const void *blob, int node,
262 struct fdt_resource *res)
267 values = fdt_getprop(blob, node, "bus-range", &len);
268 if (!values || len < sizeof(*values) * 2)
271 res->start = fdt32_to_cpu(*values++);
272 res->end = fdt32_to_cpu(*values);
277 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
278 uint64_t default_val)
280 const unaligned_fdt64_t *cell64;
283 cell64 = fdt_getprop(blob, node, prop_name, &length);
284 if (!cell64 || length < sizeof(*cell64))
287 return fdt64_to_cpu(*cell64);
290 int fdtdec_get_is_enabled(const void *blob, int node)
295 * It should say "okay", so only allow that. Some fdts use "ok" but
296 * this is a bug. Please fix your device tree source file. See here
299 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
301 cell = fdt_getprop(blob, node, "status", NULL);
303 return strcmp(cell, "okay") == 0;
307 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
309 enum fdt_compat_id id;
311 /* Search our drivers */
312 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
313 if (fdt_node_check_compatible(blob, node,
314 compat_names[id]) == 0)
316 return COMPAT_UNKNOWN;
319 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
321 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
324 int fdtdec_next_compatible_subnode(const void *blob, int node,
325 enum fdt_compat_id id, int *depthp)
328 node = fdt_next_node(blob, node, depthp);
329 } while (*depthp > 1);
331 /* If this is a direct subnode, and compatible, return it */
332 if (*depthp == 1 && 0 == fdt_node_check_compatible(
333 blob, node, compat_names[id]))
336 return -FDT_ERR_NOTFOUND;
339 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
342 #define MAX_STR_LEN 20
343 char str[MAX_STR_LEN + 20];
346 /* snprintf() is not available */
347 assert(strlen(name) < MAX_STR_LEN);
348 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
349 node = fdt_path_offset(blob, str);
352 err = fdt_node_check_compatible(blob, node, compat_names[id]);
356 return -FDT_ERR_NOTFOUND;
361 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
362 enum fdt_compat_id id, int *node_list,
365 memset(node_list, '\0', sizeof(*node_list) * maxcount);
367 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
370 /* TODO: Can we tighten this code up a little? */
371 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
372 enum fdt_compat_id id, int *node_list,
375 int name_len = strlen(name);
383 /* find the alias node if present */
384 alias_node = fdt_path_offset(blob, "/aliases");
387 * start with nothing, and we can assume that the root node can't
390 memset(nodes, '\0', sizeof(nodes));
392 /* First find all the compatible nodes */
393 for (node = count = 0; node >= 0 && count < maxcount;) {
394 node = fdtdec_next_compatible(blob, node, id);
396 nodes[count++] = node;
399 debug("%s: warning: maxcount exceeded with alias '%s'\n",
402 /* Now find all the aliases */
403 for (offset = fdt_first_property_offset(blob, alias_node);
405 offset = fdt_next_property_offset(blob, offset)) {
406 const struct fdt_property *prop;
412 prop = fdt_get_property_by_offset(blob, offset, NULL);
413 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
414 if (prop->len && 0 == strncmp(path, name, name_len))
415 node = fdt_path_offset(blob, prop->data);
419 /* Get the alias number */
420 number = dectoul(path + name_len, NULL);
421 if (number < 0 || number >= maxcount) {
422 debug("%s: warning: alias '%s' is out of range\n",
427 /* Make sure the node we found is actually in our list! */
429 for (j = 0; j < count; j++)
430 if (nodes[j] == node) {
436 debug("%s: warning: alias '%s' points to a node "
437 "'%s' that is missing or is not compatible "
438 " with '%s'\n", __func__, path,
439 fdt_get_name(blob, node, NULL),
445 * Add this node to our list in the right place, and mark
448 if (fdtdec_get_is_enabled(blob, node)) {
449 if (node_list[number]) {
450 debug("%s: warning: alias '%s' requires that "
451 "a node be placed in the list in a "
452 "position which is already filled by "
453 "node '%s'\n", __func__, path,
454 fdt_get_name(blob, node, NULL));
457 node_list[number] = node;
458 if (number >= num_found)
459 num_found = number + 1;
464 /* Add any nodes not mentioned by an alias */
465 for (i = j = 0; i < maxcount; i++) {
467 for (; j < maxcount; j++)
469 fdtdec_get_is_enabled(blob, nodes[j]))
472 /* Have we run out of nodes to add? */
476 assert(!node_list[i]);
477 node_list[i] = nodes[j++];
486 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
489 int base_len = strlen(base);
490 const char *find_name;
495 find_name = fdt_get_name(blob, offset, &find_namelen);
496 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
498 aliases = fdt_path_offset(blob, "/aliases");
499 for (prop_offset = fdt_first_property_offset(blob, aliases);
501 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
507 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
508 debug(" - %s, %s\n", name, prop);
509 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
510 strncmp(name, base, base_len))
513 slash = strrchr(prop, '/');
514 if (strcmp(slash + 1, find_name))
518 * Adding an extra check to distinguish DT nodes with
521 if (offset != fdt_path_offset(blob, prop))
524 val = trailing_strtol(name);
527 debug("Found seq %d\n", *seqp);
532 debug("Not found\n");
536 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
538 int base_len = strlen(base);
543 debug("Looking for highest alias id for '%s'\n", base);
545 aliases = fdt_path_offset(blob, "/aliases");
546 for (prop_offset = fdt_first_property_offset(blob, aliases);
548 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
553 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
554 debug(" - %s, %s\n", name, prop);
555 if (*prop != '/' || prop[len - 1] ||
556 strncmp(name, base, base_len))
559 val = trailing_strtol(name);
561 debug("Found seq %d\n", val);
569 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
575 chosen_node = fdt_path_offset(blob, "/chosen");
576 return fdt_getprop(blob, chosen_node, name, NULL);
579 int fdtdec_get_chosen_node(const void *blob, const char *name)
583 prop = fdtdec_get_chosen_prop(blob, name);
585 return -FDT_ERR_NOTFOUND;
586 return fdt_path_offset(blob, prop);
589 int fdtdec_check_fdt(void)
592 * We must have an FDT, but we cannot panic() yet since the console
593 * is not ready. So for now, just assert(). Boards which need an early
594 * FDT (prior to console ready) will need to make their own
595 * arrangements and do their own checks.
597 assert(!fdtdec_prepare_fdt());
602 * This function is a little odd in that it accesses global data. At some
603 * point if the architecture board.c files merge this will make more sense.
604 * Even now, it is common code.
606 int fdtdec_prepare_fdt(void)
608 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
609 fdt_check_header(gd->fdt_blob)) {
610 #ifdef CONFIG_SPL_BUILD
611 puts("Missing DTB\n");
613 printf("No valid device tree binary found at %p\n",
617 printf("fdt_blob=%p\n", gd->fdt_blob);
618 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
628 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
633 debug("%s: %s\n", __func__, prop_name);
634 phandle = fdt_getprop(blob, node, prop_name, NULL);
636 return -FDT_ERR_NOTFOUND;
638 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
643 * Look up a property in a node and check that it has a minimum length.
645 * @param blob FDT blob
646 * @param node node to examine
647 * @param prop_name name of property to find
648 * @param min_len minimum property length in bytes
649 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
650 found, or -FDT_ERR_BADLAYOUT if not enough data
651 * Return: pointer to cell, which is only valid if err == 0
653 static const void *get_prop_check_min_len(const void *blob, int node,
654 const char *prop_name, int min_len,
660 debug("%s: %s\n", __func__, prop_name);
661 cell = fdt_getprop(blob, node, prop_name, &len);
663 *err = -FDT_ERR_NOTFOUND;
664 else if (len < min_len)
665 *err = -FDT_ERR_BADLAYOUT;
671 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
672 u32 *array, int count)
677 debug("%s: %s\n", __func__, prop_name);
678 cell = get_prop_check_min_len(blob, node, prop_name,
679 sizeof(u32) * count, &err);
683 for (i = 0; i < count; i++)
684 array[i] = fdt32_to_cpu(cell[i]);
689 int fdtdec_get_int_array_count(const void *blob, int node,
690 const char *prop_name, u32 *array, int count)
696 debug("%s: %s\n", __func__, prop_name);
697 cell = fdt_getprop(blob, node, prop_name, &len);
699 return -FDT_ERR_NOTFOUND;
700 elems = len / sizeof(u32);
703 for (i = 0; i < count; i++)
704 array[i] = fdt32_to_cpu(cell[i]);
709 const u32 *fdtdec_locate_array(const void *blob, int node,
710 const char *prop_name, int count)
715 cell = get_prop_check_min_len(blob, node, prop_name,
716 sizeof(u32) * count, &err);
717 return err ? NULL : cell;
720 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
725 debug("%s: %s\n", __func__, prop_name);
726 cell = fdt_getprop(blob, node, prop_name, &len);
730 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
731 const char *list_name,
732 const char *cells_name,
733 int cell_count, int index,
734 struct fdtdec_phandle_args *out_args)
736 const __be32 *list, *list_end;
737 int rc = 0, size, cur_index = 0;
742 /* Retrieve the phandle list property */
743 list = fdt_getprop(blob, src_node, list_name, &size);
746 list_end = list + size / sizeof(*list);
748 /* Loop over the phandles until all the requested entry is found */
749 while (list < list_end) {
754 * If phandle is 0, then it is an empty entry with no
755 * arguments. Skip forward to the next entry.
757 phandle = be32_to_cpup(list++);
760 * Find the provider node and parse the #*-cells
761 * property to determine the argument length.
763 * This is not needed if the cell count is hard-coded
764 * (i.e. cells_name not set, but cell_count is set),
765 * except when we're going to return the found node
768 if (cells_name || cur_index == index) {
769 node = fdt_node_offset_by_phandle(blob,
772 debug("%s: could not find phandle\n",
773 fdt_get_name(blob, src_node,
780 count = fdtdec_get_int(blob, node, cells_name,
783 debug("%s: could not get %s for %s\n",
784 fdt_get_name(blob, src_node,
787 fdt_get_name(blob, node,
796 * Make sure that the arguments actually fit in the
797 * remaining property data length
799 if (list + count > list_end) {
800 debug("%s: arguments longer than property\n",
801 fdt_get_name(blob, src_node, NULL));
807 * All of the error cases above bail out of the loop, so at
808 * this point, the parsing is successful. If the requested
809 * index matches, then fill the out_args structure and return,
810 * or return -ENOENT for an empty entry.
813 if (cur_index == index) {
820 if (count > MAX_PHANDLE_ARGS) {
821 debug("%s: too many arguments %d\n",
822 fdt_get_name(blob, src_node,
824 count = MAX_PHANDLE_ARGS;
826 out_args->node = node;
827 out_args->args_count = count;
828 for (i = 0; i < count; i++) {
830 be32_to_cpup(list++);
834 /* Found it! return success */
844 * Result will be one of:
845 * -ENOENT : index is for empty phandle
846 * -EINVAL : parsing error on data
847 * [1..n] : Number of phandle (count mode; when index = -1)
849 rc = index < 0 ? cur_index : -ENOENT;
854 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
855 u8 *array, int count)
860 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
862 memcpy(array, cell, count);
866 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
867 const char *prop_name, int count)
872 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
878 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
883 number = (number << 32) | fdt32_to_cpu(*ptr++);
888 int fdt_get_resource(const void *fdt, int node, const char *property,
889 unsigned int index, struct fdt_resource *res)
891 const fdt32_t *ptr, *end;
892 int na, ns, len, parent;
895 parent = fdt_parent_offset(fdt, node);
899 na = fdt_address_cells(fdt, parent);
900 ns = fdt_size_cells(fdt, parent);
902 ptr = fdt_getprop(fdt, node, property, &len);
906 end = ptr + len / sizeof(*ptr);
908 while (ptr + na + ns <= end) {
910 if (CONFIG_IS_ENABLED(OF_TRANSLATE))
911 res->start = fdt_translate_address(fdt, node, ptr);
913 res->start = fdtdec_get_number(ptr, na);
915 res->end = res->start;
916 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
924 return -FDT_ERR_NOTFOUND;
927 int fdt_get_named_resource(const void *fdt, int node, const char *property,
928 const char *prop_names, const char *name,
929 struct fdt_resource *res)
933 index = fdt_stringlist_search(fdt, node, prop_names, name);
937 return fdt_get_resource(fdt, node, property, index, res);
940 static int decode_timing_property(const void *blob, int node, const char *name,
941 struct timing_entry *result)
946 prop = fdt_getprop(blob, node, name, &length);
948 debug("%s: could not find property %s\n",
949 fdt_get_name(blob, node, NULL), name);
953 if (length == sizeof(u32)) {
954 result->typ = fdtdec_get_int(blob, node, name, 0);
955 result->min = result->typ;
956 result->max = result->typ;
958 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
964 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
965 struct display_timing *dt)
967 int i, node, timings_node;
971 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
972 if (timings_node < 0)
975 for (i = 0, node = fdt_first_subnode(blob, timings_node);
976 node > 0 && i != index;
977 node = fdt_next_subnode(blob, node))
983 memset(dt, 0, sizeof(*dt));
985 ret |= decode_timing_property(blob, node, "hback-porch",
987 ret |= decode_timing_property(blob, node, "hfront-porch",
989 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
990 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
991 ret |= decode_timing_property(blob, node, "vback-porch",
993 ret |= decode_timing_property(blob, node, "vfront-porch",
995 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
996 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
997 ret |= decode_timing_property(blob, node, "clock-frequency",
1001 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1003 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1004 DISPLAY_FLAGS_VSYNC_LOW;
1006 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1008 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1009 DISPLAY_FLAGS_HSYNC_LOW;
1011 val = fdtdec_get_int(blob, node, "de-active", -1);
1013 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1014 DISPLAY_FLAGS_DE_LOW;
1016 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1018 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1019 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1022 if (fdtdec_get_bool(blob, node, "interlaced"))
1023 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1024 if (fdtdec_get_bool(blob, node, "doublescan"))
1025 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1026 if (fdtdec_get_bool(blob, node, "doubleclk"))
1027 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1032 int fdtdec_setup_mem_size_base(void)
1036 struct resource res;
1038 mem = ofnode_path("/memory");
1039 if (!ofnode_valid(mem)) {
1040 debug("%s: Missing /memory node\n", __func__);
1044 ret = ofnode_read_resource(mem, 0, &res);
1046 debug("%s: Unable to decode first memory bank\n", __func__);
1050 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1051 gd->ram_base = (unsigned long)res.start;
1052 debug("%s: Initial DRAM size %llx\n", __func__,
1053 (unsigned long long)gd->ram_size);
1058 ofnode get_next_memory_node(ofnode mem)
1061 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
1062 } while (!ofnode_is_enabled(mem));
1067 int fdtdec_setup_memory_banksize(void)
1069 int bank, ret, reg = 0;
1070 struct resource res;
1071 ofnode mem = ofnode_null();
1073 mem = get_next_memory_node(mem);
1074 if (!ofnode_valid(mem)) {
1075 debug("%s: Missing /memory node\n", __func__);
1079 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1080 ret = ofnode_read_resource(mem, reg++, &res);
1083 mem = get_next_memory_node(mem);
1084 if (!ofnode_valid(mem))
1087 ret = ofnode_read_resource(mem, reg++, &res);
1095 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1096 gd->bd->bi_dram[bank].size =
1097 (phys_size_t)(res.end - res.start + 1);
1099 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1101 (unsigned long long)gd->bd->bi_dram[bank].start,
1102 (unsigned long long)gd->bd->bi_dram[bank].size);
1108 int fdtdec_setup_mem_size_base_lowest(void)
1110 int bank, ret, reg = 0;
1111 struct resource res;
1114 ofnode mem = ofnode_null();
1116 gd->ram_base = (unsigned long)~0;
1118 mem = get_next_memory_node(mem);
1119 if (!ofnode_valid(mem)) {
1120 debug("%s: Missing /memory node\n", __func__);
1124 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1125 ret = ofnode_read_resource(mem, reg++, &res);
1128 mem = get_next_memory_node(mem);
1129 if (!ofnode_valid(mem))
1132 ret = ofnode_read_resource(mem, reg++, &res);
1140 base = (unsigned long)res.start;
1141 size = (phys_size_t)(res.end - res.start + 1);
1143 if (gd->ram_base > base && size) {
1144 gd->ram_base = base;
1145 gd->ram_size = size;
1146 debug("%s: Initial DRAM base %lx size %lx\n",
1147 __func__, base, (unsigned long)size);
1154 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1156 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1157 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1158 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1159 bool gzip = 0, lzo = 0;
1160 ulong sz_in = sz_src;
1164 if (CONFIG_IS_ENABLED(GZIP))
1165 if (gzip_parse_header(src, sz_in) >= 0)
1167 if (CONFIG_IS_ENABLED(LZO))
1168 if (!gzip && lzop_is_valid_header(src))
1175 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1176 dst = malloc(sz_out);
1178 puts("uncompress_blob: Unable to allocate memory\n");
1182 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1183 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1189 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1190 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1191 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1192 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1197 /* not a valid compressed blob */
1198 puts("uncompress_blob: Unable to uncompress\n");
1199 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1205 *dstp = (void *)src;
1206 *dstp = (void *)src;
1212 * fdt_find_separate() - Find a devicetree at the end of the image
1214 * Return: pointer to FDT blob
1216 static void *fdt_find_separate(void)
1218 void *fdt_blob = NULL;
1220 if (IS_ENABLED(CONFIG_SANDBOX))
1223 #ifdef CONFIG_SPL_BUILD
1224 /* FDT is at end of BSS unless it is in a different memory region */
1225 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1226 fdt_blob = (ulong *)&_image_binary_end;
1228 fdt_blob = (ulong *)&__bss_end;
1230 /* FDT is at end of image */
1231 fdt_blob = (ulong *)&_end;
1237 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1242 if (!is_valid_ethaddr(mac))
1245 path = fdt_get_alias(fdt, "ethernet");
1249 debug("ethernet alias found: %s\n", path);
1251 offset = fdt_path_offset(fdt, path);
1253 debug("ethernet alias points to absent node %s\n", path);
1257 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1261 debug("MAC address: %pM\n", mac);
1266 static int fdtdec_init_reserved_memory(void *blob)
1268 int na, ns, node, err;
1271 /* inherit #address-cells and #size-cells from the root node */
1272 na = fdt_address_cells(blob, 0);
1273 ns = fdt_size_cells(blob, 0);
1275 node = fdt_add_subnode(blob, 0, "reserved-memory");
1279 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1283 value = cpu_to_fdt32(ns);
1285 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1289 value = cpu_to_fdt32(na);
1291 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1298 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1299 const struct fdt_memory *carveout,
1300 const char **compatibles, unsigned int count,
1301 uint32_t *phandlep, unsigned long flags)
1303 fdt32_t cells[4] = {}, *ptr = cells;
1304 uint32_t upper, lower, phandle;
1305 int parent, node, na, ns, err;
1309 /* create an empty /reserved-memory node if one doesn't exist */
1310 parent = fdt_path_offset(blob, "/reserved-memory");
1312 parent = fdtdec_init_reserved_memory(blob);
1317 /* only 1 or 2 #address-cells and #size-cells are supported */
1318 na = fdt_address_cells(blob, parent);
1319 if (na < 1 || na > 2)
1320 return -FDT_ERR_BADNCELLS;
1322 ns = fdt_size_cells(blob, parent);
1323 if (ns < 1 || ns > 2)
1324 return -FDT_ERR_BADNCELLS;
1326 /* find a matching node and return the phandle to that */
1327 fdt_for_each_subnode(node, blob, parent) {
1328 const char *name = fdt_get_name(blob, node, NULL);
1332 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1334 if (addr == FDT_ADDR_T_NONE) {
1335 debug("failed to read address/size for %s\n", name);
1339 if (addr == carveout->start && (addr + size - 1) ==
1342 *phandlep = fdt_get_phandle(blob, node);
1348 * Unpack the start address and generate the name of the new node
1349 * base on the basename and the unit-address.
1351 upper = upper_32_bits(carveout->start);
1352 lower = lower_32_bits(carveout->start);
1354 if (na > 1 && upper > 0)
1355 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1359 debug("address %08x:%08x exceeds addressable space\n",
1361 return -FDT_ERR_BADVALUE;
1364 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1367 node = fdt_add_subnode(blob, parent, name);
1371 if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) {
1372 err = fdt_setprop(blob, node, "no-map", NULL, 0);
1378 err = fdt_generate_phandle(blob, &phandle);
1382 err = fdtdec_set_phandle(blob, node, phandle);
1387 /* store one or two address cells */
1389 *ptr++ = cpu_to_fdt32(upper);
1391 *ptr++ = cpu_to_fdt32(lower);
1393 /* store one or two size cells */
1394 size = carveout->end - carveout->start + 1;
1395 upper = upper_32_bits(size);
1396 lower = lower_32_bits(size);
1399 *ptr++ = cpu_to_fdt32(upper);
1401 *ptr++ = cpu_to_fdt32(lower);
1403 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1407 if (compatibles && count > 0) {
1408 size_t length = 0, len = 0;
1412 for (i = 0; i < count; i++)
1413 length += strlen(compatibles[i]) + 1;
1415 buffer = malloc(length);
1417 return -FDT_ERR_INTERNAL;
1419 for (i = 0; i < count; i++)
1420 len += strlcpy(buffer + len, compatibles[i],
1423 err = fdt_setprop(blob, node, "compatible", buffer, length);
1429 /* return the phandle for the new node for the caller to use */
1431 *phandlep = phandle;
1436 int fdtdec_get_carveout(const void *blob, const char *node,
1437 const char *prop_name, unsigned int index,
1438 struct fdt_memory *carveout, const char **name,
1439 const char ***compatiblesp, unsigned int *countp,
1440 unsigned long *flags)
1442 const fdt32_t *prop;
1447 offset = fdt_path_offset(blob, node);
1451 prop = fdt_getprop(blob, offset, prop_name, &len);
1453 debug("failed to get %s for %s\n", prop_name, node);
1454 return -FDT_ERR_NOTFOUND;
1457 if ((len % sizeof(phandle)) != 0) {
1458 debug("invalid phandle property\n");
1459 return -FDT_ERR_BADPHANDLE;
1462 if (len < (sizeof(phandle) * (index + 1))) {
1463 debug("invalid phandle index\n");
1464 return -FDT_ERR_NOTFOUND;
1467 phandle = fdt32_to_cpu(prop[index]);
1469 offset = fdt_node_offset_by_phandle(blob, phandle);
1471 debug("failed to find node for phandle %u\n", phandle);
1476 *name = fdt_get_name(blob, offset, NULL);
1479 const char **compatibles = NULL;
1480 const char *start, *end, *ptr;
1481 unsigned int count = 0;
1483 prop = fdt_getprop(blob, offset, "compatible", &len);
1487 start = ptr = (const char *)prop;
1491 ptr = strchrnul(ptr, '\0');
1496 compatibles = malloc(sizeof(ptr) * count);
1498 return -FDT_ERR_INTERNAL;
1504 compatibles[count] = ptr;
1505 ptr = strchrnul(ptr, '\0');
1511 *compatiblesp = compatibles;
1517 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1520 if (carveout->start == FDT_ADDR_T_NONE) {
1521 debug("failed to read address/size from \"reg\" property\n");
1522 return -FDT_ERR_NOTFOUND;
1525 carveout->end = carveout->start + size - 1;
1530 if (fdtdec_get_bool(blob, offset, "no-map"))
1531 *flags |= FDTDEC_RESERVED_MEMORY_NO_MAP;
1537 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1538 unsigned int index, const struct fdt_memory *carveout,
1539 const char *name, const char **compatibles,
1540 unsigned int count, unsigned long flags)
1543 int err, offset, len;
1547 err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles,
1548 count, &phandle, flags);
1550 debug("failed to add reserved memory: %d\n", err);
1554 offset = fdt_path_offset(blob, node);
1556 debug("failed to find offset for node %s: %d\n", node, offset);
1560 value = cpu_to_fdt32(phandle);
1562 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1563 if (len == -FDT_ERR_NOTFOUND)
1569 if ((index + 1) * sizeof(value) > len) {
1570 err = fdt_setprop_placeholder(blob, offset, prop_name,
1571 (index + 1) * sizeof(value),
1574 debug("failed to resize reserved memory property: %s\n",
1580 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1582 index * sizeof(value),
1583 &value, sizeof(value));
1585 debug("failed to update %s property for node %s: %s\n",
1586 prop_name, node, fdt_strerror(err));
1593 /* TODO(sjg@chromium.org): This function should not be weak */
1594 __weak int fdtdec_board_setup(const void *fdt_blob)
1600 * setup_multi_dtb_fit() - locate the correct dtb from a FIT
1602 * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a
1605 * It accepts the current value of gd->fdt_blob, which points to the FIT, then
1606 * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the
1609 static void setup_multi_dtb_fit(void)
1614 * Try and uncompress the blob.
1615 * Unfortunately there is no way to know how big the input blob really
1616 * is. So let us set the maximum input size arbitrarily high. 16MB
1617 * ought to be more than enough for packed DTBs.
1619 if (uncompress_blob(gd->fdt_blob, 0x1000000, &blob) == 0)
1620 gd->fdt_blob = blob;
1623 * Check if blob is a FIT images containings DTBs.
1624 * If so, pick the most relevant
1626 blob = locate_dtb_in_fit(gd->fdt_blob);
1628 gd_set_multi_dtb_fit(gd->fdt_blob);
1629 gd->fdt_blob = blob;
1630 gd->fdt_src = FDTSRC_FIT;
1634 int fdtdec_setup(void)
1638 /* The devicetree is typically appended to U-Boot */
1639 if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
1640 gd->fdt_blob = fdt_find_separate();
1641 gd->fdt_src = FDTSRC_SEPARATE;
1642 } else { /* embed dtb in ELF file for testing / development */
1643 gd->fdt_blob = dtb_dt_embedded();
1644 gd->fdt_src = FDTSRC_EMBED;
1647 /* Allow the board to override the fdt address. */
1648 if (IS_ENABLED(CONFIG_OF_BOARD)) {
1649 gd->fdt_blob = board_fdt_blob_setup(&ret);
1652 gd->fdt_src = FDTSRC_BOARD;
1655 /* Allow the early environment to override the fdt address */
1656 if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
1659 addr = env_get_hex("fdtcontroladdr", 0);
1661 gd->fdt_blob = map_sysmem(addr, 0);
1662 gd->fdt_src = FDTSRC_ENV;
1666 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT))
1667 setup_multi_dtb_fit();
1669 ret = fdtdec_prepare_fdt();
1671 ret = fdtdec_board_setup(gd->fdt_blob);
1677 int fdtdec_resetup(int *rescan)
1682 * If the current DTB is part of a compressed FIT image,
1683 * try to locate the best match from the uncompressed
1684 * FIT image stillpresent there. Save the time and space
1685 * required to uncompress it again.
1687 if (gd_multi_dtb_fit()) {
1688 fdt_blob = locate_dtb_in_fit(gd_multi_dtb_fit());
1690 if (fdt_blob == gd->fdt_blob) {
1692 * The best match did not change. no need to tear down
1693 * the DM and rescan the fdt.
1700 gd->fdt_blob = fdt_blob;
1701 return fdtdec_prepare_fdt();
1705 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1706 * not a FIT image containings DTB, but a single DTB. There is no need
1707 * to teard down DM and rescan the DT in this case.
1713 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1714 phys_addr_t *basep, phys_size_t *sizep,
1717 int addr_cells, size_cells;
1718 const u32 *cell, *end;
1719 u64 total_size, size, addr;
1725 debug("%s: board_id=%d\n", __func__, board_id);
1728 node = fdt_path_offset(blob, area);
1730 debug("No %s node found\n", area);
1734 cell = fdt_getprop(blob, node, "reg", &len);
1736 debug("No reg property found\n");
1740 addr_cells = fdt_address_cells(blob, node);
1741 size_cells = fdt_size_cells(blob, node);
1743 /* Check the board id and mask */
1744 for (child = fdt_first_subnode(blob, node);
1746 child = fdt_next_subnode(blob, child)) {
1747 int match_mask, match_value;
1749 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1750 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1752 if (match_value >= 0 &&
1753 ((board_id & match_mask) == match_value)) {
1754 /* Found matching mask */
1755 debug("Found matching mask %d\n", match_mask);
1757 cell = fdt_getprop(blob, node, "reg", &len);
1759 debug("No memory-banks property found\n");
1765 /* Note: if no matching subnode was found we use the parent node */
1768 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1769 CONFIG_NR_DRAM_BANKS);
1772 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1775 end = cell + len / 4 - addr_cells - size_cells;
1776 debug("cell at %p, end %p\n", cell, end);
1777 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1781 if (addr_cells == 2)
1782 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1783 addr += fdt32_to_cpu(*cell++);
1785 bd->bi_dram[bank].start = addr;
1787 *basep = (phys_addr_t)addr;
1790 if (size_cells == 2)
1791 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1792 size += fdt32_to_cpu(*cell++);
1797 debug("Auto-sizing %llx, size %llx: ", addr, size);
1798 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1799 if (new_size == size) {
1802 debug("sized to %llx\n", new_size);
1808 bd->bi_dram[bank].size = size;
1812 debug("Memory size %llu\n", total_size);
1814 *sizep = (phys_size_t)total_size;
1819 #endif /* !USE_HOSTCC */