1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
15 #include <dm/of_extra.h>
19 #include <fdt_support.h>
22 #include <linux/libfdt.h>
24 #include <asm/global_data.h>
25 #include <asm/sections.h>
26 #include <linux/ctype.h>
27 #include <linux/lzo.h>
28 #include <linux/ioport.h>
30 DECLARE_GLOBAL_DATA_PTR;
33 * Here are the type we know about. One day we might allow drivers to
34 * register. For now we just put them here. The COMPAT macro allows us to
35 * turn this into a sparse list later, and keeps the ID with the name.
37 * NOTE: This list is basically a TODO list for things that need to be
38 * converted to driver model. So don't add new things here unless there is a
39 * good reason why driver-model conversion is infeasible. Examples include
40 * things which are used before driver model is available.
42 #define COMPAT(id, name) name
43 static const char * const compat_names[COMPAT_COUNT] = {
44 COMPAT(UNKNOWN, "<none>"),
45 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
46 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
47 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
48 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
49 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
50 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
51 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
52 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
53 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
54 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
55 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
56 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
57 COMPAT(INTEL_MICROCODE, "intel,microcode"),
58 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
61 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
62 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
75 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
76 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
79 static const char *const fdt_src_name[] = {
80 [FDTSRC_SEPARATE] = "separate",
82 [FDTSRC_BOARD] = "board",
83 [FDTSRC_EMBED] = "embed",
87 const char *fdtdec_get_srcname(void)
89 return fdt_src_name[gd->fdt_src];
92 const char *fdtdec_get_compatible(enum fdt_compat_id id)
94 /* We allow reading of the 'unknown' ID for testing purposes */
95 assert(id >= 0 && id < COMPAT_COUNT);
96 return compat_names[id];
99 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
100 const char *prop_name, int index, int na,
101 int ns, fdt_size_t *sizep,
104 const fdt32_t *prop, *prop_end;
105 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
109 debug("%s: %s: ", __func__, prop_name);
111 prop = fdt_getprop(blob, node, prop_name, &len);
113 debug("(not found)\n");
114 return FDT_ADDR_T_NONE;
116 prop_end = prop + (len / sizeof(*prop));
118 prop_addr = prop + (index * (na + ns));
119 prop_size = prop_addr + na;
120 prop_after_size = prop_size + ns;
121 if (prop_after_size > prop_end) {
122 debug("(not enough data: expected >= %d cells, got %d cells)\n",
123 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
124 return FDT_ADDR_T_NONE;
127 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
129 addr = fdt_translate_address(blob, node, prop_addr);
132 addr = fdtdec_get_number(prop_addr, na);
135 *sizep = fdtdec_get_number(prop_size, ns);
136 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
137 (unsigned long long)*sizep);
139 debug("addr=%08llx\n", (unsigned long long)addr);
145 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
146 int node, const char *prop_name,
147 int index, fdt_size_t *sizep,
152 debug("%s: ", __func__);
154 na = fdt_address_cells(blob, parent);
156 debug("(bad #address-cells)\n");
157 return FDT_ADDR_T_NONE;
160 ns = fdt_size_cells(blob, parent);
162 debug("(bad #size-cells)\n");
163 return FDT_ADDR_T_NONE;
166 debug("na=%d, ns=%d, ", na, ns);
168 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
169 ns, sizep, translate);
172 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
173 const char *prop_name, int index,
179 debug("%s: ", __func__);
181 parent = fdt_parent_offset(blob, node);
183 debug("(no parent found)\n");
184 return FDT_ADDR_T_NONE;
187 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
188 index, sizep, translate);
191 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
192 const char *prop_name, fdt_size_t *sizep)
194 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
196 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
197 sizeof(fdt_addr_t) / sizeof(fdt32_t),
201 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
203 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
206 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
208 const char *list, *end;
211 list = fdt_getprop(blob, node, "compatible", &len);
218 if (len >= strlen("pciVVVV,DDDD")) {
219 char *s = strstr(list, "pci");
222 * check if the string is something like pciVVVV,DDDD.RR
223 * or just pciVVVV,DDDD
225 if (s && s[7] == ',' &&
226 (s[12] == '.' || s[12] == 0)) {
228 *vendor = simple_strtol(s, NULL, 16);
231 *device = simple_strtol(s, NULL, 16);
242 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
247 /* extract the bar number from fdt_pci_addr */
248 barnum = addr->phys_hi & 0xff;
249 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
252 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
255 * There is a strange toolchain bug with nds32 which complains about
256 * an undefined reference here, even if fdtdec_get_pci_bar32() is never
257 * called. An #ifdef seems to be the only fix!
259 #if !IS_ENABLED(CONFIG_NDS32)
260 *bar = dm_pci_read_bar32(dev, barnum);
266 int fdtdec_get_pci_bus_range(const void *blob, int node,
267 struct fdt_resource *res)
272 values = fdt_getprop(blob, node, "bus-range", &len);
273 if (!values || len < sizeof(*values) * 2)
276 res->start = fdt32_to_cpu(*values++);
277 res->end = fdt32_to_cpu(*values);
282 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
283 uint64_t default_val)
285 const unaligned_fdt64_t *cell64;
288 cell64 = fdt_getprop(blob, node, prop_name, &length);
289 if (!cell64 || length < sizeof(*cell64))
292 return fdt64_to_cpu(*cell64);
295 int fdtdec_get_is_enabled(const void *blob, int node)
300 * It should say "okay", so only allow that. Some fdts use "ok" but
301 * this is a bug. Please fix your device tree source file. See here
304 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
306 cell = fdt_getprop(blob, node, "status", NULL);
308 return strcmp(cell, "okay") == 0;
312 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
314 enum fdt_compat_id id;
316 /* Search our drivers */
317 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
318 if (fdt_node_check_compatible(blob, node,
319 compat_names[id]) == 0)
321 return COMPAT_UNKNOWN;
324 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
326 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
329 int fdtdec_next_compatible_subnode(const void *blob, int node,
330 enum fdt_compat_id id, int *depthp)
333 node = fdt_next_node(blob, node, depthp);
334 } while (*depthp > 1);
336 /* If this is a direct subnode, and compatible, return it */
337 if (*depthp == 1 && 0 == fdt_node_check_compatible(
338 blob, node, compat_names[id]))
341 return -FDT_ERR_NOTFOUND;
344 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
347 #define MAX_STR_LEN 20
348 char str[MAX_STR_LEN + 20];
351 /* snprintf() is not available */
352 assert(strlen(name) < MAX_STR_LEN);
353 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
354 node = fdt_path_offset(blob, str);
357 err = fdt_node_check_compatible(blob, node, compat_names[id]);
361 return -FDT_ERR_NOTFOUND;
366 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
367 enum fdt_compat_id id, int *node_list,
370 memset(node_list, '\0', sizeof(*node_list) * maxcount);
372 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
375 /* TODO: Can we tighten this code up a little? */
376 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
377 enum fdt_compat_id id, int *node_list,
380 int name_len = strlen(name);
388 /* find the alias node if present */
389 alias_node = fdt_path_offset(blob, "/aliases");
392 * start with nothing, and we can assume that the root node can't
395 memset(nodes, '\0', sizeof(nodes));
397 /* First find all the compatible nodes */
398 for (node = count = 0; node >= 0 && count < maxcount;) {
399 node = fdtdec_next_compatible(blob, node, id);
401 nodes[count++] = node;
404 debug("%s: warning: maxcount exceeded with alias '%s'\n",
407 /* Now find all the aliases */
408 for (offset = fdt_first_property_offset(blob, alias_node);
410 offset = fdt_next_property_offset(blob, offset)) {
411 const struct fdt_property *prop;
417 prop = fdt_get_property_by_offset(blob, offset, NULL);
418 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
419 if (prop->len && 0 == strncmp(path, name, name_len))
420 node = fdt_path_offset(blob, prop->data);
424 /* Get the alias number */
425 number = dectoul(path + name_len, NULL);
426 if (number < 0 || number >= maxcount) {
427 debug("%s: warning: alias '%s' is out of range\n",
432 /* Make sure the node we found is actually in our list! */
434 for (j = 0; j < count; j++)
435 if (nodes[j] == node) {
441 debug("%s: warning: alias '%s' points to a node "
442 "'%s' that is missing or is not compatible "
443 " with '%s'\n", __func__, path,
444 fdt_get_name(blob, node, NULL),
450 * Add this node to our list in the right place, and mark
453 if (fdtdec_get_is_enabled(blob, node)) {
454 if (node_list[number]) {
455 debug("%s: warning: alias '%s' requires that "
456 "a node be placed in the list in a "
457 "position which is already filled by "
458 "node '%s'\n", __func__, path,
459 fdt_get_name(blob, node, NULL));
462 node_list[number] = node;
463 if (number >= num_found)
464 num_found = number + 1;
469 /* Add any nodes not mentioned by an alias */
470 for (i = j = 0; i < maxcount; i++) {
472 for (; j < maxcount; j++)
474 fdtdec_get_is_enabled(blob, nodes[j]))
477 /* Have we run out of nodes to add? */
481 assert(!node_list[i]);
482 node_list[i] = nodes[j++];
491 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
494 int base_len = strlen(base);
495 const char *find_name;
500 find_name = fdt_get_name(blob, offset, &find_namelen);
501 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
503 aliases = fdt_path_offset(blob, "/aliases");
504 for (prop_offset = fdt_first_property_offset(blob, aliases);
506 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
512 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
513 debug(" - %s, %s\n", name, prop);
514 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
515 strncmp(name, base, base_len))
518 slash = strrchr(prop, '/');
519 if (strcmp(slash + 1, find_name))
523 * Adding an extra check to distinguish DT nodes with
526 if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
527 if (fdt_get_phandle(blob, offset) !=
528 fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
532 val = trailing_strtol(name);
535 debug("Found seq %d\n", *seqp);
540 debug("Not found\n");
544 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
546 int base_len = strlen(base);
551 debug("Looking for highest alias id for '%s'\n", base);
553 aliases = fdt_path_offset(blob, "/aliases");
554 for (prop_offset = fdt_first_property_offset(blob, aliases);
556 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
561 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
562 debug(" - %s, %s\n", name, prop);
563 if (*prop != '/' || prop[len - 1] ||
564 strncmp(name, base, base_len))
567 val = trailing_strtol(name);
569 debug("Found seq %d\n", val);
577 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
583 chosen_node = fdt_path_offset(blob, "/chosen");
584 return fdt_getprop(blob, chosen_node, name, NULL);
587 int fdtdec_get_chosen_node(const void *blob, const char *name)
591 prop = fdtdec_get_chosen_prop(blob, name);
593 return -FDT_ERR_NOTFOUND;
594 return fdt_path_offset(blob, prop);
597 int fdtdec_check_fdt(void)
600 * We must have an FDT, but we cannot panic() yet since the console
601 * is not ready. So for now, just assert(). Boards which need an early
602 * FDT (prior to console ready) will need to make their own
603 * arrangements and do their own checks.
605 assert(!fdtdec_prepare_fdt());
610 * This function is a little odd in that it accesses global data. At some
611 * point if the architecture board.c files merge this will make more sense.
612 * Even now, it is common code.
614 int fdtdec_prepare_fdt(void)
616 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
617 fdt_check_header(gd->fdt_blob)) {
618 #ifdef CONFIG_SPL_BUILD
619 puts("Missing DTB\n");
621 printf("No valid device tree binary found at %p\n",
625 printf("fdt_blob=%p\n", gd->fdt_blob);
626 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
636 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
641 debug("%s: %s\n", __func__, prop_name);
642 phandle = fdt_getprop(blob, node, prop_name, NULL);
644 return -FDT_ERR_NOTFOUND;
646 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
651 * Look up a property in a node and check that it has a minimum length.
653 * @param blob FDT blob
654 * @param node node to examine
655 * @param prop_name name of property to find
656 * @param min_len minimum property length in bytes
657 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
658 found, or -FDT_ERR_BADLAYOUT if not enough data
659 * @return pointer to cell, which is only valid if err == 0
661 static const void *get_prop_check_min_len(const void *blob, int node,
662 const char *prop_name, int min_len,
668 debug("%s: %s\n", __func__, prop_name);
669 cell = fdt_getprop(blob, node, prop_name, &len);
671 *err = -FDT_ERR_NOTFOUND;
672 else if (len < min_len)
673 *err = -FDT_ERR_BADLAYOUT;
679 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
680 u32 *array, int count)
685 debug("%s: %s\n", __func__, prop_name);
686 cell = get_prop_check_min_len(blob, node, prop_name,
687 sizeof(u32) * count, &err);
691 for (i = 0; i < count; i++)
692 array[i] = fdt32_to_cpu(cell[i]);
697 int fdtdec_get_int_array_count(const void *blob, int node,
698 const char *prop_name, u32 *array, int count)
704 debug("%s: %s\n", __func__, prop_name);
705 cell = fdt_getprop(blob, node, prop_name, &len);
707 return -FDT_ERR_NOTFOUND;
708 elems = len / sizeof(u32);
711 for (i = 0; i < count; i++)
712 array[i] = fdt32_to_cpu(cell[i]);
717 const u32 *fdtdec_locate_array(const void *blob, int node,
718 const char *prop_name, int count)
723 cell = get_prop_check_min_len(blob, node, prop_name,
724 sizeof(u32) * count, &err);
725 return err ? NULL : cell;
728 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
733 debug("%s: %s\n", __func__, prop_name);
734 cell = fdt_getprop(blob, node, prop_name, &len);
738 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
739 const char *list_name,
740 const char *cells_name,
741 int cell_count, int index,
742 struct fdtdec_phandle_args *out_args)
744 const __be32 *list, *list_end;
745 int rc = 0, size, cur_index = 0;
750 /* Retrieve the phandle list property */
751 list = fdt_getprop(blob, src_node, list_name, &size);
754 list_end = list + size / sizeof(*list);
756 /* Loop over the phandles until all the requested entry is found */
757 while (list < list_end) {
762 * If phandle is 0, then it is an empty entry with no
763 * arguments. Skip forward to the next entry.
765 phandle = be32_to_cpup(list++);
768 * Find the provider node and parse the #*-cells
769 * property to determine the argument length.
771 * This is not needed if the cell count is hard-coded
772 * (i.e. cells_name not set, but cell_count is set),
773 * except when we're going to return the found node
776 if (cells_name || cur_index == index) {
777 node = fdt_node_offset_by_phandle(blob,
780 debug("%s: could not find phandle\n",
781 fdt_get_name(blob, src_node,
788 count = fdtdec_get_int(blob, node, cells_name,
791 debug("%s: could not get %s for %s\n",
792 fdt_get_name(blob, src_node,
795 fdt_get_name(blob, node,
804 * Make sure that the arguments actually fit in the
805 * remaining property data length
807 if (list + count > list_end) {
808 debug("%s: arguments longer than property\n",
809 fdt_get_name(blob, src_node, NULL));
815 * All of the error cases above bail out of the loop, so at
816 * this point, the parsing is successful. If the requested
817 * index matches, then fill the out_args structure and return,
818 * or return -ENOENT for an empty entry.
821 if (cur_index == index) {
828 if (count > MAX_PHANDLE_ARGS) {
829 debug("%s: too many arguments %d\n",
830 fdt_get_name(blob, src_node,
832 count = MAX_PHANDLE_ARGS;
834 out_args->node = node;
835 out_args->args_count = count;
836 for (i = 0; i < count; i++) {
838 be32_to_cpup(list++);
842 /* Found it! return success */
852 * Result will be one of:
853 * -ENOENT : index is for empty phandle
854 * -EINVAL : parsing error on data
855 * [1..n] : Number of phandle (count mode; when index = -1)
857 rc = index < 0 ? cur_index : -ENOENT;
862 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
863 u8 *array, int count)
868 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
870 memcpy(array, cell, count);
874 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
875 const char *prop_name, int count)
880 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
886 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
891 number = (number << 32) | fdt32_to_cpu(*ptr++);
896 int fdt_get_resource(const void *fdt, int node, const char *property,
897 unsigned int index, struct fdt_resource *res)
899 const fdt32_t *ptr, *end;
900 int na, ns, len, parent;
903 parent = fdt_parent_offset(fdt, node);
907 na = fdt_address_cells(fdt, parent);
908 ns = fdt_size_cells(fdt, parent);
910 ptr = fdt_getprop(fdt, node, property, &len);
914 end = ptr + len / sizeof(*ptr);
916 while (ptr + na + ns <= end) {
918 if (CONFIG_IS_ENABLED(OF_TRANSLATE))
919 res->start = fdt_translate_address(fdt, node, ptr);
921 res->start = fdtdec_get_number(ptr, na);
923 res->end = res->start;
924 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
932 return -FDT_ERR_NOTFOUND;
935 int fdt_get_named_resource(const void *fdt, int node, const char *property,
936 const char *prop_names, const char *name,
937 struct fdt_resource *res)
941 index = fdt_stringlist_search(fdt, node, prop_names, name);
945 return fdt_get_resource(fdt, node, property, index, res);
948 static int decode_timing_property(const void *blob, int node, const char *name,
949 struct timing_entry *result)
954 prop = fdt_getprop(blob, node, name, &length);
956 debug("%s: could not find property %s\n",
957 fdt_get_name(blob, node, NULL), name);
961 if (length == sizeof(u32)) {
962 result->typ = fdtdec_get_int(blob, node, name, 0);
963 result->min = result->typ;
964 result->max = result->typ;
966 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
972 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
973 struct display_timing *dt)
975 int i, node, timings_node;
979 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
980 if (timings_node < 0)
983 for (i = 0, node = fdt_first_subnode(blob, timings_node);
984 node > 0 && i != index;
985 node = fdt_next_subnode(blob, node))
991 memset(dt, 0, sizeof(*dt));
993 ret |= decode_timing_property(blob, node, "hback-porch",
995 ret |= decode_timing_property(blob, node, "hfront-porch",
997 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
998 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
999 ret |= decode_timing_property(blob, node, "vback-porch",
1001 ret |= decode_timing_property(blob, node, "vfront-porch",
1003 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1004 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1005 ret |= decode_timing_property(blob, node, "clock-frequency",
1009 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1011 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1012 DISPLAY_FLAGS_VSYNC_LOW;
1014 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1016 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1017 DISPLAY_FLAGS_HSYNC_LOW;
1019 val = fdtdec_get_int(blob, node, "de-active", -1);
1021 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1022 DISPLAY_FLAGS_DE_LOW;
1024 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1026 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1027 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1030 if (fdtdec_get_bool(blob, node, "interlaced"))
1031 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1032 if (fdtdec_get_bool(blob, node, "doublescan"))
1033 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1034 if (fdtdec_get_bool(blob, node, "doubleclk"))
1035 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1040 int fdtdec_setup_mem_size_base(void)
1044 struct resource res;
1046 mem = ofnode_path("/memory");
1047 if (!ofnode_valid(mem)) {
1048 debug("%s: Missing /memory node\n", __func__);
1052 ret = ofnode_read_resource(mem, 0, &res);
1054 debug("%s: Unable to decode first memory bank\n", __func__);
1058 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1059 gd->ram_base = (unsigned long)res.start;
1060 debug("%s: Initial DRAM size %llx\n", __func__,
1061 (unsigned long long)gd->ram_size);
1066 ofnode get_next_memory_node(ofnode mem)
1069 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
1070 } while (!ofnode_is_available(mem));
1075 int fdtdec_setup_memory_banksize(void)
1077 int bank, ret, reg = 0;
1078 struct resource res;
1079 ofnode mem = ofnode_null();
1081 mem = get_next_memory_node(mem);
1082 if (!ofnode_valid(mem)) {
1083 debug("%s: Missing /memory node\n", __func__);
1087 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1088 ret = ofnode_read_resource(mem, reg++, &res);
1091 mem = get_next_memory_node(mem);
1092 if (!ofnode_valid(mem))
1095 ret = ofnode_read_resource(mem, reg++, &res);
1103 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1104 gd->bd->bi_dram[bank].size =
1105 (phys_size_t)(res.end - res.start + 1);
1107 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1109 (unsigned long long)gd->bd->bi_dram[bank].start,
1110 (unsigned long long)gd->bd->bi_dram[bank].size);
1116 int fdtdec_setup_mem_size_base_lowest(void)
1118 int bank, ret, reg = 0;
1119 struct resource res;
1122 ofnode mem = ofnode_null();
1124 gd->ram_base = (unsigned long)~0;
1126 mem = get_next_memory_node(mem);
1127 if (!ofnode_valid(mem)) {
1128 debug("%s: Missing /memory node\n", __func__);
1132 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1133 ret = ofnode_read_resource(mem, reg++, &res);
1136 mem = get_next_memory_node(mem);
1137 if (!ofnode_valid(mem))
1140 ret = ofnode_read_resource(mem, reg++, &res);
1148 base = (unsigned long)res.start;
1149 size = (phys_size_t)(res.end - res.start + 1);
1151 if (gd->ram_base > base && size) {
1152 gd->ram_base = base;
1153 gd->ram_size = size;
1154 debug("%s: Initial DRAM base %lx size %lx\n",
1155 __func__, base, (unsigned long)size);
1162 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1164 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1165 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1166 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1167 bool gzip = 0, lzo = 0;
1168 ulong sz_in = sz_src;
1172 if (CONFIG_IS_ENABLED(GZIP))
1173 if (gzip_parse_header(src, sz_in) >= 0)
1175 if (CONFIG_IS_ENABLED(LZO))
1176 if (!gzip && lzop_is_valid_header(src))
1183 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1184 dst = malloc(sz_out);
1186 puts("uncompress_blob: Unable to allocate memory\n");
1190 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1191 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1197 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1198 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1199 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1200 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1205 /* not a valid compressed blob */
1206 puts("uncompress_blob: Unable to uncompress\n");
1207 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1213 *dstp = (void *)src;
1214 *dstp = (void *)src;
1220 * fdt_find_separate() - Find a devicetree at the end of the image
1222 * @return pointer to FDT blob
1224 static void *fdt_find_separate(void)
1226 void *fdt_blob = NULL;
1228 #ifdef CONFIG_SPL_BUILD
1229 /* FDT is at end of BSS unless it is in a different memory region */
1230 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1231 fdt_blob = (ulong *)&_image_binary_end;
1233 fdt_blob = (ulong *)&__bss_end;
1235 /* FDT is at end of image */
1236 fdt_blob = (ulong *)&_end;
1242 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1247 if (!is_valid_ethaddr(mac))
1250 path = fdt_get_alias(fdt, "ethernet");
1254 debug("ethernet alias found: %s\n", path);
1256 offset = fdt_path_offset(fdt, path);
1258 debug("ethernet alias points to absent node %s\n", path);
1262 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1266 debug("MAC address: %pM\n", mac);
1271 static int fdtdec_init_reserved_memory(void *blob)
1273 int na, ns, node, err;
1276 /* inherit #address-cells and #size-cells from the root node */
1277 na = fdt_address_cells(blob, 0);
1278 ns = fdt_size_cells(blob, 0);
1280 node = fdt_add_subnode(blob, 0, "reserved-memory");
1284 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1288 value = cpu_to_fdt32(ns);
1290 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1294 value = cpu_to_fdt32(na);
1296 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1303 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1304 const struct fdt_memory *carveout,
1305 const char **compatibles, unsigned int count,
1306 uint32_t *phandlep, unsigned long flags)
1308 fdt32_t cells[4] = {}, *ptr = cells;
1309 uint32_t upper, lower, phandle;
1310 int parent, node, na, ns, err;
1314 /* create an empty /reserved-memory node if one doesn't exist */
1315 parent = fdt_path_offset(blob, "/reserved-memory");
1317 parent = fdtdec_init_reserved_memory(blob);
1322 /* only 1 or 2 #address-cells and #size-cells are supported */
1323 na = fdt_address_cells(blob, parent);
1324 if (na < 1 || na > 2)
1325 return -FDT_ERR_BADNCELLS;
1327 ns = fdt_size_cells(blob, parent);
1328 if (ns < 1 || ns > 2)
1329 return -FDT_ERR_BADNCELLS;
1331 /* find a matching node and return the phandle to that */
1332 fdt_for_each_subnode(node, blob, parent) {
1333 const char *name = fdt_get_name(blob, node, NULL);
1337 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1339 if (addr == FDT_ADDR_T_NONE) {
1340 debug("failed to read address/size for %s\n", name);
1344 if (addr == carveout->start && (addr + size - 1) ==
1347 *phandlep = fdt_get_phandle(blob, node);
1353 * Unpack the start address and generate the name of the new node
1354 * base on the basename and the unit-address.
1356 upper = upper_32_bits(carveout->start);
1357 lower = lower_32_bits(carveout->start);
1359 if (na > 1 && upper > 0)
1360 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1364 debug("address %08x:%08x exceeds addressable space\n",
1366 return -FDT_ERR_BADVALUE;
1369 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1372 node = fdt_add_subnode(blob, parent, name);
1376 if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) {
1377 err = fdt_setprop(blob, node, "no-map", NULL, 0);
1383 err = fdt_generate_phandle(blob, &phandle);
1387 err = fdtdec_set_phandle(blob, node, phandle);
1392 /* store one or two address cells */
1394 *ptr++ = cpu_to_fdt32(upper);
1396 *ptr++ = cpu_to_fdt32(lower);
1398 /* store one or two size cells */
1399 size = carveout->end - carveout->start + 1;
1400 upper = upper_32_bits(size);
1401 lower = lower_32_bits(size);
1404 *ptr++ = cpu_to_fdt32(upper);
1406 *ptr++ = cpu_to_fdt32(lower);
1408 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1412 if (compatibles && count > 0) {
1413 size_t length = 0, len = 0;
1417 for (i = 0; i < count; i++)
1418 length += strlen(compatibles[i]) + 1;
1420 buffer = malloc(length);
1422 return -FDT_ERR_INTERNAL;
1424 for (i = 0; i < count; i++)
1425 len += strlcpy(buffer + len, compatibles[i],
1428 err = fdt_setprop(blob, node, "compatible", buffer, length);
1434 /* return the phandle for the new node for the caller to use */
1436 *phandlep = phandle;
1441 int fdtdec_get_carveout(const void *blob, const char *node,
1442 const char *prop_name, unsigned int index,
1443 struct fdt_memory *carveout, const char **name,
1444 const char ***compatiblesp, unsigned int *countp,
1445 unsigned long *flags)
1447 const fdt32_t *prop;
1452 offset = fdt_path_offset(blob, node);
1456 prop = fdt_getprop(blob, offset, prop_name, &len);
1458 debug("failed to get %s for %s\n", prop_name, node);
1459 return -FDT_ERR_NOTFOUND;
1462 if ((len % sizeof(phandle)) != 0) {
1463 debug("invalid phandle property\n");
1464 return -FDT_ERR_BADPHANDLE;
1467 if (len < (sizeof(phandle) * (index + 1))) {
1468 debug("invalid phandle index\n");
1469 return -FDT_ERR_NOTFOUND;
1472 phandle = fdt32_to_cpu(prop[index]);
1474 offset = fdt_node_offset_by_phandle(blob, phandle);
1476 debug("failed to find node for phandle %u\n", phandle);
1481 *name = fdt_get_name(blob, offset, NULL);
1484 const char **compatibles = NULL;
1485 const char *start, *end, *ptr;
1486 unsigned int count = 0;
1488 prop = fdt_getprop(blob, offset, "compatible", &len);
1492 start = ptr = (const char *)prop;
1496 ptr = strchrnul(ptr, '\0');
1501 compatibles = malloc(sizeof(ptr) * count);
1503 return -FDT_ERR_INTERNAL;
1509 compatibles[count] = ptr;
1510 ptr = strchrnul(ptr, '\0');
1516 *compatiblesp = compatibles;
1522 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1525 if (carveout->start == FDT_ADDR_T_NONE) {
1526 debug("failed to read address/size from \"reg\" property\n");
1527 return -FDT_ERR_NOTFOUND;
1530 carveout->end = carveout->start + size - 1;
1535 if (fdtdec_get_bool(blob, offset, "no-map"))
1536 *flags |= FDTDEC_RESERVED_MEMORY_NO_MAP;
1542 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1543 unsigned int index, const struct fdt_memory *carveout,
1544 const char *name, const char **compatibles,
1545 unsigned int count, unsigned long flags)
1548 int err, offset, len;
1552 err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles,
1553 count, &phandle, flags);
1555 debug("failed to add reserved memory: %d\n", err);
1559 offset = fdt_path_offset(blob, node);
1561 debug("failed to find offset for node %s: %d\n", node, offset);
1565 value = cpu_to_fdt32(phandle);
1567 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1568 if (len == -FDT_ERR_NOTFOUND)
1574 if ((index + 1) * sizeof(value) > len) {
1575 err = fdt_setprop_placeholder(blob, offset, prop_name,
1576 (index + 1) * sizeof(value),
1579 debug("failed to resize reserved memory property: %s\n",
1585 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1587 index * sizeof(value),
1588 &value, sizeof(value));
1590 debug("failed to update %s property for node %s: %s\n",
1591 prop_name, node, fdt_strerror(err));
1598 /* TODO(sjg@chromium.org): This function should not be weak */
1599 __weak int fdtdec_board_setup(const void *fdt_blob)
1605 * setup_multi_dtb_fit() - locate the correct dtb from a FIT
1607 * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a
1610 * It accepts the current value of gd->fdt_blob, which points to the FIT, then
1611 * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the
1614 static void setup_multi_dtb_fit(void)
1619 * Try and uncompress the blob.
1620 * Unfortunately there is no way to know how big the input blob really
1621 * is. So let us set the maximum input size arbitrarily high. 16MB
1622 * ought to be more than enough for packed DTBs.
1624 if (uncompress_blob(gd->fdt_blob, 0x1000000, &blob) == 0)
1625 gd->fdt_blob = blob;
1628 * Check if blob is a FIT images containings DTBs.
1629 * If so, pick the most relevant
1631 blob = locate_dtb_in_fit(gd->fdt_blob);
1633 gd_set_multi_dtb_fit(gd->fdt_blob);
1634 gd->fdt_blob = blob;
1635 gd->fdt_src = FDTSRC_FIT;
1639 int fdtdec_setup(void)
1643 /* The devicetree is typically appended to U-Boot */
1644 if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
1645 gd->fdt_blob = fdt_find_separate();
1646 gd->fdt_src = FDTSRC_SEPARATE;
1647 } else { /* embed dtb in ELF file for testing / development */
1648 gd->fdt_blob = dtb_dt_embedded();
1649 gd->fdt_src = FDTSRC_EMBED;
1652 /* Allow the board to override the fdt address. */
1653 if (IS_ENABLED(CONFIG_OF_BOARD)) {
1654 gd->fdt_blob = board_fdt_blob_setup(&ret);
1657 gd->fdt_src = FDTSRC_BOARD;
1660 /* Allow the early environment to override the fdt address */
1661 if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
1664 addr = env_get_hex("fdtcontroladdr", 0);
1666 gd->fdt_blob = map_sysmem(addr, 0);
1667 gd->fdt_src = FDTSRC_ENV;
1671 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT))
1672 setup_multi_dtb_fit();
1674 ret = fdtdec_prepare_fdt();
1676 ret = fdtdec_board_setup(gd->fdt_blob);
1680 int fdtdec_resetup(int *rescan)
1685 * If the current DTB is part of a compressed FIT image,
1686 * try to locate the best match from the uncompressed
1687 * FIT image stillpresent there. Save the time and space
1688 * required to uncompress it again.
1690 if (gd_multi_dtb_fit()) {
1691 fdt_blob = locate_dtb_in_fit(gd_multi_dtb_fit());
1693 if (fdt_blob == gd->fdt_blob) {
1695 * The best match did not change. no need to tear down
1696 * the DM and rescan the fdt.
1703 gd->fdt_blob = fdt_blob;
1704 return fdtdec_prepare_fdt();
1708 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1709 * not a FIT image containings DTB, but a single DTB. There is no need
1710 * to teard down DM and rescan the DT in this case.
1716 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1717 phys_addr_t *basep, phys_size_t *sizep,
1720 int addr_cells, size_cells;
1721 const u32 *cell, *end;
1722 u64 total_size, size, addr;
1728 debug("%s: board_id=%d\n", __func__, board_id);
1731 node = fdt_path_offset(blob, area);
1733 debug("No %s node found\n", area);
1737 cell = fdt_getprop(blob, node, "reg", &len);
1739 debug("No reg property found\n");
1743 addr_cells = fdt_address_cells(blob, node);
1744 size_cells = fdt_size_cells(blob, node);
1746 /* Check the board id and mask */
1747 for (child = fdt_first_subnode(blob, node);
1749 child = fdt_next_subnode(blob, child)) {
1750 int match_mask, match_value;
1752 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1753 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1755 if (match_value >= 0 &&
1756 ((board_id & match_mask) == match_value)) {
1757 /* Found matching mask */
1758 debug("Found matching mask %d\n", match_mask);
1760 cell = fdt_getprop(blob, node, "reg", &len);
1762 debug("No memory-banks property found\n");
1768 /* Note: if no matching subnode was found we use the parent node */
1771 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1772 CONFIG_NR_DRAM_BANKS);
1775 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1778 end = cell + len / 4 - addr_cells - size_cells;
1779 debug("cell at %p, end %p\n", cell, end);
1780 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1784 if (addr_cells == 2)
1785 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1786 addr += fdt32_to_cpu(*cell++);
1788 bd->bi_dram[bank].start = addr;
1790 *basep = (phys_addr_t)addr;
1793 if (size_cells == 2)
1794 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1795 size += fdt32_to_cpu(*cell++);
1800 debug("Auto-sizing %llx, size %llx: ", addr, size);
1801 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1802 if (new_size == size) {
1805 debug("sized to %llx\n", new_size);
1811 bd->bi_dram[bank].size = size;
1815 debug("Memory size %llu\n", total_size);
1817 *sizep = (phys_size_t)total_size;
1822 #endif /* !USE_HOSTCC */