1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
15 #include <dm/of_extra.h>
19 #include <fdt_support.h>
22 #include <linux/libfdt.h>
24 #include <asm/sections.h>
25 #include <linux/ctype.h>
26 #include <linux/lzo.h>
28 DECLARE_GLOBAL_DATA_PTR;
31 * Here are the type we know about. One day we might allow drivers to
32 * register. For now we just put them here. The COMPAT macro allows us to
33 * turn this into a sparse list later, and keeps the ID with the name.
35 * NOTE: This list is basically a TODO list for things that need to be
36 * converted to driver model. So don't add new things here unless there is a
37 * good reason why driver-model conversion is infeasible. Examples include
38 * things which are used before driver model is available.
40 #define COMPAT(id, name) name
41 static const char * const compat_names[COMPAT_COUNT] = {
42 COMPAT(UNKNOWN, "<none>"),
43 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
44 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
45 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
46 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
47 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
48 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
49 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
50 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
51 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
52 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
53 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
54 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
55 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
56 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
57 COMPAT(INTEL_MICROCODE, "intel,microcode"),
58 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
59 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
60 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
61 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
62 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
63 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
64 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
65 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
66 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
67 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
68 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
69 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
74 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
75 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
76 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
79 const char *fdtdec_get_compatible(enum fdt_compat_id id)
81 /* We allow reading of the 'unknown' ID for testing purposes */
82 assert(id >= 0 && id < COMPAT_COUNT);
83 return compat_names[id];
86 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
87 const char *prop_name, int index, int na,
88 int ns, fdt_size_t *sizep,
91 const fdt32_t *prop, *prop_end;
92 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
96 debug("%s: %s: ", __func__, prop_name);
98 prop = fdt_getprop(blob, node, prop_name, &len);
100 debug("(not found)\n");
101 return FDT_ADDR_T_NONE;
103 prop_end = prop + (len / sizeof(*prop));
105 prop_addr = prop + (index * (na + ns));
106 prop_size = prop_addr + na;
107 prop_after_size = prop_size + ns;
108 if (prop_after_size > prop_end) {
109 debug("(not enough data: expected >= %d cells, got %d cells)\n",
110 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
111 return FDT_ADDR_T_NONE;
114 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
116 addr = fdt_translate_address(blob, node, prop_addr);
119 addr = fdtdec_get_number(prop_addr, na);
122 *sizep = fdtdec_get_number(prop_size, ns);
123 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
124 (unsigned long long)*sizep);
126 debug("addr=%08llx\n", (unsigned long long)addr);
132 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
133 int node, const char *prop_name,
134 int index, fdt_size_t *sizep,
139 debug("%s: ", __func__);
141 na = fdt_address_cells(blob, parent);
143 debug("(bad #address-cells)\n");
144 return FDT_ADDR_T_NONE;
147 ns = fdt_size_cells(blob, parent);
149 debug("(bad #size-cells)\n");
150 return FDT_ADDR_T_NONE;
153 debug("na=%d, ns=%d, ", na, ns);
155 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
156 ns, sizep, translate);
159 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
160 const char *prop_name, int index,
166 debug("%s: ", __func__);
168 parent = fdt_parent_offset(blob, node);
170 debug("(no parent found)\n");
171 return FDT_ADDR_T_NONE;
174 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
175 index, sizep, translate);
178 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
179 const char *prop_name, fdt_size_t *sizep)
181 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
183 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
184 sizeof(fdt_addr_t) / sizeof(fdt32_t),
188 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
190 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
193 #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
194 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
196 const char *list, *end;
199 list = fdt_getprop(blob, node, "compatible", &len);
206 if (len >= strlen("pciVVVV,DDDD")) {
207 char *s = strstr(list, "pci");
210 * check if the string is something like pciVVVV,DDDD.RR
211 * or just pciVVVV,DDDD
213 if (s && s[7] == ',' &&
214 (s[12] == '.' || s[12] == 0)) {
216 *vendor = simple_strtol(s, NULL, 16);
219 *device = simple_strtol(s, NULL, 16);
230 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
235 /* extract the bar number from fdt_pci_addr */
236 barnum = addr->phys_hi & 0xff;
237 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
240 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
241 *bar = dm_pci_read_bar32(dev, barnum);
247 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
248 uint64_t default_val)
250 const unaligned_fdt64_t *cell64;
253 cell64 = fdt_getprop(blob, node, prop_name, &length);
254 if (!cell64 || length < sizeof(*cell64))
257 return fdt64_to_cpu(*cell64);
260 int fdtdec_get_is_enabled(const void *blob, int node)
265 * It should say "okay", so only allow that. Some fdts use "ok" but
266 * this is a bug. Please fix your device tree source file. See here
269 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
271 cell = fdt_getprop(blob, node, "status", NULL);
273 return strcmp(cell, "okay") == 0;
277 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
279 enum fdt_compat_id id;
281 /* Search our drivers */
282 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
283 if (fdt_node_check_compatible(blob, node,
284 compat_names[id]) == 0)
286 return COMPAT_UNKNOWN;
289 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
291 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
294 int fdtdec_next_compatible_subnode(const void *blob, int node,
295 enum fdt_compat_id id, int *depthp)
298 node = fdt_next_node(blob, node, depthp);
299 } while (*depthp > 1);
301 /* If this is a direct subnode, and compatible, return it */
302 if (*depthp == 1 && 0 == fdt_node_check_compatible(
303 blob, node, compat_names[id]))
306 return -FDT_ERR_NOTFOUND;
309 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
312 #define MAX_STR_LEN 20
313 char str[MAX_STR_LEN + 20];
316 /* snprintf() is not available */
317 assert(strlen(name) < MAX_STR_LEN);
318 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
319 node = fdt_path_offset(blob, str);
322 err = fdt_node_check_compatible(blob, node, compat_names[id]);
326 return -FDT_ERR_NOTFOUND;
331 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
332 enum fdt_compat_id id, int *node_list,
335 memset(node_list, '\0', sizeof(*node_list) * maxcount);
337 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
340 /* TODO: Can we tighten this code up a little? */
341 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
342 enum fdt_compat_id id, int *node_list,
345 int name_len = strlen(name);
353 /* find the alias node if present */
354 alias_node = fdt_path_offset(blob, "/aliases");
357 * start with nothing, and we can assume that the root node can't
360 memset(nodes, '\0', sizeof(nodes));
362 /* First find all the compatible nodes */
363 for (node = count = 0; node >= 0 && count < maxcount;) {
364 node = fdtdec_next_compatible(blob, node, id);
366 nodes[count++] = node;
369 debug("%s: warning: maxcount exceeded with alias '%s'\n",
372 /* Now find all the aliases */
373 for (offset = fdt_first_property_offset(blob, alias_node);
375 offset = fdt_next_property_offset(blob, offset)) {
376 const struct fdt_property *prop;
382 prop = fdt_get_property_by_offset(blob, offset, NULL);
383 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
384 if (prop->len && 0 == strncmp(path, name, name_len))
385 node = fdt_path_offset(blob, prop->data);
389 /* Get the alias number */
390 number = simple_strtoul(path + name_len, NULL, 10);
391 if (number < 0 || number >= maxcount) {
392 debug("%s: warning: alias '%s' is out of range\n",
397 /* Make sure the node we found is actually in our list! */
399 for (j = 0; j < count; j++)
400 if (nodes[j] == node) {
406 debug("%s: warning: alias '%s' points to a node "
407 "'%s' that is missing or is not compatible "
408 " with '%s'\n", __func__, path,
409 fdt_get_name(blob, node, NULL),
415 * Add this node to our list in the right place, and mark
418 if (fdtdec_get_is_enabled(blob, node)) {
419 if (node_list[number]) {
420 debug("%s: warning: alias '%s' requires that "
421 "a node be placed in the list in a "
422 "position which is already filled by "
423 "node '%s'\n", __func__, path,
424 fdt_get_name(blob, node, NULL));
427 node_list[number] = node;
428 if (number >= num_found)
429 num_found = number + 1;
434 /* Add any nodes not mentioned by an alias */
435 for (i = j = 0; i < maxcount; i++) {
437 for (; j < maxcount; j++)
439 fdtdec_get_is_enabled(blob, nodes[j]))
442 /* Have we run out of nodes to add? */
446 assert(!node_list[i]);
447 node_list[i] = nodes[j++];
456 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
459 int base_len = strlen(base);
460 const char *find_name;
465 find_name = fdt_get_name(blob, offset, &find_namelen);
466 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
468 aliases = fdt_path_offset(blob, "/aliases");
469 for (prop_offset = fdt_first_property_offset(blob, aliases);
471 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
477 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
478 debug(" - %s, %s\n", name, prop);
479 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
480 strncmp(name, base, base_len))
483 slash = strrchr(prop, '/');
484 if (strcmp(slash + 1, find_name))
486 val = trailing_strtol(name);
489 debug("Found seq %d\n", *seqp);
494 debug("Not found\n");
498 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
500 int base_len = strlen(base);
505 debug("Looking for highest alias id for '%s'\n", base);
507 aliases = fdt_path_offset(blob, "/aliases");
508 for (prop_offset = fdt_first_property_offset(blob, aliases);
510 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
515 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
516 debug(" - %s, %s\n", name, prop);
517 if (*prop != '/' || prop[len - 1] ||
518 strncmp(name, base, base_len))
521 val = trailing_strtol(name);
523 debug("Found seq %d\n", val);
531 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
537 chosen_node = fdt_path_offset(blob, "/chosen");
538 return fdt_getprop(blob, chosen_node, name, NULL);
541 int fdtdec_get_chosen_node(const void *blob, const char *name)
545 prop = fdtdec_get_chosen_prop(blob, name);
547 return -FDT_ERR_NOTFOUND;
548 return fdt_path_offset(blob, prop);
551 int fdtdec_check_fdt(void)
554 * We must have an FDT, but we cannot panic() yet since the console
555 * is not ready. So for now, just assert(). Boards which need an early
556 * FDT (prior to console ready) will need to make their own
557 * arrangements and do their own checks.
559 assert(!fdtdec_prepare_fdt());
564 * This function is a little odd in that it accesses global data. At some
565 * point if the architecture board.c files merge this will make more sense.
566 * Even now, it is common code.
568 int fdtdec_prepare_fdt(void)
570 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
571 fdt_check_header(gd->fdt_blob)) {
572 #ifdef CONFIG_SPL_BUILD
573 puts("Missing DTB\n");
575 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
578 printf("fdt_blob=%p\n", gd->fdt_blob);
579 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
589 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
594 debug("%s: %s\n", __func__, prop_name);
595 phandle = fdt_getprop(blob, node, prop_name, NULL);
597 return -FDT_ERR_NOTFOUND;
599 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
604 * Look up a property in a node and check that it has a minimum length.
606 * @param blob FDT blob
607 * @param node node to examine
608 * @param prop_name name of property to find
609 * @param min_len minimum property length in bytes
610 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
611 found, or -FDT_ERR_BADLAYOUT if not enough data
612 * @return pointer to cell, which is only valid if err == 0
614 static const void *get_prop_check_min_len(const void *blob, int node,
615 const char *prop_name, int min_len,
621 debug("%s: %s\n", __func__, prop_name);
622 cell = fdt_getprop(blob, node, prop_name, &len);
624 *err = -FDT_ERR_NOTFOUND;
625 else if (len < min_len)
626 *err = -FDT_ERR_BADLAYOUT;
632 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
633 u32 *array, int count)
638 debug("%s: %s\n", __func__, prop_name);
639 cell = get_prop_check_min_len(blob, node, prop_name,
640 sizeof(u32) * count, &err);
644 for (i = 0; i < count; i++)
645 array[i] = fdt32_to_cpu(cell[i]);
650 int fdtdec_get_int_array_count(const void *blob, int node,
651 const char *prop_name, u32 *array, int count)
657 debug("%s: %s\n", __func__, prop_name);
658 cell = fdt_getprop(blob, node, prop_name, &len);
660 return -FDT_ERR_NOTFOUND;
661 elems = len / sizeof(u32);
664 for (i = 0; i < count; i++)
665 array[i] = fdt32_to_cpu(cell[i]);
670 const u32 *fdtdec_locate_array(const void *blob, int node,
671 const char *prop_name, int count)
676 cell = get_prop_check_min_len(blob, node, prop_name,
677 sizeof(u32) * count, &err);
678 return err ? NULL : cell;
681 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
686 debug("%s: %s\n", __func__, prop_name);
687 cell = fdt_getprop(blob, node, prop_name, &len);
691 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
692 const char *list_name,
693 const char *cells_name,
694 int cell_count, int index,
695 struct fdtdec_phandle_args *out_args)
697 const __be32 *list, *list_end;
698 int rc = 0, size, cur_index = 0;
703 /* Retrieve the phandle list property */
704 list = fdt_getprop(blob, src_node, list_name, &size);
707 list_end = list + size / sizeof(*list);
709 /* Loop over the phandles until all the requested entry is found */
710 while (list < list_end) {
715 * If phandle is 0, then it is an empty entry with no
716 * arguments. Skip forward to the next entry.
718 phandle = be32_to_cpup(list++);
721 * Find the provider node and parse the #*-cells
722 * property to determine the argument length.
724 * This is not needed if the cell count is hard-coded
725 * (i.e. cells_name not set, but cell_count is set),
726 * except when we're going to return the found node
729 if (cells_name || cur_index == index) {
730 node = fdt_node_offset_by_phandle(blob,
733 debug("%s: could not find phandle\n",
734 fdt_get_name(blob, src_node,
741 count = fdtdec_get_int(blob, node, cells_name,
744 debug("%s: could not get %s for %s\n",
745 fdt_get_name(blob, src_node,
748 fdt_get_name(blob, node,
757 * Make sure that the arguments actually fit in the
758 * remaining property data length
760 if (list + count > list_end) {
761 debug("%s: arguments longer than property\n",
762 fdt_get_name(blob, src_node, NULL));
768 * All of the error cases above bail out of the loop, so at
769 * this point, the parsing is successful. If the requested
770 * index matches, then fill the out_args structure and return,
771 * or return -ENOENT for an empty entry.
774 if (cur_index == index) {
781 if (count > MAX_PHANDLE_ARGS) {
782 debug("%s: too many arguments %d\n",
783 fdt_get_name(blob, src_node,
785 count = MAX_PHANDLE_ARGS;
787 out_args->node = node;
788 out_args->args_count = count;
789 for (i = 0; i < count; i++) {
791 be32_to_cpup(list++);
795 /* Found it! return success */
805 * Result will be one of:
806 * -ENOENT : index is for empty phandle
807 * -EINVAL : parsing error on data
808 * [1..n] : Number of phandle (count mode; when index = -1)
810 rc = index < 0 ? cur_index : -ENOENT;
815 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
816 u8 *array, int count)
821 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
823 memcpy(array, cell, count);
827 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
828 const char *prop_name, int count)
833 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
839 int fdtdec_get_config_int(const void *blob, const char *prop_name,
844 debug("%s: %s\n", __func__, prop_name);
845 config_node = fdt_path_offset(blob, "/config");
848 return fdtdec_get_int(blob, config_node, prop_name, default_val);
851 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
856 debug("%s: %s\n", __func__, prop_name);
857 config_node = fdt_path_offset(blob, "/config");
860 prop = fdt_get_property(blob, config_node, prop_name, NULL);
865 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
871 debug("%s: %s\n", __func__, prop_name);
872 nodeoffset = fdt_path_offset(blob, "/config");
876 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
880 return (char *)nodep;
883 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
888 number = (number << 32) | fdt32_to_cpu(*ptr++);
893 int fdt_get_resource(const void *fdt, int node, const char *property,
894 unsigned int index, struct fdt_resource *res)
896 const fdt32_t *ptr, *end;
897 int na, ns, len, parent;
900 parent = fdt_parent_offset(fdt, node);
904 na = fdt_address_cells(fdt, parent);
905 ns = fdt_size_cells(fdt, parent);
907 ptr = fdt_getprop(fdt, node, property, &len);
911 end = ptr + len / sizeof(*ptr);
913 while (ptr + na + ns <= end) {
915 res->start = fdtdec_get_number(ptr, na);
916 res->end = res->start;
917 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
925 return -FDT_ERR_NOTFOUND;
928 int fdt_get_named_resource(const void *fdt, int node, const char *property,
929 const char *prop_names, const char *name,
930 struct fdt_resource *res)
934 index = fdt_stringlist_search(fdt, node, prop_names, name);
938 return fdt_get_resource(fdt, node, property, index, res);
941 static int decode_timing_property(const void *blob, int node, const char *name,
942 struct timing_entry *result)
947 prop = fdt_getprop(blob, node, name, &length);
949 debug("%s: could not find property %s\n",
950 fdt_get_name(blob, node, NULL), name);
954 if (length == sizeof(u32)) {
955 result->typ = fdtdec_get_int(blob, node, name, 0);
956 result->min = result->typ;
957 result->max = result->typ;
959 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
965 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
966 struct display_timing *dt)
968 int i, node, timings_node;
972 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
973 if (timings_node < 0)
976 for (i = 0, node = fdt_first_subnode(blob, timings_node);
977 node > 0 && i != index;
978 node = fdt_next_subnode(blob, node))
984 memset(dt, 0, sizeof(*dt));
986 ret |= decode_timing_property(blob, node, "hback-porch",
988 ret |= decode_timing_property(blob, node, "hfront-porch",
990 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
991 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
992 ret |= decode_timing_property(blob, node, "vback-porch",
994 ret |= decode_timing_property(blob, node, "vfront-porch",
996 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
997 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
998 ret |= decode_timing_property(blob, node, "clock-frequency",
1002 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1004 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1005 DISPLAY_FLAGS_VSYNC_LOW;
1007 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1009 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1010 DISPLAY_FLAGS_HSYNC_LOW;
1012 val = fdtdec_get_int(blob, node, "de-active", -1);
1014 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1015 DISPLAY_FLAGS_DE_LOW;
1017 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1019 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1020 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1023 if (fdtdec_get_bool(blob, node, "interlaced"))
1024 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1025 if (fdtdec_get_bool(blob, node, "doublescan"))
1026 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1027 if (fdtdec_get_bool(blob, node, "doubleclk"))
1028 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1033 int fdtdec_setup_mem_size_base_fdt(const void *blob)
1036 struct fdt_resource res;
1038 mem = fdt_path_offset(blob, "/memory");
1040 debug("%s: Missing /memory node\n", __func__);
1044 ret = fdt_get_resource(blob, mem, "reg", 0, &res);
1046 debug("%s: Unable to decode first memory bank\n", __func__);
1050 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1051 gd->ram_base = (unsigned long)res.start;
1052 debug("%s: Initial DRAM size %llx\n", __func__,
1053 (unsigned long long)gd->ram_size);
1058 int fdtdec_setup_mem_size_base(void)
1060 return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
1063 #if defined(CONFIG_NR_DRAM_BANKS)
1065 static int get_next_memory_node(const void *blob, int mem)
1068 mem = fdt_node_offset_by_prop_value(blob, mem,
1069 "device_type", "memory", 7);
1070 } while (!fdtdec_get_is_enabled(blob, mem));
1075 int fdtdec_setup_memory_banksize_fdt(const void *blob)
1077 int bank, ret, mem, reg = 0;
1078 struct fdt_resource res;
1080 mem = get_next_memory_node(blob, -1);
1082 debug("%s: Missing /memory node\n", __func__);
1086 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1087 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1088 if (ret == -FDT_ERR_NOTFOUND) {
1090 mem = get_next_memory_node(blob, mem);
1091 if (mem == -FDT_ERR_NOTFOUND)
1094 ret = fdt_get_resource(blob, mem, "reg", reg++, &res);
1095 if (ret == -FDT_ERR_NOTFOUND)
1102 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1103 gd->bd->bi_dram[bank].size =
1104 (phys_size_t)(res.end - res.start + 1);
1106 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1108 (unsigned long long)gd->bd->bi_dram[bank].start,
1109 (unsigned long long)gd->bd->bi_dram[bank].size);
1115 int fdtdec_setup_memory_banksize(void)
1117 return fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
1122 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1123 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1124 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1125 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1127 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1128 bool gzip = 0, lzo = 0;
1129 ulong sz_in = sz_src;
1133 if (CONFIG_IS_ENABLED(GZIP))
1134 if (gzip_parse_header(src, sz_in) >= 0)
1136 if (CONFIG_IS_ENABLED(LZO))
1137 if (!gzip && lzop_is_valid_header(src))
1144 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1145 dst = malloc(sz_out);
1147 puts("uncompress_blob: Unable to allocate memory\n");
1151 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1152 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1158 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1159 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1160 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1161 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1166 /* not a valid compressed blob */
1167 puts("uncompress_blob: Unable to uncompress\n");
1168 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1176 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1178 *dstp = (void *)src;
1184 #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1186 * For CONFIG_OF_SEPARATE, the board may optionally implement this to
1187 * provide and/or fixup the fdt.
1189 __weak void *board_fdt_blob_setup(void)
1191 void *fdt_blob = NULL;
1192 #ifdef CONFIG_SPL_BUILD
1193 /* FDT is at end of BSS unless it is in a different memory region */
1194 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1195 fdt_blob = (ulong *)&_image_binary_end;
1197 fdt_blob = (ulong *)&__bss_end;
1199 /* FDT is at end of image */
1200 fdt_blob = (ulong *)&_end;
1206 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1211 if (!is_valid_ethaddr(mac))
1214 path = fdt_get_alias(fdt, "ethernet");
1218 debug("ethernet alias found: %s\n", path);
1220 offset = fdt_path_offset(fdt, path);
1222 debug("ethernet alias points to absent node %s\n", path);
1226 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1230 debug("MAC address: %pM\n", mac);
1235 static int fdtdec_init_reserved_memory(void *blob)
1237 int na, ns, node, err;
1240 /* inherit #address-cells and #size-cells from the root node */
1241 na = fdt_address_cells(blob, 0);
1242 ns = fdt_size_cells(blob, 0);
1244 node = fdt_add_subnode(blob, 0, "reserved-memory");
1248 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1252 value = cpu_to_fdt32(ns);
1254 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1258 value = cpu_to_fdt32(na);
1260 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1267 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1268 const struct fdt_memory *carveout,
1271 fdt32_t cells[4] = {}, *ptr = cells;
1272 uint32_t upper, lower, phandle;
1273 int parent, node, na, ns, err;
1277 /* create an empty /reserved-memory node if one doesn't exist */
1278 parent = fdt_path_offset(blob, "/reserved-memory");
1280 parent = fdtdec_init_reserved_memory(blob);
1285 /* only 1 or 2 #address-cells and #size-cells are supported */
1286 na = fdt_address_cells(blob, parent);
1287 if (na < 1 || na > 2)
1288 return -FDT_ERR_BADNCELLS;
1290 ns = fdt_size_cells(blob, parent);
1291 if (ns < 1 || ns > 2)
1292 return -FDT_ERR_BADNCELLS;
1294 /* find a matching node and return the phandle to that */
1295 fdt_for_each_subnode(node, blob, parent) {
1296 const char *name = fdt_get_name(blob, node, NULL);
1300 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1302 if (addr == FDT_ADDR_T_NONE) {
1303 debug("failed to read address/size for %s\n", name);
1307 if (addr == carveout->start && (addr + size - 1) ==
1310 *phandlep = fdt_get_phandle(blob, node);
1316 * Unpack the start address and generate the name of the new node
1317 * base on the basename and the unit-address.
1319 upper = upper_32_bits(carveout->start);
1320 lower = lower_32_bits(carveout->start);
1322 if (na > 1 && upper > 0)
1323 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1327 debug("address %08x:%08x exceeds addressable space\n",
1329 return -FDT_ERR_BADVALUE;
1332 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1335 node = fdt_add_subnode(blob, parent, name);
1340 err = fdt_generate_phandle(blob, &phandle);
1344 err = fdtdec_set_phandle(blob, node, phandle);
1349 /* store one or two address cells */
1351 *ptr++ = cpu_to_fdt32(upper);
1353 *ptr++ = cpu_to_fdt32(lower);
1355 /* store one or two size cells */
1356 size = carveout->end - carveout->start + 1;
1357 upper = upper_32_bits(size);
1358 lower = lower_32_bits(size);
1361 *ptr++ = cpu_to_fdt32(upper);
1363 *ptr++ = cpu_to_fdt32(lower);
1365 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1369 /* return the phandle for the new node for the caller to use */
1371 *phandlep = phandle;
1376 int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
1377 unsigned int index, struct fdt_memory *carveout)
1379 const fdt32_t *prop;
1384 offset = fdt_path_offset(blob, node);
1388 prop = fdt_getprop(blob, offset, name, &len);
1390 debug("failed to get %s for %s\n", name, node);
1391 return -FDT_ERR_NOTFOUND;
1394 if ((len % sizeof(phandle)) != 0) {
1395 debug("invalid phandle property\n");
1396 return -FDT_ERR_BADPHANDLE;
1399 if (len < (sizeof(phandle) * (index + 1))) {
1400 debug("invalid phandle index\n");
1401 return -FDT_ERR_BADPHANDLE;
1404 phandle = fdt32_to_cpu(prop[index]);
1406 offset = fdt_node_offset_by_phandle(blob, phandle);
1408 debug("failed to find node for phandle %u\n", phandle);
1412 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1415 if (carveout->start == FDT_ADDR_T_NONE) {
1416 debug("failed to read address/size from \"reg\" property\n");
1417 return -FDT_ERR_NOTFOUND;
1420 carveout->end = carveout->start + size - 1;
1425 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1426 unsigned int index, const char *name,
1427 const struct fdt_memory *carveout)
1430 int err, offset, len;
1434 err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle);
1436 debug("failed to add reserved memory: %d\n", err);
1440 offset = fdt_path_offset(blob, node);
1442 debug("failed to find offset for node %s: %d\n", node, offset);
1446 value = cpu_to_fdt32(phandle);
1448 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1449 if (len == -FDT_ERR_NOTFOUND)
1455 if ((index + 1) * sizeof(value) > len) {
1456 err = fdt_setprop_placeholder(blob, offset, prop_name,
1457 (index + 1) * sizeof(value),
1460 debug("failed to resize reserved memory property: %s\n",
1466 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1468 index * sizeof(value),
1469 &value, sizeof(value));
1471 debug("failed to update %s property for node %s: %s\n",
1472 prop_name, node, fdt_strerror(err));
1479 __weak int fdtdec_board_setup(const void *fdt_blob)
1484 int fdtdec_setup(void)
1487 #if CONFIG_IS_ENABLED(OF_CONTROL)
1488 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1491 # ifdef CONFIG_OF_EMBED
1492 /* Get a pointer to the FDT */
1493 # ifdef CONFIG_SPL_BUILD
1494 gd->fdt_blob = __dtb_dt_spl_begin;
1496 gd->fdt_blob = __dtb_dt_begin;
1498 # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
1499 /* Allow the board to override the fdt address. */
1500 gd->fdt_blob = board_fdt_blob_setup();
1501 # elif defined(CONFIG_OF_HOSTFILE)
1502 if (sandbox_read_fdt_from_file()) {
1503 puts("Failed to read control FDT\n");
1506 # elif defined(CONFIG_OF_PRIOR_STAGE)
1507 gd->fdt_blob = (void *)prior_stage_fdt_address;
1509 # ifndef CONFIG_SPL_BUILD
1510 /* Allow the early environment to override the fdt address */
1511 gd->fdt_blob = map_sysmem
1512 (env_get_ulong("fdtcontroladdr", 16,
1513 (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
1516 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1518 * Try and uncompress the blob.
1519 * Unfortunately there is no way to know how big the input blob really
1520 * is. So let us set the maximum input size arbitrarily high. 16MB
1521 * ought to be more than enough for packed DTBs.
1523 if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
1524 gd->fdt_blob = fdt_blob;
1527 * Check if blob is a FIT images containings DTBs.
1528 * If so, pick the most relevant
1530 fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
1532 gd->multi_dtb_fit = gd->fdt_blob;
1533 gd->fdt_blob = fdt_blob;
1539 ret = fdtdec_prepare_fdt();
1541 ret = fdtdec_board_setup(gd->fdt_blob);
1545 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
1546 int fdtdec_resetup(int *rescan)
1551 * If the current DTB is part of a compressed FIT image,
1552 * try to locate the best match from the uncompressed
1553 * FIT image stillpresent there. Save the time and space
1554 * required to uncompress it again.
1556 if (gd->multi_dtb_fit) {
1557 fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
1559 if (fdt_blob == gd->fdt_blob) {
1561 * The best match did not change. no need to tear down
1562 * the DM and rescan the fdt.
1569 gd->fdt_blob = fdt_blob;
1570 return fdtdec_prepare_fdt();
1574 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1575 * not a FIT image containings DTB, but a single DTB. There is no need
1576 * to teard down DM and rescan the DT in this case.
1583 #ifdef CONFIG_NR_DRAM_BANKS
1584 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1585 phys_addr_t *basep, phys_size_t *sizep, bd_t *bd)
1587 int addr_cells, size_cells;
1588 const u32 *cell, *end;
1589 u64 total_size, size, addr;
1595 debug("%s: board_id=%d\n", __func__, board_id);
1598 node = fdt_path_offset(blob, area);
1600 debug("No %s node found\n", area);
1604 cell = fdt_getprop(blob, node, "reg", &len);
1606 debug("No reg property found\n");
1610 addr_cells = fdt_address_cells(blob, node);
1611 size_cells = fdt_size_cells(blob, node);
1613 /* Check the board id and mask */
1614 for (child = fdt_first_subnode(blob, node);
1616 child = fdt_next_subnode(blob, child)) {
1617 int match_mask, match_value;
1619 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1620 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1622 if (match_value >= 0 &&
1623 ((board_id & match_mask) == match_value)) {
1624 /* Found matching mask */
1625 debug("Found matching mask %d\n", match_mask);
1627 cell = fdt_getprop(blob, node, "reg", &len);
1629 debug("No memory-banks property found\n");
1635 /* Note: if no matching subnode was found we use the parent node */
1638 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1639 CONFIG_NR_DRAM_BANKS);
1642 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1645 end = cell + len / 4 - addr_cells - size_cells;
1646 debug("cell at %p, end %p\n", cell, end);
1647 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1651 if (addr_cells == 2)
1652 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1653 addr += fdt32_to_cpu(*cell++);
1655 bd->bi_dram[bank].start = addr;
1657 *basep = (phys_addr_t)addr;
1660 if (size_cells == 2)
1661 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1662 size += fdt32_to_cpu(*cell++);
1667 debug("Auto-sizing %llx, size %llx: ", addr, size);
1668 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1669 if (new_size == size) {
1672 debug("sized to %llx\n", new_size);
1678 bd->bi_dram[bank].size = size;
1682 debug("Memory size %llu\n", total_size);
1684 *sizep = (phys_size_t)total_size;
1688 #endif /* CONFIG_NR_DRAM_BANKS */
1690 #endif /* !USE_HOSTCC */