lib/e1000_hw.h

   1 /******************************************************************************
   2
   3   Copyright (c) 2001-2012, Intel Corporation
   4   All rights reserved.
   5
   6   Redistribution and use in source and binary forms, with or without
   7   modification, are permitted provided that the following conditions are met:
   8
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  10       this list of conditions and the following disclaimer.
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  12    2. Redistributions in binary form must reproduce the above copyright
  13       notice, this list of conditions and the following disclaimer in the
  14       documentation and/or other materials provided with the distribution.
  15
  16    3. Neither the name of the Intel Corporation nor the names of its
  17       contributors may be used to endorse or promote products derived from
  18       this software without specific prior written permission.
  19
  20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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  28   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30   POSSIBILITY OF SUCH DAMAGE.
  31
  32 ******************************************************************************/
  33 /*$FreeBSD$*/
  34
  35 #ifndef _E1000_HW_H_
  36 #define _E1000_HW_H_
  37
  38 #include "e1000_osdep.h"
  39 #include "e1000_regs.h"
  40 #include "e1000_defines.h"
  41
  42 struct e1000_hw;
  43
  44 #define E1000_DEV_ID_82576                      0x10C9
  45 #define E1000_DEV_ID_82576_FIBER                0x10E6
  46 #define E1000_DEV_ID_82576_SERDES               0x10E7
  47 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8
  48 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2      0x1526
  49 #define E1000_DEV_ID_82576_NS                   0x150A
  50 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
  51 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
  52 #define E1000_DEV_ID_82576_VF                   0x10CA
  53 #define E1000_DEV_ID_I350_VF                    0x1520
  54 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
  55 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
  56 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
  57 #define E1000_DEV_ID_82580_COPPER               0x150E
  58 #define E1000_DEV_ID_82580_FIBER                0x150F
  59 #define E1000_DEV_ID_82580_SERDES               0x1510
  60 #define E1000_DEV_ID_82580_SGMII                0x1511
  61 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516
  62 #define E1000_DEV_ID_82580_QUAD_FIBER           0x1527
  63 #define E1000_DEV_ID_I350_COPPER                0x1521
  64 #define E1000_DEV_ID_I350_FIBER                 0x1522
  65 #define E1000_DEV_ID_I350_SERDES                0x1523
  66 #define E1000_DEV_ID_I350_SGMII                 0x1524
  67 #define E1000_DEV_ID_I350_DA4                   0x1546
  68 #define E1000_DEV_ID_I210_COPPER                0x1533
  69 #define E1000_DEV_ID_I210_COPPER_OEM1           0x1534
  70 #define E1000_DEV_ID_I210_COPPER_IT             0x1535
  71 #define E1000_DEV_ID_I210_FIBER                 0x1536
  72 #define E1000_DEV_ID_I210_SERDES                0x1537
  73 #define E1000_DEV_ID_I210_SGMII                 0x1538
  74 #define E1000_DEV_ID_I211_COPPER                0x1539
  75 #define E1000_DEV_ID_DH89XXCC_SGMII             0x0438
  76 #define E1000_DEV_ID_DH89XXCC_SERDES            0x043A
  77 #define E1000_DEV_ID_DH89XXCC_BACKPLANE         0x043C
  78 #define E1000_DEV_ID_DH89XXCC_SFP               0x0440
  79 #define E1000_REVISION_0        0
  80 #define E1000_REVISION_1        1
  81 #define E1000_REVISION_2        2
  82 #define E1000_REVISION_3        3
  83 #define E1000_REVISION_4        4
  84
  85 #define E1000_FUNC_0            0
  86 #define E1000_FUNC_1            1
  87 #define E1000_FUNC_2            2
  88 #define E1000_FUNC_3            3
  89
  90 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0       0
  91 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1       3
  92 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2       6
  93 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3       9
  94
  95 enum e1000_mac_type {
  96         e1000_undefined = 0,
  97         e1000_82575,
  98         e1000_82576,
  99         e1000_82580,
 100         e1000_i350,
 101         e1000_i210,
 102         e1000_i211,
 103         e1000_vfadapt,
 104         e1000_vfadapt_i350,
 105         e1000_num_macs  /* List is 1-based, so subtract 1 for TRUE count. */
 106 };
 107
 108 #define __le16 u16
 109 #define __le32 u32
 110 #define __le64 u64
 111 /* Receive Descriptor */
 112 struct e1000_rx_desc {
 113         __le64 buffer_addr; /* Address of the descriptor's data buffer */
 114         __le16 length;      /* Length of data DMAed into data buffer */
 115         __le16 csum; /* Packet checksum */
 116         u8  status;  /* Descriptor status */
 117         u8  errors;  /* Descriptor Errors */
 118         __le16 special;
 119 };
 120
 121 /* Receive Descriptor - Extended */
 122 union e1000_rx_desc_extended {
 123         struct {
 124                 __le64 buffer_addr;
 125                 __le64 reserved;
 126         } read;
 127         struct {
 128                 struct {
 129                         __le32 mrq; /* Multiple Rx Queues */
 130                         union {
 131                                 __le32 rss; /* RSS Hash */
 132                                 struct {
 133                                         __le16 ip_id;  /* IP id */
 134                                         __le16 csum;   /* Packet Checksum */
 135                                 } csum_ip;
 136                         } hi_dword;
 137                 } lower;
 138                 struct {
 139                         __le32 status_error;  /* ext status/error */
 140                         __le16 length;
 141                         __le16 vlan; /* VLAN tag */
 142                 } upper;
 143         } wb;  /* writeback */
 144 };
 145
 146 #define MAX_PS_BUFFERS 4
 147 /* Receive Descriptor - Packet Split */
 148 union e1000_rx_desc_packet_split {
 149         struct {
 150                 /* one buffer for protocol header(s), three data buffers */
 151                 __le64 buffer_addr[MAX_PS_BUFFERS];
 152         } read;
 153         struct {
 154                 struct {
 155                         __le32 mrq;  /* Multiple Rx Queues */
 156                         union {
 157                                 __le32 rss; /* RSS Hash */
 158                                 struct {
 159                                         __le16 ip_id;    /* IP id */
 160                                         __le16 csum;     /* Packet Checksum */
 161                                 } csum_ip;
 162                         } hi_dword;
 163                 } lower;
 164                 struct {
 165                         __le32 status_error;  /* ext status/error */
 166                         __le16 length0;  /* length of buffer 0 */
 167                         __le16 vlan;  /* VLAN tag */
 168                 } middle;
 169                 struct {
 170                         __le16 header_status;
 171                         __le16 length[3];     /* length of buffers 1-3 */
 172                 } upper;
 173                 __le64 reserved;
 174         } wb; /* writeback */
 175 };
 176
 177 /* Transmit Descriptor */
 178 struct e1000_tx_desc {
 179         __le64 buffer_addr;   /* Address of the descriptor's data buffer */
 180         union {
 181                 __le32 data;
 182                 struct {
 183                         __le16 length;  /* Data buffer length */
 184                         u8 cso;  /* Checksum offset */
 185                         u8 cmd;  /* Descriptor control */
 186                 } flags;
 187         } lower;
 188         union {
 189                 __le32 data;
 190                 struct {
 191                         u8 status; /* Descriptor status */
 192                         u8 css;  /* Checksum start */
 193                         __le16 special;
 194                 } fields;
 195         } upper;
 196 };
 197
 198 /* Offload Context Descriptor */
 199 struct e1000_context_desc {
 200         union {
 201                 __le32 ip_config;
 202                 struct {
 203                         u8 ipcss;  /* IP checksum start */
 204                         u8 ipcso;  /* IP checksum offset */
 205                         __le16 ipcse;  /* IP checksum end */
 206                 } ip_fields;
 207         } lower_setup;
 208         union {
 209                 __le32 tcp_config;
 210                 struct {
 211                         u8 tucss;  /* TCP checksum start */
 212                         u8 tucso;  /* TCP checksum offset */
 213                         __le16 tucse;  /* TCP checksum end */
 214                 } tcp_fields;
 215         } upper_setup;
 216         __le32 cmd_and_length;
 217         union {
 218                 __le32 data;
 219                 struct {
 220                         u8 status;  /* Descriptor status */
 221                         u8 hdr_len;  /* Header length */
 222                         __le16 mss;  /* Maximum segment size */
 223                 } fields;
 224         } tcp_seg_setup;
 225 };
 226
 227 /* Offload data descriptor */
 228 struct e1000_data_desc {
 229         __le64 buffer_addr;  /* Address of the descriptor's buffer address */
 230         union {
 231                 __le32 data;
 232                 struct {
 233                         __le16 length;  /* Data buffer length */
 234                         u8 typ_len_ext;
 235                         u8 cmd;
 236                 } flags;
 237         } lower;
 238         union {
 239                 __le32 data;
 240                 struct {
 241                         u8 status;  /* Descriptor status */
 242                         u8 popts;  /* Packet Options */
 243                         __le16 special;
 244                 } fields;
 245         } upper;
 246 };
 247
 248 struct e1000_mac_info {
 249         u8 addr[ETH_ADDR_LEN];
 250         u8 perm_addr[ETH_ADDR_LEN];
 251         enum e1000_mac_type type;
 252
 253 };
 254
 255 struct e1000_hw {
 256         void *back;
 257         u8 *hw_addr;
 258         struct e1000_mac_info  mac;
 259         u16 device_id;
 260         u16 subsystem_vendor_id;
 261         u16 subsystem_device_id;
 262         u16 vendor_id;
 263
 264         u8  revision_id;
 265 };
 266
 267 #endif