2 * Copyright © 2007, 2011, 2013 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Daniel Vetter <daniel.vetter@ffwll.ch>
37 #include <sys/ioctl.h>
41 #include <pciaccess.h>
46 #include <sys/types.h>
47 #include <sys/syscall.h>
48 #include <sys/utsname.h>
53 #include "intel_chipset.h"
55 #include "igt_debugfs.h"
58 #include "intel_reg.h"
59 #include "ioctl_wrappers.h"
63 * @short_description: Base library for drm tests and tools
67 * This library contains the basic support for writing tests, with the most
68 * important part being the helper function to open drm device nodes.
70 * But there's also a bit of other assorted stuff here.
72 * Note that this library's header pulls in the [i-g-t core](intel-gpu-tools-i-g-t-core.html)
73 * and [batchbuffer](intel-gpu-tools-intel-batchbuffer.html) libraries as dependencies.
79 struct drm_i915_getparam gp;
82 gp.param = I915_PARAM_CHIPSET_ID;
85 if (ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp, sizeof(gp)))
88 return IS_INTEL(devid);
91 static void check_stop_rings(void)
93 enum stop_ring_flags flags;
94 flags = igt_get_stop_rings();
95 igt_warn_on_f(flags != 0,
96 "i915_ring_stop flags on exit 0x%x, can't quiescent gpu cleanly\n",
100 igt_set_stop_rings(STOP_RING_NONE);
103 #define LOCAL_I915_EXEC_VEBOX (4 << 0)
106 * @fd: open i915 drm file descriptor
108 * Ensure the gpu is idle by launching a nop execbuf and stalling for it. This
109 * is automatically run when opening a drm device node and is also installed as
110 * an exit handler to have the best assurance that the test is run in a pristine
111 * and controlled environment.
113 * This function simply allows tests to make additional calls in-between, if so
116 void gem_quiescent_gpu(int fd)
118 uint32_t batch[2] = {MI_BATCH_BUFFER_END, 0};
120 struct drm_i915_gem_execbuffer2 execbuf;
121 struct drm_i915_gem_exec_object2 gem_exec[1];
125 handle = gem_create(fd, 4096);
126 gem_write(fd, handle, 0, batch, sizeof(batch));
128 gem_exec[0].handle = handle;
129 gem_exec[0].relocation_count = 0;
130 gem_exec[0].relocs_ptr = 0;
131 gem_exec[0].alignment = 0;
132 gem_exec[0].offset = 0;
133 gem_exec[0].flags = 0;
134 gem_exec[0].rsvd1 = 0;
135 gem_exec[0].rsvd2 = 0;
137 execbuf.buffers_ptr = (uintptr_t)gem_exec;
138 execbuf.buffer_count = 1;
139 execbuf.batch_start_offset = 0;
140 execbuf.batch_len = 8;
141 execbuf.cliprects_ptr = 0;
142 execbuf.num_cliprects = 0;
146 i915_execbuffer2_set_context_id(execbuf, 0);
149 do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
151 if (gem_has_blt(fd)) {
152 execbuf.flags = I915_EXEC_BLT;
153 do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
156 if (gem_has_bsd(fd)) {
157 execbuf.flags = I915_EXEC_BSD;
158 do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
161 if (gem_has_vebox(fd)) {
162 execbuf.flags = LOCAL_I915_EXEC_VEBOX;
163 do_ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
166 gem_sync(fd, handle);
167 igt_drop_caches_set(DROP_RETIRE);
168 gem_close(fd, handle);
174 * Get an i915 drm card index number for use in /dev or /sys. The minor index of
175 * the legacy node is returned, not of the control or render node.
178 * The i915 drm index or -1 on error
180 int drm_get_card(void)
185 for (i = 0; i < 16; i++) {
188 ret = asprintf(&name, "/dev/dri/card%u", i);
189 igt_assert(ret != -1);
191 fd = open(name, O_RDWR);
206 igt_skip("No intel gpu found\n");
211 /** Open the first DRM device we can find, searching up to 16 device nodes */
212 static int __drm_open_any(void)
217 ret = asprintf(&name, "/dev/dri/card%d", drm_get_card());
221 fd = open(name, O_RDWR);
232 static int __drm_open_any_render(void)
237 for (i = 128; i < (128 + 16); i++) {
240 ret = asprintf(&name, "/dev/dri/renderD%u", i);
241 igt_assert(ret != -1);
243 fd = open(name, O_RDWR);
261 static int at_exit_drm_fd = -1;
262 static int at_exit_drm_render_fd = -1;
264 static void quiescent_gpu_at_exit(int sig)
266 if (at_exit_drm_fd < 0)
270 gem_quiescent_gpu(at_exit_drm_fd);
271 close(at_exit_drm_fd);
275 static void quiescent_gpu_at_exit_render(int sig)
277 if (at_exit_drm_render_fd < 0)
281 gem_quiescent_gpu(at_exit_drm_render_fd);
282 close(at_exit_drm_render_fd);
283 at_exit_drm_render_fd = -1;
289 * Open an i915 drm legacy device node.
292 * The i915 drm file descriptor or -1 on error
294 int drm_open_any(void)
296 static int open_count;
297 int fd = __drm_open_any();
299 igt_require(fd >= 0);
301 if (__sync_fetch_and_add(&open_count, 1))
304 gem_quiescent_gpu(fd);
305 at_exit_drm_fd = __drm_open_any();
306 igt_install_exit_handler(quiescent_gpu_at_exit);
314 * Open an i915 drm render device node.
317 * The i915 drm file descriptor or -1 on error
319 int drm_open_any_render(void)
321 static int open_count;
322 int fd = __drm_open_any_render();
324 /* no render nodes, fallback to drm_open_any() */
326 return drm_open_any();
328 if (__sync_fetch_and_add(&open_count, 1))
331 at_exit_drm_render_fd = __drm_open_any();
332 gem_quiescent_gpu(fd);
333 igt_install_exit_handler(quiescent_gpu_at_exit_render);