1 .*: file format elf32-.*arm
2 architecture: arm, flags 0x00000150:
3 HAS_SYMS, DYNAMIC, D_PAGED
6 Disassembly of section .plt:
9 8198: e52de004 push {lr} ; .*
10 819c: e59fe004 ldr lr, \[pc, #4\] ; .*
11 81a0: e08fe00e add lr, pc, lr
12 81a4: e5bef008 ldr pc, \[lr, #8\]!
13 81a8: 000080e0 .word 0x000080e0
14 81ac: e08e0000 add r0, lr, r0
15 81b0: e5901004 ldr r1, \[r0, #4\]
17 81b8: e52d2004 push {r2} ; .*
18 81bc: e59f200c ldr r2, \[pc, #12\] ; .*
19 81c0: e59f100c ldr r1, \[pc, #12\] ; .*
20 81c4: e79f2002 ldr r2, \[pc, r2\]
21 81c8: e081100f add r1, r1, pc
23 81d0: 000080d8 .word 0x000080d8
24 81d4: 000080b8 .word 0x000080b8
26 Disassembly of section .text:
29 81d8: e59f0004 ldr r0, \[pc, #4\] ; .*
30 81dc: fafffff2 blx 81ac .*
31 81e0: e1a00000 nop ; .*
32 81e4: 000080b4 .word 0x000080b4
33 81e8: 4801 ldr r0, \[pc, #4\] ; .*
34 81ea: f7ff efe0 blx 81ac <.*>
36 81f0: 000080a5 .word 0x000080a5
38 Disassembly of section .foo:
41 4001000: e59f0004 ldr r0, \[pc, #4\] ; .*
42 4001004: fa000009 blx 4001030 .*
43 4001008: e1a00000 nop ; .*
44 400100c: fc00f28c .word 0xfc00f28c
45 4001010: e59f0004 ldr r0, \[pc, #4\] ; .*
46 4001014: fa000005 blx 4001030 .*
47 4001018: e1a00000 nop ; .*
48 400101c: fc00f284 .word 0xfc00f284
49 4001020: 4801 ldr r0, \[pc, #4\] ; .*
50 4001022: f000 e806 blx 4001030 .*
51 4001026: 46c0 nop ; .*
52 4001028: fc00f26d .word 0xfc00f26d
53 400102c: 00000000 .word 0x00000000
55 04001030 <__unnamed_veneer>:
56 4001030: e59f1000 ldr r1, \[pc\] ; .*
57 4001034: e08ff001 add pc, pc, r1
58 4001038: fc007170 .word 0xfc007170
59 400103c: 00000000 .word 0x00000000