ld/emulparams/elf64ppc.sh

   1 . ${srcdir}/emulparams/elf32ppccommon.sh
   2 . ${srcdir}/emulparams/plt_unwind.sh
   3 EXTRA_EM_FILE=ppc64elf
   4 ELFSIZE=64
   5 OUTPUT_FORMAT="elf64-powerpc"
   6 TEXT_START_ADDR=0x10000000
   7 #SEGMENT_SIZE=0x10000000
   8 ARCH=powerpc:common64
   9 NOP=0x60000000
  10 unset EXECUTABLE_SYMBOLS
  11 unset SDATA_START_SYMBOLS
  12 unset SDATA2_START_SYMBOLS
  13 unset SBSS_START_SYMBOLS
  14 unset SBSS_END_SYMBOLS
  15 unset OTHER_END_SYMBOLS
  16 unset OTHER_RELRO_SECTIONS
  17 OTHER_TEXT_SECTIONS="*(.sfpr .glink)"
  18 BSS_PLT=
  19 OTHER_BSS_SYMBOLS="
  20   .tocbss       ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.tocbss)}"
  21 OTHER_PLT_RELOC_SECTIONS="
  22   .rela.tocbss  ${RELOCATING-0} : { *(.rela.tocbss) }"
  23
  24 if test x${RELOCATING+set} = xset; then
  25   GOT="
  26   .got          : ALIGN(8) { *(.got .toc) }"
  27 else
  28   GOT="
  29   .got          0 : { *(.got) }
  30   .toc          0 : { *(.toc) }"
  31 fi
  32 # Put .opd relocs first so ld.so will process them before any ifunc relocs.
  33 INITIAL_RELOC_SECTIONS="
  34   .rela.opd     ${RELOCATING-0} : { *(.rela.opd) }"
  35 OTHER_GOT_RELOC_SECTIONS="
  36   .rela.toc     ${RELOCATING-0} : { *(.rela.toc) }
  37   .rela.branch_lt       ${RELOCATING-0} : { *(.rela.branch_lt) }"
  38 OTHER_READWRITE_SECTIONS="
  39   .toc1         ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc1) }
  40   .branch_lt    ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.branch_lt) }"
  41 OTHER_RELRO_SECTIONS_2="
  42   .opd          ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { KEEP (*(.opd)) }"