2 * Dynamic Binary Instrumentation Module based on KProbes
3 * modules/kprobe/arch/asm-arm/dbi_kprobes.c
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 * Copyright (C) Samsung Electronics, 2006-2010
21 * 2006-2007 Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
22 * 2008-2009 Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
23 * Probes initial implementation; Support x86.
24 * 2010 Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
25 * 2010-2011 Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
26 * 2012 Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
27 * 2012 Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
28 * kprobe_handler() now called via undefined instruction hooks
29 * 2012 Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
32 #include <linux/module.h>
35 #include "dbi_kprobes.h"
36 #include "../dbi_kprobes.h"
37 #include "../../dbi_kprobes.h"
39 #include "../../dbi_kdebug.h"
40 #include "../../dbi_insn_slots.h"
41 #include "../../dbi_kprobes_deps.h"
42 #include "../../dbi_uprobes.h"
45 #include <asm/cacheflush.h>
48 #include <linux/time.h>
51 #include <asm/traps.h>
52 #include <asm/ptrace.h>
53 #include <linux/list.h>
54 #include <linux/hash.h>
56 #define SUPRESS_BUG_MESSAGES
58 extern struct kprobe * per_cpu__current_kprobe;
59 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
62 unsigned long swap_sum_time = 0;
63 unsigned long swap_sum_hit = 0;
64 EXPORT_SYMBOL_GPL (swap_sum_time);
65 EXPORT_SYMBOL_GPL (swap_sum_hit);
68 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
69 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
71 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t *addr)
73 // real position less then PC by 8
74 return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
77 static unsigned int arr_traps_template[] = {
78 0xe1a0c00d, // mov ip, sp
79 0xe92dd800, // stmdb sp!, {fp, ip, lr, pc}
80 0xe24cb004, // sub fp, ip, #4 ; 0x4
82 0xe3500000, // cmp r0, #0 ; 0x0
83 0xe89da800, // ldmia sp, {fp, sp, pc}
89 static struct kprobe trampoline_p =
91 .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
92 .pre_handler = trampoline_probe_handler
95 // is instruction Thumb2 and NOT a branch, etc...
96 static int isThumb2(kprobe_opcode_t insn)
98 if(( (insn & 0xf800) == 0xe800 ||
99 (insn & 0xf800) == 0xf000 ||
100 (insn & 0xf800) == 0xf800)) return 1;
105 static int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
113 for (i = 0; i < 13; i++, reg_mask <<= 1)
115 if (!(insn & reg_mask))
121 for (i = 0; i < 13; i++)
123 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
125 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
127 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
129 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
136 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
139 DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
141 // set register to save
142 ARM_INSN_REG_SET_RD (insns[0], i);
143 // set register to load address to
144 ARM_INSN_REG_SET_RD (insns[1], i);
145 // set instruction to execute and patch it
148 ARM_INSN_REG_CLEAR_MR (insn, 15);
149 ARM_INSN_REG_SET_MR (insn, i);
153 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
154 ARM_INSN_REG_SET_RN (insn, i);
155 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
156 ARM_INSN_REG_SET_RD (insn, i);
157 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
158 ARM_INSN_REG_SET_RS (insn, i);
159 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
160 ARM_INSN_REG_SET_RM (insn, i);
162 insns[UPROBES_TRAMP_INSN_IDX] = insn;
163 // set register to restore
164 ARM_INSN_REG_SET_RD (insns[3], i);
170 static int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
172 unsigned char mreg = 0;
173 unsigned char reg = 0;
176 if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
178 reg = ((insn & 0xffff) & uregs) >> 8;
180 if (THUMB_INSN_MATCH (MOV3, insn))
182 if (((((unsigned char) insn) & 0xff) >> 3) == 15)
183 reg = (insn & 0xffff) & uregs;
187 if (THUMB2_INSN_MATCH (ADR, insn))
189 reg = ((insn >> 16) & uregs) >> 8;
190 if (reg == 15) return 0;
192 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
193 THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
194 THUMB2_INSN_MATCH (LDRWL, insn))
196 reg = ((insn >> 16) & uregs) >> 12;
197 if (reg == 15) return 0;
199 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
200 if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
202 reg = ((insn >> 16) & uregs) >> 12;
204 if (THUMB2_INSN_MATCH (DP, insn))
206 reg = ((insn >> 16) & uregs) >> 12;
207 if (reg == 15) return 0;
209 if (THUMB2_INSN_MATCH (RSBW, insn))
211 reg = ((insn >> 12) & uregs) >> 8;
212 if (reg == 15) return 0;
214 if (THUMB2_INSN_MATCH (RORW, insn))
216 reg = ((insn >> 12) & uregs) >> 8;
217 if (reg == 15) return 0;
219 if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
221 reg = ((insn >> 12) & uregs) >> 8;
222 if (reg == 15) return 0;
224 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
228 if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
230 reg = THUMB2_INSN_REG_RM(insn);
243 if (( THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
244 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
245 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
247 reg = THUMB2_INSN_REG_RT(insn);
250 if (reg == 6 || reg == 7)
252 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
253 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
254 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
255 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
256 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
257 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
258 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
259 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
263 if (THUMB_INSN_MATCH (APC, insn))
265 // ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
266 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800); // ADD Rd, SP, #immed_8*4
268 if (THUMB_INSN_MATCH (LRO3, insn))
270 // LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
271 *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000); // LDR Rd, [SP, #immed_8*4]
273 if (THUMB_INSN_MATCH (MOV3, insn))
275 // MOV Rd, PC -> MOV Rd, SP
276 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10); // MOV Rd, SP
278 if (THUMB2_INSN_MATCH (ADR, insn))
280 // ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
281 insns[2] = (insn & 0xfffffff0) | 0x0d; // ADDW Rd, SP, #imm
283 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
284 THUMB2_INSN_MATCH (LDRHW, insn))
286 // LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
287 // !!!!!!!!!!!!!!!!!!!!!!!!
288 // !!! imm_12 vs. imm_8 !!!
289 // !!!!!!!!!!!!!!!!!!!!!!!!
290 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d; // LDR.W Rt, [SP, #-<imm_8>]
292 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
293 THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
294 THUMB2_INSN_MATCH (LDREX, insn))
296 // LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
297 insns[2] = (insn & 0xfffffff0) | 0xd; // LDRx.W Rt, [SP, #+<imm_12>]
299 if (THUMB2_INSN_MATCH (MUL, insn))
301 insns[2] = (insn & 0xfff0ffff) | 0x000d0000; // MUL Rd, Rn, SP
302 }else{ if (THUMB2_INSN_MATCH (DP, insn))
304 if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000; // DP Rd, Rn, PC
305 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd; // DP Rd, PC, Rm
306 }else{ if (THUMB2_INSN_MATCH (LDRWL, insn))
308 // LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
309 insns[2] = (insn & 0xfffffff0) | 0xd; // LDRx.W Rt, [SP, #+<imm_12>]
310 }else{ if (THUMB2_INSN_MATCH (RSBW, insn))
312 insns[2] = (insn & 0xfffffff0) | 0xd; // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
313 }else{ if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
315 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
317 insns[2] = (insn & 0xfffdfffd); // ROR.W Rd, PC, PC
318 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000; // ROR.W Rd, Rn, PC
319 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd; // ROR.W Rd, PC, Rm
320 }else{ if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
322 insns[2] = (insn & 0xfff0ffff) | 0xd0000; // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
336 if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
338 insns[2] = (insn & 0xfff0ffff) | 0x000d0000; // STRx.W Rt, [Rn, SP]
340 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
342 if (THUMB2_INSN_REG_RN(insn) == 15)
344 insns[2] = (insn & 0xfffffff0) | 0xd; // STRD/T/HT{.W} Rt, [SP, ...]
349 if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
351 if (THUMB2_INSN_REG_RN(insn) == 15)
353 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d; // STRH.W Rt, [SP, #-<imm_8>]
362 if ((reg == 15) && (THUMB2_INSN_MATCH (STRW, insn) || \
363 THUMB2_INSN_MATCH (STRBW, insn) || \
364 THUMB2_INSN_MATCH (STRD, insn) || \
365 THUMB2_INSN_MATCH (STRHT, insn) || \
366 THUMB2_INSN_MATCH (STRT, insn) || \
367 THUMB2_INSN_MATCH (STRHW1, insn) || \
368 THUMB2_INSN_MATCH (STRHW, insn) ))
370 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
375 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
377 insns[2] = (insn & 0xfffffff0) | 0xd; // TEQ SP, #<const>
378 }else{ if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
380 if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
382 insns[2] = (insn & 0xfffdfffd); // TEQ/TST PC, PC
383 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000; // TEQ/TST Rn, PC
384 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd; // TEQ/TST PC, Rm
393 static int arch_check_insn_arm (struct arch_specific_insn *ainsn)
397 // check instructions that can change PC by nature
399 // ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
400 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
401 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
402 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
403 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
404 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
405 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
406 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
407 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
409 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
412 #ifndef CONFIG_CPU_V7
413 // check instructions that can write result to PC
414 else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
415 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
416 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
417 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
418 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
419 (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
421 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
424 #endif // CONFIG_CPU_V7
425 // check special instruction loads store multiple registers
426 else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
427 // store pc or load to pc
428 (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
429 // store/load with pc update
430 ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
432 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
438 static int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
442 // check instructions that can change PC
443 if ( THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
444 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
445 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
446 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
447 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
448 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
449 THUMB_INSN_MATCH (CBZ, ainsn->insn_thumb[0]) ||
450 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
451 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
452 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
453 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
454 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
455 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
456 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
457 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
458 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
459 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
460 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
461 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
462 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
463 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
464 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
465 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
466 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
467 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
468 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
469 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
470 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
471 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
472 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
473 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
474 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
475 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
476 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
477 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
478 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
479 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
480 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
481 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
482 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
484 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
491 int arch_prepare_kretprobe (struct kretprobe *p)
493 DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
497 int arch_prepare_kprobe (struct kprobe *p)
499 kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
500 int uregs, pc_dep, ret = 0;
501 kprobe_opcode_t insn[MAX_INSN_SIZE];
502 struct arch_specific_insn ainsn;
504 /* insn: must be on special executable page on i386. */
505 p->ainsn.insn = get_insn_slot (NULL, 0);
509 memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
510 ainsn.insn_arm = ainsn.insn = insn;
511 ret = arch_check_insn_arm (&ainsn);
514 p->opcode = *p->addr;
518 if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
519 ARM_INSN_MATCH (SRO, insn[0]))
522 if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
523 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
525 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
530 else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
531 ARM_INSN_MATCH (SIO, insn[0]))
534 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
535 (ARM_INSN_REG_RD (insn[0]) == 15)))
538 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
542 else if(ARM_INSN_MATCH (DPRS, insn[0]))
545 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
546 (ARM_INSN_REG_RS (insn[0]) == 15))
549 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
553 else if(ARM_INSN_MATCH (SM, insn[0]))
556 if (ARM_INSN_REG_MR (insn[0], 15))
558 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
562 // check instructions that can write result to SP andu uses PC
563 if (pc_dep && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
565 free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
572 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
573 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
575 DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
576 free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
579 insns[6] = (kprobe_opcode_t) (p->addr + 2);
583 memcpy (insns, gen_insn_execbuf, sizeof (insns));
584 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
586 insns[7] = (kprobe_opcode_t) (p->addr + 1);
587 DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
588 DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
589 p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
590 insns[5], insns[6], insns[7], insns[8]);
591 memcpy (p->ainsn.insn, insns, sizeof(insns));
592 flush_icache_range((long unsigned)p->ainsn.insn, (long unsigned)(p->ainsn.insn) + sizeof(insns));
600 free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
601 printk("arch_prepare_kprobe: instruction 0x%lx not instrumentation, addr=0x%p\n", insn[0], p->addr);
607 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
609 kprobe_opcode_t insn;
610 unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
613 DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
614 if (abs (insn & 0xffffff) > 0xffffff)
616 DBPRINTF ("ERROR: kprobe address out of range\n");
619 insn = insn & 0xffffff;
620 insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
621 DBPRINTF ("insn=%lX\n", insn);
622 return (unsigned int) insn;
626 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
627 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
629 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
632 kprobe_opcode_t insn[MAX_INSN_SIZE];
634 if ((unsigned long) p->addr & 0x01)
636 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
639 if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
640 panic ("Failed to read memory task[tgid=%u, comm=%s] %p!\n", task->tgid, task->comm, p->addr);
642 p->ainsn.insn_arm = get_insn_slot(task, atomic);
643 if (!p->ainsn.insn_arm) {
644 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
647 ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
649 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
652 p->ainsn.insn_thumb = get_insn_slot(task, atomic);
653 if (!p->ainsn.insn_thumb) {
654 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
657 ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
659 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
660 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
663 if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
664 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both) [tgid=%u, addr=%lx, data=%lx]\n",
665 __FILE__, __LINE__, task->tgid, (unsigned long)p->addr, (unsigned long)p->opcode);
666 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
667 panic ("Failed to write memory %p!\n", p->addr);
668 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
669 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
675 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
677 DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
681 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
684 regs->ARM_pc = (unsigned long)p->ss_addr;
687 regs->ARM_pc = (unsigned long)p->ainsn.insn;
691 void save_previous_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p_run)
694 panic("arm_save_previous_kprobe: p_run == NULL\n");
697 if (kcb->prev_kprobe.kp != NULL) {
698 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
701 kcb->prev_kprobe.kp = p_run;
702 kcb->prev_kprobe.status = kcb->kprobe_status;
705 void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
707 set_current_kprobe(kcb->prev_kprobe.kp, NULL, NULL);
708 kcb->kprobe_status = kcb->prev_kprobe.status;
709 kcb->prev_kprobe.kp = NULL;
710 kcb->prev_kprobe.status = 0;
713 void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
715 __get_cpu_var(current_kprobe) = p;
716 DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
719 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
721 kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
723 kprobe_opcode_t insn[MAX_INSN_SIZE];
724 struct arch_specific_insn ainsn;
727 if ((unsigned long) p->addr & 0x01)
729 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
733 ainsn.insn_arm = insn;
734 if (!arch_check_insn_arm(&ainsn))
740 if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
741 ARM_INSN_MATCH (SRO, insn[0]))
744 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
745 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
747 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
752 else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
753 ARM_INSN_MATCH (SIO, insn[0]))
756 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
757 (ARM_INSN_REG_RD (insn[0]) == 15)))
760 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
764 else if (ARM_INSN_MATCH (DPRS, insn[0]))
767 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
768 (ARM_INSN_REG_RS (insn[0]) == 15))
771 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
775 else if (ARM_INSN_MATCH (SM, insn[0]))
778 if (ARM_INSN_REG_MR (insn[0], 15))
780 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
784 // check instructions that can write result to SP andu uses PC
785 if (pc_dep && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
787 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
789 // TODO: move free to later phase
790 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
793 if (unlikely(uregs && pc_dep))
795 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
796 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
798 printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
799 __FILE__, __LINE__, insn[0]);
801 // TODO: move free to later phase
802 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
805 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
806 insns[6] = (kprobe_opcode_t) (p->addr + 2);
810 memcpy (insns, gen_insn_execbuf, sizeof (insns));
811 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
813 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
814 insns[7] = (kprobe_opcode_t) (p->addr + 1);
817 if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
819 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
820 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
821 insns[6] = (kprobe_opcode_t) (p->addr + 2);
822 insns[7] = get_addr_b(p->opcode, p->addr);
825 DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
826 p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
827 insns[5], insns[6], insns[7], insns[8]);
828 if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
830 panic("failed to write memory %p!\n", p->ainsn.insn);
831 // Mr_Nobody: we have to panic, really??...
832 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
838 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
842 kprobe_opcode_t insn[MAX_INSN_SIZE];
843 struct arch_specific_insn ainsn;
844 kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
847 if ((unsigned long) p->addr & 0x01)
849 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
853 ainsn.insn_thumb = insn;
854 if (!arch_check_insn_thumb(&ainsn))
860 if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
862 uregs = 0x0700; // 8-10
865 else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
871 else if THUMB2_INSN_MATCH (ADR, insn[0])
873 uregs = 0x0f00; // Rd 8-11
876 else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0]) ||
877 THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
878 THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
879 THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
880 THUMB2_INSN_MATCH (LDREX, insn[0]) ||
881 ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
882 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
883 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
884 ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
885 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
887 uregs = 0xf000; // Rt 12-15
890 else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
892 uregs = 0xff00; // Rt 12-15, Rt2 8-11
895 else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
900 else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
902 uregs = 0xf000; // Rd 12-15
905 else if (THUMB2_INSN_MATCH(STRD, insn[0]) && ((THUMB2_INSN_REG_RN(insn[0]) == 15) || (THUMB2_INSN_REG_RT(insn[0]) == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
907 uregs = 0xff00; // Rt 12-15, Rt2 8-11
910 else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
912 uregs = 0x0f00; // Rd 8-11
915 else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
920 else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
922 uregs = 0x0f00; // Rd 8-11
925 else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
927 uregs = 0x0f00; // Rd 8-11
930 else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
932 uregs = 0xf0000; //Rn 0-3 (16-19)
935 else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
936 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
938 uregs = 0xf0000; //Rn 0-3 (16-19)
941 if (unlikely(uregs && pc_dep))
943 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
944 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
946 printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
947 __FILE__, __LINE__, insn[0]);
949 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
952 addr = ((unsigned int)p->addr) + 4;
953 *((unsigned short*)insns + 13) = 0xdeff;
954 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
955 *((unsigned short*)insns + 15) = addr >> 16;
956 if (!isThumb2(insn[0]))
958 addr = ((unsigned int)p->addr) + 2;
959 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
960 *((unsigned short*)insns + 17) = addr >> 16;
963 addr = ((unsigned int)p->addr) + 4;
964 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
965 *((unsigned short*)insns + 17) = addr >> 16;
969 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
970 *((unsigned short*)insns + 13) = 0xdeff;
971 if (!isThumb2(insn[0]))
973 addr = ((unsigned int)p->addr) + 2;
974 *((unsigned short*)insns + 2) = insn[0];
975 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
976 *((unsigned short*)insns + 17) = addr >> 16;
979 addr = ((unsigned int)p->addr) + 4;
981 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
982 *((unsigned short*)insns + 17) = addr >> 16;
985 if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
987 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
988 // Mr_Nobody: we have to panic, really??...
989 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
995 static int check_validity_insn(struct kprobe *p, struct pt_regs *regs, struct task_struct *task)
999 if (unlikely(thumb_mode(regs))) {
1000 if (p->safe_thumb != -1) {
1001 p->ainsn.insn = p->ainsn.insn_thumb;
1002 list_for_each_entry_rcu(kp, &p->list, list) {
1003 kp->ainsn.insn = p->ainsn.insn_thumb;
1006 printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1007 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1008 // Test case when we do our actions on already running application
1009 arch_disarm_uprobe(p, task);
1013 if (p->safe_arm != -1) {
1014 p->ainsn.insn = p->ainsn.insn_arm;
1015 list_for_each_entry_rcu(kp, &p->list, list) {
1016 kp->ainsn.insn = p->ainsn.insn_arm;
1019 printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1020 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1021 // Test case when we do our actions on already running application
1022 arch_disarm_uprobe(p, task);
1030 static int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
1033 unsigned long flags;
1034 local_irq_save(flags);
1035 ret = kprobe_handler(regs);
1036 local_irq_restore(flags);
1040 int kprobe_handler(struct pt_regs *regs)
1043 char *msg_out = NULL;
1044 unsigned long user_m = user_mode(regs);
1045 pid_t tgid = (user_m) ? current->tgid : 0;
1046 kprobe_opcode_t *addr = (kprobe_opcode_t *) (regs->ARM_pc);
1048 struct kprobe *p = NULL, *p_run = NULL;
1049 int ret = 0, retprobe = 0, reenter = 0;
1050 kprobe_opcode_t *ssaddr = NULL;
1051 struct kprobe_ctlblk *kcb;
1053 #ifdef SUPRESS_BUG_MESSAGES
1054 int swap_oops_in_progress;
1055 // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1056 swap_oops_in_progress = oops_in_progress;
1057 oops_in_progress = 1;
1059 #ifdef OVERHEAD_DEBUG
1060 struct timeval swap_tv1;
1061 struct timeval swap_tv2;
1062 #define USEC_IN_SEC_NUM 1000000
1063 do_gettimeofday(&swap_tv1);
1067 // printk("### kprobe_handler: task[tgid=%u (%s)] addr=%p\n", tgid, current->comm, addr);
1068 p = get_kprobe(addr, tgid);
1070 if (user_m && p && (check_validity_insn(p, regs, current) != 0)) {
1071 goto no_kprobe_live;
1074 /* We're in an interrupt, but this is clear and BUG()-safe. */
1075 kcb = get_kprobe_ctlblk ();
1077 /* Check we're not actually recursing */
1078 // TODO: event is not saving in trace
1079 p_run = kprobe_running();
1082 DBPRINTF("lock???");
1085 if (!tgid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)) {
1086 save_previous_kprobe(kcb, p_run);
1087 kcb->kprobe_status = KPROBE_REENTER;
1090 /* We have reentered the kprobe_handler(), since
1091 * another probe was hit while within the handler.
1092 * We here save the original kprobes variables and
1093 * just single step on the instruction of the new probe
1094 * without calling any user handlers.
1096 kprobes_inc_nmissed_count (p);
1097 prepare_singlestep (p, regs);
1103 if(tgid) { //we can reenter probe upon uretprobe exception
1104 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1105 // UNDEF_INSTRUCTION from user space
1107 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1109 save_previous_kprobe(kcb, p_run);
1110 kcb->kprobe_status = KPROBE_REENTER;
1113 DBPRINTF ("uretprobe %p\n", addr);
1118 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1119 /*if (p->break_handler && p->break_handler(p, regs)) {
1120 DBPRINTF("kprobe_running !!! goto ss");
1123 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1125 ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1127 ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1128 if (addr == ssaddr) {
1129 regs->ARM_pc = (unsigned long) (p->addr + 1);
1130 DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->ARM_pc);
1131 if (kcb->kprobe_status == KPROBE_REENTER) {
1132 restore_previous_kprobe(kcb);
1134 reset_current_kprobe();
1137 DBPRINTF ("kprobe_running !!! goto no");
1139 /* If it's not ours, can't be delete race, (we hold lock). */
1140 DBPRINTF ("no_kprobe");
1148 DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1149 // UNDEF_INSTRUCTION from user space
1151 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1153 /* Not one of ours: let kernel handle it */
1154 DBPRINTF ("no_kprobe");
1158 DBPRINTF ("uretprobe %p\n", addr);
1160 /* Not one of ours: let kernel handle it */
1161 DBPRINTF ("no_kprobe");
1165 // restore opcode for thumb app
1166 if (user_mode( regs ) && thumb_mode( regs )) {
1167 if (!isThumb2(p->opcode)) {
1168 unsigned long tmp = p->opcode >> 16;
1169 write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1171 // "2*sizeof(kprobe_opcode_t)" - strange. Should be "sizeof(kprobe_opcode_t)", need to test
1172 flush_icache_range((unsigned int) p->addr, ((unsigned int)p->addr) + (2 * sizeof(kprobe_opcode_t)));
1175 set_current_kprobe(p, NULL, NULL);
1177 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1178 if (retprobe) { //(einsn == UNDEF_INSTRUCTION)
1179 ret = trampoline_probe_handler (p, regs);
1180 } else if (p->pre_handler) {
1181 ret = p->pre_handler (p, regs);
1182 if(p->pre_handler != trampoline_probe_handler) {
1183 reset_current_kprobe();
1188 /* handler has already set things up, so skip ss setup */
1194 msg_out = "no_kprobe\n";
1195 err_out = 1; // return with death
1199 msg_out = "no_kprobe live\n";
1200 err_out = 0; // ok - life is life
1204 preempt_enable_no_resched();
1205 #ifdef OVERHEAD_DEBUG
1206 do_gettimeofday(&swap_tv2);
1208 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1209 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1211 #ifdef SUPRESS_BUG_MESSAGES
1212 oops_in_progress = swap_oops_in_progress;
1222 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1224 struct jprobe *jp = container_of (p, struct jprobe, kp);
1225 kprobe_pre_entry_handler_t pre_entry;
1226 entry_point_t entry;
1229 // p = kprobe_running(regs);
1232 DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1233 entry = (entry_point_t) jp->entry;
1234 pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1236 // DIE("entry NULL", regs)
1237 DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1239 //call handler for all kernel probes and user space ones which belong to current tgid
1240 if (!p->tgid || (p->tgid == current->tgid))
1242 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1243 patch_suspended_all_task_ret_addr(sched_rp);
1246 p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1248 entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1252 dbi_arch_uprobe_return ();
1254 dbi_jprobe_return ();
1258 dbi_arch_uprobe_return ();
1260 prepare_singlestep (p, regs);
1265 void dbi_jprobe_return (void)
1269 void dbi_arch_uprobe_return (void)
1273 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1276 //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1277 kprobe_opcode_t insns[2];
1281 insns[0] = BREAKPOINT_INSTRUCTION;
1282 insns[1] = p->opcode;
1283 //p->opcode = *p->addr;
1284 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1286 printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1289 //*p->addr = BREAKPOINT_INSTRUCTION;
1290 //*(p->addr+1) = p->opcode;
1291 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1293 printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1299 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1300 *(p->addr + 1) = p->opcode;
1301 p->opcode = *p->addr;
1302 *p->addr = BREAKPOINT_INSTRUCTION;
1304 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1307 reset_current_kprobe();
1315 void arch_arm_kprobe (struct kprobe *p)
1317 *p->addr = BREAKPOINT_INSTRUCTION;
1318 flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1321 void arch_disarm_kprobe (struct kprobe *p)
1323 *p->addr = p->opcode;
1324 flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1328 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1330 struct kretprobe_instance *ri = NULL;
1331 struct hlist_head *head;
1332 struct hlist_node *node, *tmp;
1333 unsigned long flags, orig_ret_address = 0;
1334 unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1336 struct kretprobe *crp = NULL;
1337 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1342 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1343 if (!thumb_mode( regs ))
1344 trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1346 trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1349 spin_lock_irqsave (&kretprobe_lock, flags);
1352 * We are using different hash keys (current and mm) for finding kernel
1353 * space and user space probes. Kernel space probes can change mm field in
1354 * task_struct. User space probes can be shared between threads of one
1355 * process so they have different current but same mm.
1358 head = kretprobe_inst_table_head(current->mm);
1360 head = kretprobe_inst_table_head(current);
1364 * It is possible to have multiple instances associated with a given
1365 * task either because an multiple functions in the call path
1366 * have a return probe installed on them, and/or more then one
1367 * return probe was registered for a target function.
1369 * We can handle this because:
1370 * - instances are always inserted at the head of the list
1371 * - when multiple return probes are registered for the same
1372 * function, the first instance's ret_addr will point to the
1373 * real return address, and all the rest will point to
1374 * kretprobe_trampoline
1376 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1378 if (ri->task != current)
1379 /* another task is sharing our hash bucket */
1381 if (ri->rp && ri->rp->handler){
1382 ri->rp->handler (ri, regs, ri->rp->priv_arg);
1385 orig_ret_address = (unsigned long) ri->ret_addr;
1386 recycle_rp_inst (ri);
1387 if (orig_ret_address != trampoline_address)
1389 * This is the real return address. Any other
1390 * instances associated with this task are for
1391 * other calls deeper on the call stack
1395 kretprobe_assert (ri, orig_ret_address, trampoline_address);
1396 //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1397 //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1398 //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1399 //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1400 //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1401 //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1403 if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1404 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1406 regs->uregs[14] = orig_ret_address;
1407 DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1408 DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1410 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1412 regs->uregs[15] = orig_ret_address;
1414 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1415 else regs->uregs[15] += 2;
1418 DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1420 if(p){ // ARM, MIPS, X86 user space
1421 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1423 regs->ARM_cpsr &= 0xFFFFFFDF;
1425 if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1427 regs->ARM_cpsr |= 0x20;
1431 //TODO: test - enter function, delete us retprobe, exit function
1432 // for user space retprobes only - deferred deletion
1434 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1436 // if we are not at the end of the list and current retprobe should be disarmed
1437 if (node && ri->rp2)
1439 struct hlist_node *current_node = node;
1441 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1442 crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1443 DIE(die_msg, regs); */
1444 // look for other instances for the same retprobe
1445 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1448 * Trying to find another retprobe instance associated with
1449 * the same retprobe.
1451 if (ri->rp2 == crp && node != current_node)
1457 // if there are no more instances for this retprobe
1459 struct kprobe *is_p = &crp->kp;
1460 DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1462 If there is no any retprobe instances of this retprobe
1463 we can free the resources related to the probe.
1465 if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1466 hlist_del_rcu(&is_p->is_hlist_arm);
1468 if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1469 hlist_del_rcu(&is_p->is_hlist_thumb);
1471 unregister_uprobe (&crp->kp, current, 1);
1474 hlist_del(current_node);
1478 if (kcb->kprobe_status == KPROBE_REENTER) {
1479 restore_previous_kprobe(kcb);
1481 reset_current_kprobe();
1485 spin_unlock_irqrestore (&kretprobe_lock, flags);
1488 * By returning a non-zero value, we are telling
1489 * kprobe_handler() that we don't want the post_handler
1490 * to run (and have re-enabled preemption)
1496 void __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1498 struct kretprobe_instance *ri;
1500 DBPRINTF ("start\n");
1501 //TODO: test - remove retprobe after func entry but before its exit
1502 if ((ri = get_free_rp_inst (rp)) != NULL)
1507 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1508 ri->sp = (kprobe_opcode_t *)regs->ARM_sp; //uregs[13];
1511 if (!thumb_mode( regs ))
1512 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1514 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1516 else /* Replace the return addr with trampoline addr */
1517 regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1519 // DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1523 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1529 int asm_init_module_dependencies(void)
1531 //No module dependencies
1535 typedef void (* kpro_type)(struct undef_hook *);
1536 static kpro_type do_kpro;
1537 static kpro_type undo_kpro;
1539 // kernel probes hook
1540 static struct undef_hook undef_ho_k = {
1541 .instr_mask = 0xffffffff,
1542 .instr_val = BREAKPOINT_INSTRUCTION,
1543 .cpsr_mask = MODE_MASK,
1544 .cpsr_val = SVC_MODE,
1545 .fn = kprobe_trap_handler
1548 // userspace probes hook (arm)
1549 static struct undef_hook undef_ho_u = {
1550 .instr_mask = 0xffffffff,
1551 .instr_val = BREAKPOINT_INSTRUCTION,
1552 .cpsr_mask = MODE_MASK,
1553 .cpsr_val = USR_MODE,
1554 .fn = kprobe_trap_handler
1557 // userspace probes hook (thumb)
1558 static struct undef_hook undef_ho_u_t = {
1559 .instr_mask = 0xffffffff,
1560 .instr_val = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1561 .cpsr_mask = MODE_MASK,
1562 .cpsr_val = USR_MODE,
1563 .fn = kprobe_trap_handler
1566 int __init arch_init_kprobes (void)
1568 unsigned int do_bp_handler = 0;
1571 if (arch_init_module_dependencies())
1573 DBPRINTF ("Unable to init module dependencies\n");
1577 do_bp_handler = swap_ksyms("do_undefinstr");
1578 if (do_bp_handler == 0) {
1579 DBPRINTF("no do_undefinstr symbol found!");
1582 arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1583 // Register hooks (kprobe_handler)
1584 do_kpro = (kpro_type)swap_ksyms("register_undef_hook");
1585 if (do_kpro == NULL) {
1586 printk("no register_undef_hook symbol found!\n");
1590 // Unregister hooks (kprobe_handler)
1591 undo_kpro = (kpro_type)swap_ksyms("unregister_undef_hook");
1592 if (undo_kpro == NULL) {
1593 printk("no unregister_undef_hook symbol found!\n");
1597 do_kpro(&undef_ho_k);
1598 do_kpro(&undef_ho_u);
1599 do_kpro(&undef_ho_u_t);
1600 if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1601 //dbi_unregister_jprobe(&do_exit_p, 0);
1607 void __exit dbi_arch_exit_kprobes (void)
1609 undo_kpro(&undef_ho_u_t);
1610 undo_kpro(&undef_ho_u);
1611 undo_kpro(&undef_ho_k);
1614 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1615 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);