kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  26  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  28  *              kprobe_handler() now called via undefined instruction hooks
  29  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/mm.h>
  34
  35 #include "dbi_kprobes.h"
  36 #include "../dbi_kprobes.h"
  37
  38 #include "../../dbi_kdebug.h"
  39 #include "../../dbi_insn_slots.h"
  40 #include "../../dbi_kprobes_deps.h"
  41 #include "../../dbi_uprobes.h"
  42
  43 #include <asm/cacheflush.h>
  44
  45 #ifdef OVERHEAD_DEBUG
  46 #include <linux/time.h>
  47 #endif
  48
  49 #include <asm/traps.h>
  50 #include <asm/ptrace.h>
  51 #include <linux/list.h>
  52 #include <linux/hash.h>
  53
  54 #define SUPRESS_BUG_MESSAGES
  55
  56 extern unsigned long sched_addr;
  57 extern unsigned long fork_addr;
  58
  59 extern struct kprobe * per_cpu__current_kprobe;
  60 extern spinlock_t kretprobe_lock;
  61 extern struct kretprobe *sched_rp;
  62
  63 extern struct hlist_head kprobe_insn_pages;
  64 extern struct hlist_head uprobe_insn_pages;
  65
  66 extern unsigned long (*kallsyms_search) (const char *name);
  67
  68 extern struct kprobe *kprobe_running(void);
  69 extern void reset_current_kprobe(void);
  70 extern struct kprobe_ctlblk *get_kprobe_ctlblk(void);
  71 extern struct kprobe * current_kprobe;
  72
  73 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  74
  75 #ifdef OVERHEAD_DEBUG
  76 unsigned long swap_sum_time = 0;
  77 unsigned long swap_sum_hit = 0;
  78 EXPORT_SYMBOL_GPL (swap_sum_time);
  79 EXPORT_SYMBOL_GPL (swap_sum_hit);
  80 #endif
  81
  82 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
  83 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
  84
  85 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t *addr)
  86 {
  87         // real position less then PC by 8
  88         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
  89 }
  90
  91 unsigned int arr_traps_template[] = {
  92                 0xe1a0c00d,    // mov          ip, sp
  93                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
  94                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
  95                 0x00000000,    // b
  96                 0xe3500000,    // cmp          r0, #0  ; 0x0
  97                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
  98                 0x00000000,    // nop
  99                 0xffffffff     // end
 100 };
 101
 102
 103 struct kprobe trampoline_p =
 104 {
 105         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
 106         .pre_handler = trampoline_probe_handler
 107 };
 108
 109 // is instruction Thumb2 and NOT a branch, etc...
 110 int isThumb2(kprobe_opcode_t insn)
 111 {
 112         if((    (insn & 0xf800) == 0xe800 ||
 113                 (insn & 0xf800) == 0xf000 ||
 114                 (insn & 0xf800) == 0xf800)) return 1;
 115         return 0;
 116 }
 117
 118
 119 int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 120 {
 121         int i;
 122
 123         if (uregs & 0x10)
 124         {
 125                 int reg_mask = 0x1;
 126                 //search in reg list
 127                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 128                 {
 129                         if (!(insn & reg_mask))
 130                                 break;
 131                 }
 132         }
 133         else
 134         {
 135                 for (i = 0; i < 13; i++)
 136                 {
 137                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 138                                 continue;
 139                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 140                                 continue;
 141                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 142                                 continue;
 143                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 144                                 continue;
 145                         break;
 146                 }
 147         }
 148         if (i == 13)
 149         {
 150                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 151                 return -EINVAL;
 152         }
 153         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 154
 155         // set register to save
 156         ARM_INSN_REG_SET_RD (insns[0], i);
 157         // set register to load address to
 158         ARM_INSN_REG_SET_RD (insns[1], i);
 159         // set instruction to execute and patch it
 160         if (uregs & 0x10)
 161         {
 162                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 163                 ARM_INSN_REG_SET_MR (insn, i);
 164         }
 165         else
 166         {
 167                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 168                         ARM_INSN_REG_SET_RN (insn, i);
 169                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 170                         ARM_INSN_REG_SET_RD (insn, i);
 171                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 172                         ARM_INSN_REG_SET_RS (insn, i);
 173                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 174                         ARM_INSN_REG_SET_RM (insn, i);
 175         }
 176         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 177         // set register to restore
 178         ARM_INSN_REG_SET_RD (insns[3], i);
 179         return 0;
 180 }
 181
 182
 183
 184 int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 185 {
 186         unsigned char mreg = 0;
 187         unsigned char reg = 0;
 188
 189
 190         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 191         {
 192                 reg = ((insn & 0xffff) & uregs) >> 8;
 193         }else{
 194                 if (THUMB_INSN_MATCH (MOV3, insn))
 195                 {
 196                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 197                                 reg = (insn & 0xffff) & uregs;
 198                         else
 199                                 return 0;
 200                 }else{
 201                         if (THUMB2_INSN_MATCH (ADR, insn))
 202                         {
 203                                 reg = ((insn >> 16) & uregs) >> 8;
 204                                 if (reg == 15) return 0;
 205                         }else{
 206                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 207                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 208                                     THUMB2_INSN_MATCH (LDRWL, insn))
 209                                 {
 210                                         reg = ((insn >> 16) & uregs) >> 12;
 211                                         if (reg == 15) return 0;
 212                                 }else{
 213 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 214                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 215                                         {
 216                                                 reg = ((insn >> 16) & uregs) >> 12;
 217                                         }else{
 218                                                 if (THUMB2_INSN_MATCH (DP, insn))
 219                                                 {
 220                                                         reg = ((insn >> 16) & uregs) >> 12;
 221                                                         if (reg == 15) return 0;
 222                                                 }else{
 223                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 224                                                         {
 225                                                                 reg = ((insn >> 12) & uregs) >> 8;
 226                                                                 if (reg == 15) return 0;
 227                                                         }else{
 228                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 229                                                                 {
 230                                                                         reg = ((insn >> 12) & uregs) >> 8;
 231                                                                         if (reg == 15) return 0;
 232                                                                 }else{
 233                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 234                                                                         {
 235                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 236                                                                                 if (reg == 15) return 0;
 237                                                                         }else{
 238                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 239                                                                                 {
 240                                                                                         reg = 15;
 241                                                                                 }else{
 242                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 243                                                                                         {
 244                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 245                                                                                         }
 246                                                                                 }
 247                                                                         }
 248                                                                 }
 249                                                         }
 250                                                 }
 251                                         }
 252                                 }
 253                         }
 254                 }
 255         }
 256
 257         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 258                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 259                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 260         {
 261                 reg = THUMB2_INSN_REG_RT(insn);
 262         }
 263
 264         if (reg == 6 || reg == 7)
 265         {
 266                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 267                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 268                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 269                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 270                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 271                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 272                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 273                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 274         }
 275
 276
 277         if (THUMB_INSN_MATCH (APC, insn))
 278         {
 279 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 280                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 281         }else{
 282                 if (THUMB_INSN_MATCH (LRO3, insn))
 283                 {
 284 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 285                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 286                 }else{
 287                         if (THUMB_INSN_MATCH (MOV3, insn))
 288                         {
 289 //                              MOV Rd, PC -> MOV Rd, SP
 290                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 291                         }else{
 292                                 if (THUMB2_INSN_MATCH (ADR, insn))
 293                                 {
 294 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 295                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 296                                 }else{
 297                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 298                                             THUMB2_INSN_MATCH (LDRHW, insn))
 299                                         {
 300 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 301 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 302 //                                              !!! imm_12 vs. imm_8 !!!
 303 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 304                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 305                                         }else{
 306                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 307                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 308                                                     THUMB2_INSN_MATCH (LDREX, insn))
 309                                                 {
 310 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 311                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 312                                                 }else{
 313                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 314                                                         {
 315                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 316                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 317                                                                 {
 318                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 319                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 320                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 321                                                                         {
 322 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 323                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 324                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 325                                                                                 {
 326                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 327                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 328                                                                                         {
 329                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 330                                                                                                 {
 331                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 332                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 333                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 334                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 335                                                                                                 {
 336                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 337                                                                                                 }
 338                                                                                         }
 339                                                                                 }
 340                                                                         }
 341                                                                 }
 342                                                         }
 343                                                 }
 344                                         }
 345                                 }
 346                         }
 347                 }
 348         }
 349
 350         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 351         {
 352                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 353         }else{
 354                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 355                 {
 356                         if (THUMB2_INSN_REG_RN(insn) == 15)
 357                         {
 358                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 359                         }else{
 360                                 insns[2] = insn;
 361                         }
 362                 }else{
 363                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 364                         {
 365                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 366                                 {
 367                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 368                                 }else{
 369                                         insns[2] = insn;
 370                                 }
 371                         }
 372                 }
 373         }
 374
 375 //       STRx PC, xxx
 376         if ((reg == 15) && (THUMB2_INSN_MATCH (STRW, insn)   || \
 377                             THUMB2_INSN_MATCH (STRBW, insn)  || \
 378                             THUMB2_INSN_MATCH (STRD, insn)   || \
 379                             THUMB2_INSN_MATCH (STRHT, insn)  || \
 380                             THUMB2_INSN_MATCH (STRT, insn)   || \
 381                             THUMB2_INSN_MATCH (STRHW1, insn) || \
 382                             THUMB2_INSN_MATCH (STRHW, insn) ))
 383         {
 384                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 385         }
 386
 387
 388
 389         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 390         {
 391                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 392         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 393                 {
 394                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 395                         {
 396                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 397                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 398                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 399                 }
 400         }
 401
 402         return 0;
 403 }
 404
 405
 406
 407 int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 408 {
 409         int ret = 0;
 410
 411         // check instructions that can change PC by nature
 412         if (
 413 //              ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 414                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 415                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 416                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 417                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 418                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 419                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 420                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 421                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 422         {
 423                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 424                 ret = -EFAULT;
 425         }
 426 #ifndef CONFIG_CPU_V7
 427         // check instructions that can write result to PC
 428         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 429                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 430                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 431                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 432                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 433                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 434         {
 435                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 436                 ret = -EFAULT;
 437         }
 438 #endif // CONFIG_CPU_V7
 439         // check special instruction loads store multiple registers
 440         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 441                         // store pc or load to pc
 442                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 443                          // store/load with pc update
 444                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 445         {
 446                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 447                 ret = -EFAULT;
 448         }
 449         return ret;
 450 }
 451
 452 int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 453 {
 454         int ret = 0;
 455
 456         // check instructions that can change PC
 457         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 458                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 459                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 460                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
 461                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 462                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 463                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 464                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 465                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
 466                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
 467                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
 468                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 469                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 470                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 471                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 472                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 473                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 474                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 475                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 476                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 477                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 478                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 479                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 480                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 481                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 482                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 483                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 484                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 485 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 486                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 487                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 488                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 489                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 490                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 491                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 492                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 493                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 494 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 495                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 496         {
 497                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 498                 ret = -EFAULT;
 499         }
 500
 501         return ret;
 502 }
 503
 504 int arch_prepare_kretprobe (struct kretprobe *p)
 505 {
 506         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 507         return 0;
 508 }
 509
 510 int arch_prepare_kprobe (struct kprobe *p)
 511 {
 512         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 513         int uregs, pc_dep, ret = 0;
 514     kprobe_opcode_t insn[MAX_INSN_SIZE];
 515     struct arch_specific_insn ainsn;
 516
 517     /* insn: must be on special executable page on i386. */
 518     p->ainsn.insn = get_insn_slot (NULL, 0);
 519     if (!p->ainsn.insn)
 520         return -ENOMEM;
 521
 522     memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 523     ainsn.insn_arm = ainsn.insn = insn;
 524     ret = arch_check_insn_arm (&ainsn);
 525     if (!ret)
 526     {
 527         p->opcode = *p->addr;
 528         uregs = pc_dep = 0;
 529
 530         // Rn, Rm ,Rd
 531         if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 532            ARM_INSN_MATCH (SRO, insn[0]))
 533         {
 534             uregs = 0xb;
 535             if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 536                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
 537             {
 538                 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 539                 pc_dep = 1;
 540             }
 541         }
 542         // Rn ,Rd
 543         else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 544                 ARM_INSN_MATCH (SIO, insn[0]))
 545         {
 546             uregs = 0x3;
 547             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 548                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 549             {
 550                 pc_dep = 1;
 551                 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 552             }
 553         }
 554         // Rn, Rm, Rs
 555         else if(ARM_INSN_MATCH (DPRS, insn[0]))
 556         {
 557             uregs = 0xd;
 558             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 559                 (ARM_INSN_REG_RS (insn[0]) == 15))
 560             {
 561                 pc_dep = 1;
 562                 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 563             }
 564         }
 565         // register list
 566         else if(ARM_INSN_MATCH (SM, insn[0]))
 567         {
 568             uregs = 0x10;
 569             if (ARM_INSN_REG_MR (insn[0], 15))
 570             {
 571                 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 572                 pc_dep = 1;
 573             }
 574         }
 575         // check instructions that can write result to SP andu uses PC
 576         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 577         {
 578             free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 579             ret = -EFAULT;
 580         }
 581         else
 582         {
 583             if (uregs && pc_dep)
 584             {
 585                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 586                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 587                 {
 588                     DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 589                     free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 590                     return -EINVAL;
 591                 }
 592                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 593             }
 594             else
 595             {
 596                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 597                 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 598             }
 599             insns[7] = (kprobe_opcode_t) (p->addr + 1);
 600             DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 601             DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 602                     p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 603                     insns[5], insns[6], insns[7], insns[8]);
 604             memcpy (p->ainsn.insn, insns, sizeof(insns));
 605             flush_icache_range((long unsigned)p->ainsn.insn, (long unsigned)(p->ainsn.insn) + sizeof(insns));
 606 #ifdef BOARD_tegra
 607             flush_cache_all();
 608 #endif
 609         }
 610     }
 611     else
 612     {
 613         free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 614         printk("arch_prepare_kprobe: instruction 0x%lx not instrumentation, addr=0x%p\n", insn[0], p->addr);
 615     }
 616
 617     return ret;
 618 }
 619
 620 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 621 {
 622         kprobe_opcode_t insn;
 623         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 624
 625         insn = bpi >> 2;
 626         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 627         if (abs (insn & 0xffffff) > 0xffffff)
 628         {
 629                 DBPRINTF ("ERROR: kprobe address out of range\n");
 630                 BUG ();
 631         }
 632         insn = insn & 0xffffff;
 633         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 634         DBPRINTF ("insn=%lX\n", insn);
 635         return (unsigned int) insn;
 636 }
 637
 638
 639 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 640 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 641
 642 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 643 {
 644         int ret = 0;
 645         kprobe_opcode_t insn[MAX_INSN_SIZE];
 646
 647         if ((unsigned long) p->addr & 0x01)
 648         {
 649                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 650                 return -EINVAL;
 651         }
 652         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 653                 panic ("Failed to read memory %p!\n", p->addr);
 654         p->opcode = insn[0];
 655         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 656         if (!p->ainsn.insn_arm) {
 657                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 658                 return -ENOMEM;
 659         }
 660         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 661         if (ret) {
 662                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 663                 return -EFAULT;
 664         }
 665         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 666         if (!p->ainsn.insn_thumb) {
 667                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 668                 return -ENOMEM;
 669         }
 670         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 671         if (ret) {
 672                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 673                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 674                 return -EFAULT;
 675         }
 676         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
 677                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both)\n", __FILE__, __LINE__);
 678                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
 679                         panic ("Failed to write memory %p!\n", p->addr);
 680                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 681                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 682                 return -EFAULT;
 683         }
 684         return ret;
 685 }
 686
 687 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 688 {
 689         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
 690         return 0;
 691 }
 692
 693 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 694 {
 695         if (p->ss_addr) {
 696                 regs->ARM_pc = (unsigned long)p->ss_addr;
 697                 p->ss_addr = NULL;
 698         } else {
 699                 regs->ARM_pc = (unsigned long)p->ainsn.insn;
 700         }
 701 }
 702
 703 void save_previous_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p_run)
 704 {
 705         if (p_run == NULL) {
 706                 panic("arm_save_previous_kprobe: p_run == NULL\n");
 707         }
 708
 709         if (kcb->prev_kprobe.kp != NULL) {
 710                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 711         }
 712
 713         kcb->prev_kprobe.kp = p_run;
 714         kcb->prev_kprobe.status = kcb->kprobe_status;
 715 }
 716
 717 void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 718 {
 719         set_current_kprobe(kcb->prev_kprobe.kp, NULL, NULL);
 720         kcb->kprobe_status = kcb->prev_kprobe.status;
 721         kcb->prev_kprobe.kp = NULL;
 722         kcb->prev_kprobe.status = 0;
 723 }
 724
 725 void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 726 {
 727         __get_cpu_var(current_kprobe) = p;
 728         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 729 }
 730
 731 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 732 {
 733         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 734         int uregs, pc_dep;
 735         kprobe_opcode_t insn[MAX_INSN_SIZE];
 736         struct arch_specific_insn ainsn;
 737
 738         p->safe_arm = -1;
 739         if ((unsigned long) p->addr & 0x01)
 740         {
 741                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 742                 return -EINVAL;
 743         }
 744         insn[0] = p->opcode;
 745         ainsn.insn_arm = insn;
 746         if (!arch_check_insn_arm(&ainsn))
 747         {
 748                 p->safe_arm = 0;
 749         }
 750         uregs = pc_dep = 0;
 751         // Rn, Rm ,Rd
 752         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 753                         ARM_INSN_MATCH (SRO, insn[0]))
 754         {
 755                 uregs = 0xb;
 756                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 757                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 758                 {
 759                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 760                         pc_dep = 1;
 761                 }
 762         }
 763         // Rn ,Rd
 764         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 765                         ARM_INSN_MATCH (SIO, insn[0]))
 766         {
 767                 uregs = 0x3;
 768                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 769                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 770                 {
 771                         pc_dep = 1;
 772                         DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 773                 }
 774         }
 775         // Rn, Rm, Rs
 776         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 777         {
 778                 uregs = 0xd;
 779                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 780                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 781                 {
 782                         pc_dep = 1;
 783                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 784                 }
 785         }
 786         // register list
 787         else if (ARM_INSN_MATCH (SM, insn[0]))
 788         {
 789                 uregs = 0x10;
 790                 if (ARM_INSN_REG_MR (insn[0], 15))
 791                 {
 792                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 793                         pc_dep = 1;
 794                 }
 795         }
 796         // check instructions that can write result to SP andu uses PC
 797         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 798         {
 799                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 800                 p->safe_arm = -1;
 801                 // TODO: move free to later phase
 802                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 803                 //ret = -EFAULT;
 804         }
 805         if (unlikely(uregs && pc_dep))
 806         {
 807                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 808                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 809                 {
 810                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 811                                 __FILE__, __LINE__, insn[0]);
 812                         p->safe_arm = -1;
 813                         // TODO: move free to later phase
 814                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 815                         //return -EINVAL;
 816                 }
 817                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 818                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 819         }
 820         else
 821         {
 822                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 823                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 824         }
 825         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 826         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 827
 828         // B
 829         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
 830         {
 831                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 832                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 833                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 834                 insns[7] = get_addr_b(p->opcode, p->addr);
 835         }
 836
 837         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 838                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 839                         insns[5], insns[6], insns[7], insns[8]);
 840         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 841         {
 842                 panic("failed to write memory %p!\n", p->ainsn.insn);
 843                 // Mr_Nobody: we have to panic, really??...
 844                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 845                 //return -EINVAL;
 846         }
 847         return 0;
 848 }
 849
 850 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 851 {
 852         int uregs, pc_dep;
 853         unsigned int addr;
 854         kprobe_opcode_t insn[MAX_INSN_SIZE];
 855         struct arch_specific_insn ainsn;
 856         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 857
 858         p->safe_thumb = -1;
 859         if ((unsigned long) p->addr & 0x01)
 860         {
 861                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 862                 return -EINVAL;
 863         }
 864         insn[0] = p->opcode;
 865         ainsn.insn_thumb = insn;
 866         if (!arch_check_insn_thumb(&ainsn))
 867         {
 868                 p->safe_thumb = 0;
 869         }
 870         uregs = 0;
 871         pc_dep = 0;
 872         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 873         {
 874                 uregs = 0x0700;         // 8-10
 875                 pc_dep = 1;
 876         }
 877         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 878         {
 879                 // MOV Rd, PC
 880                 uregs = 0x07;
 881                 pc_dep = 1;
 882         }
 883         else if THUMB2_INSN_MATCH (ADR, insn[0])
 884         {
 885                 uregs = 0x0f00;         // Rd 8-11
 886                 pc_dep = 1;
 887         }
 888         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 889                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 890                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 891                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 892                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 893                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 894                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 895                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 896                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 897                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 898         {
 899                 uregs = 0xf000;         // Rt 12-15
 900                 pc_dep = 1;
 901         }
 902         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 903         {
 904                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 905                 pc_dep = 1;
 906         }
 907         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 908         {
 909                 uregs = 0xf;
 910                 pc_dep = 1;
 911         }
 912         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 913         {
 914                 uregs = 0xf000; // Rd 12-15
 915                 pc_dep = 1;
 916         }
 917         else if (THUMB2_INSN_MATCH(STRD, insn[0]) && ((THUMB2_INSN_REG_RN(insn[0]) == 15) || (THUMB2_INSN_REG_RT(insn[0]) == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 918         {
 919                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 920                 pc_dep = 1;
 921         }
 922         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 923         {
 924                 uregs = 0x0f00; // Rd 8-11
 925                 pc_dep = 1;
 926         }
 927         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 928         {
 929                 uregs = 0x0f00;
 930                 pc_dep = 1;
 931         }
 932         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 933         {
 934                 uregs = 0x0f00; // Rd 8-11
 935                 pc_dep = 1;
 936         }
 937         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 938         {
 939                 uregs = 0x0f00; // Rd 8-11
 940                 pc_dep = 1;
 941         }
 942         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 943         {
 944                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 945                 pc_dep = 1;
 946         }
 947         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 948                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 949         {
 950                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 951                 pc_dep = 1;
 952         }
 953         if (unlikely(uregs && pc_dep))
 954         {
 955                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 956                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 957                 {
 958                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 959                                 __FILE__, __LINE__, insn[0]);
 960                         p->safe_thumb = -1;
 961                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 962                         //return -EINVAL;
 963                 }
 964                 addr = ((unsigned int)p->addr) + 4;
 965                 *((unsigned short*)insns + 13) = 0xdeff;
 966                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 967                 *((unsigned short*)insns + 15) = addr >> 16;
 968                 if (!isThumb2(insn[0]))
 969                 {
 970                         addr = ((unsigned int)p->addr) + 2;
 971                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 972                         *((unsigned short*)insns + 17) = addr >> 16;
 973                 }
 974                 else {
 975                         addr = ((unsigned int)p->addr) + 4;
 976                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 977                         *((unsigned short*)insns + 17) = addr >> 16;
 978                 }
 979         }
 980         else {
 981                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
 982                 *((unsigned short*)insns + 13) = 0xdeff;
 983                 if (!isThumb2(insn[0]))
 984                 {
 985                         addr = ((unsigned int)p->addr) + 2;
 986                         *((unsigned short*)insns + 2) = insn[0];
 987                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 988                         *((unsigned short*)insns + 17) = addr >> 16;
 989                 }
 990                 else {
 991                         addr = ((unsigned int)p->addr) + 4;
 992                         insns[1] = insn[0];
 993                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 994                         *((unsigned short*)insns + 17) = addr >> 16;
 995                 }
 996         }
 997         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
 998         {
 999                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
1000                 // Mr_Nobody: we have to panic, really??...
1001                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1002                 //return -EINVAL;
1003         }
1004         return 0;
1005 }
1006
1007 static int check_validity_insn(struct kprobe *p, struct pt_regs *regs, struct task_struct *task)
1008 {
1009         struct kprobe *kp;
1010
1011         if (unlikely(thumb_mode(regs))) {
1012                 if (p->safe_thumb != -1) {
1013                         p->ainsn.insn = p->ainsn.insn_thumb;
1014                         list_for_each_entry_rcu(kp, &p->list, list) {
1015                                 kp->ainsn.insn = p->ainsn.insn_thumb;
1016                         }
1017                 } else {
1018                         printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1019                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1020                         // Test case when we do our actions on already running application
1021                         arch_disarm_uprobe(p, task);
1022                         return -1;
1023                 }
1024         } else {
1025                 if (p->safe_arm != -1) {
1026                         p->ainsn.insn = p->ainsn.insn_arm;
1027                         list_for_each_entry_rcu(kp, &p->list, list) {
1028                                 kp->ainsn.insn = p->ainsn.insn_arm;
1029                         }
1030                 } else {
1031                         printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1032                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1033                         // Test case when we do our actions on already running application
1034                         arch_disarm_uprobe(p, task);
1035                         return -1;
1036                 }
1037         }
1038
1039         return 0;
1040 }
1041
1042 static int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
1043 {
1044         int ret;
1045         unsigned long flags;
1046         local_irq_save(flags);
1047         ret = kprobe_handler(regs);
1048         local_irq_restore(flags);
1049         return ret;
1050 }
1051
1052 int kprobe_handler(struct pt_regs *regs)
1053 {
1054         int err_out = 0;
1055         char *msg_out = NULL;
1056         unsigned long user_m = user_mode(regs);
1057         pid_t tgid = (user_m) ? current->tgid : 0;
1058         kprobe_opcode_t *addr = (kprobe_opcode_t *) (regs->ARM_pc);
1059
1060         struct kprobe *p = NULL, *p_run = NULL;
1061         int ret = 0, retprobe = 0, reenter = 0;
1062         kprobe_opcode_t *ssaddr = 0;
1063         struct kprobe_ctlblk *kcb;
1064
1065 #ifdef SUPRESS_BUG_MESSAGES
1066         int swap_oops_in_progress;
1067         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1068         swap_oops_in_progress = oops_in_progress;
1069         oops_in_progress = 1;
1070 #endif
1071 #ifdef OVERHEAD_DEBUG
1072         struct timeval swap_tv1;
1073         struct timeval swap_tv2;
1074 #define USEC_IN_SEC_NUM                         1000000
1075         do_gettimeofday(&swap_tv1);
1076 #endif
1077         preempt_disable();
1078
1079 //      printk("### kprobe_handler: task[tgid=%u (%s)] addr=%p\n", tgid, current->comm, addr);
1080         p = get_kprobe(addr, tgid);
1081
1082         if (user_m && p && (check_validity_insn(p, regs, current) != 0)) {
1083                 goto no_kprobe_live;
1084         }
1085
1086         /* We're in an interrupt, but this is clear and BUG()-safe. */
1087         kcb = get_kprobe_ctlblk ();
1088
1089         /* Check we're not actually recursing */
1090         // TODO: event is not saving in trace
1091         p_run = kprobe_running();
1092         if (p_run)
1093         {
1094                 DBPRINTF("lock???");
1095                 if (p)
1096                 {
1097                         if (!tgid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)) {
1098                                 save_previous_kprobe(kcb, p_run);
1099                                 kcb->kprobe_status = KPROBE_REENTER;
1100                                 reenter = 1;
1101                         } else {
1102                                 /* We have reentered the kprobe_handler(), since
1103                                  * another probe was hit while within the handler.
1104                                  * We here save the original kprobes variables and
1105                                  * just single step on the instruction of the new probe
1106                                  * without calling any user handlers.
1107                                  */
1108                                 kprobes_inc_nmissed_count (p);
1109                                 prepare_singlestep (p, regs);
1110
1111                                 err_out = 0;
1112                                 goto out;
1113                         }
1114                 } else {
1115                         if(tgid) { //we can reenter probe upon uretprobe exception
1116                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1117                                 // UNDEF_INSTRUCTION from user space
1118
1119                                 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1120                                 if (p) {
1121                                         save_previous_kprobe(kcb, p_run);
1122                                         kcb->kprobe_status = KPROBE_REENTER;
1123                                         reenter = 1;
1124                                         retprobe = 1;
1125                                         DBPRINTF ("uretprobe %p\n", addr);
1126                                 }
1127                         }
1128                         if(!p) {
1129                                 p = p_run;
1130                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1131                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1132                                   DBPRINTF("kprobe_running !!! goto ss");
1133                                   goto ss_probe;
1134                                   } */
1135                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1136                                 if (tgid)
1137                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1138                                 else
1139                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1140                                 if (addr == ssaddr) {
1141                                         regs->ARM_pc = (unsigned long) (p->addr + 1);
1142                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->ARM_pc);
1143                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1144                                                 restore_previous_kprobe(kcb);
1145                                         } else {
1146                                                 reset_current_kprobe();
1147                                         }
1148                                 }
1149                                 DBPRINTF ("kprobe_running !!! goto no");
1150                                 ret = 1;
1151                                 /* If it's not ours, can't be delete race, (we hold lock). */
1152                                 DBPRINTF ("no_kprobe");
1153                                 goto no_kprobe;
1154                         }
1155                 }
1156         }
1157
1158         if (!p) {
1159                 if (tgid) {
1160                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1161                         // UNDEF_INSTRUCTION from user space
1162
1163                         p = get_kprobe_by_insn_slot(addr, tgid, regs);
1164                         if (!p) {
1165                                 /* Not one of ours: let kernel handle it */
1166                                 DBPRINTF ("no_kprobe");
1167                                 goto no_kprobe;
1168                         }
1169                         retprobe = 1;
1170                         DBPRINTF ("uretprobe %p\n", addr);
1171                 } else {
1172                         /* Not one of ours: let kernel handle it */
1173                         DBPRINTF ("no_kprobe");
1174                         goto no_kprobe;
1175                 }
1176         }
1177         // restore opcode for thumb app
1178         if (user_mode( regs ) && thumb_mode( regs )) {
1179                 if (!isThumb2(p->opcode)) {
1180                         unsigned long tmp = p->opcode >> 16;
1181                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1182                 } else {
1183                         unsigned long tmp = p->opcode;
1184                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr), &tmp, 4);
1185                 }
1186                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1187         }
1188         set_current_kprobe(p, NULL, NULL);
1189         if(!reenter)
1190                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1191         if (retprobe) {         //(einsn == UNDEF_INSTRUCTION)
1192                 ret = trampoline_probe_handler (p, regs);
1193         } else if (p->pre_handler) {
1194                 ret = p->pre_handler (p, regs);
1195                 if(p->pre_handler != trampoline_probe_handler) {
1196                         reset_current_kprobe();
1197                 }
1198         }
1199
1200         if (ret) {
1201                 /* handler has already set things up, so skip ss setup */
1202                 err_out = 0;
1203                 goto out;
1204         }
1205
1206 no_kprobe:
1207         msg_out = "no_kprobe\n";
1208         err_out = 1;            // return with death
1209         goto out;
1210
1211 no_kprobe_live:
1212         msg_out = "no_kprobe live\n";
1213         err_out = 0;            // ok - life is life
1214         goto out;
1215
1216 out:
1217         preempt_enable_no_resched();
1218 #ifdef OVERHEAD_DEBUG
1219         do_gettimeofday(&swap_tv2);
1220         swap_sum_hit++;
1221         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1222                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1223 #endif
1224 #ifdef SUPRESS_BUG_MESSAGES
1225         oops_in_progress = swap_oops_in_progress;
1226 #endif
1227
1228         if(msg_out) {
1229                 printk(msg_out);
1230         }
1231
1232         return err_out;
1233 }
1234
1235 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1236 {
1237         struct jprobe *jp = container_of (p, struct jprobe, kp);
1238         kprobe_pre_entry_handler_t pre_entry;
1239         entry_point_t entry;
1240
1241 # ifdef REENTER
1242 //      p = kprobe_running(regs);
1243 # endif
1244
1245         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1246         entry = (entry_point_t) jp->entry;
1247         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1248         //if(!entry)
1249         //      DIE("entry NULL", regs)
1250         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1251
1252         //call handler for all kernel probes and user space ones which belong to current tgid
1253         if (!p->tgid || (p->tgid == current->tgid))
1254         {
1255                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1256                     patch_suspended_all_task_ret_addr(sched_rp);
1257                 }
1258                 if (pre_entry)
1259                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1260                 if (entry){
1261                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1262                 }
1263                 else {
1264                         if (p->tgid)
1265                                 dbi_arch_uprobe_return ();
1266                         else
1267                                 dbi_jprobe_return ();
1268                 }
1269         }
1270         else if (p->tgid)
1271                 dbi_arch_uprobe_return ();
1272
1273         prepare_singlestep (p, regs);
1274
1275         return 1;
1276 }
1277
1278 void dbi_jprobe_return (void)
1279 {
1280 }
1281
1282 void dbi_arch_uprobe_return (void)
1283 {
1284 }
1285
1286 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1287 {
1288 # ifndef REENTER
1289         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1290         kprobe_opcode_t insns[2];
1291
1292         if (p->pid)
1293         {
1294                 insns[0] = BREAKPOINT_INSTRUCTION;
1295                 insns[1] = p->opcode;
1296                 //p->opcode = *p->addr;
1297                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1298                 {
1299                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1300                         return -1;
1301                 }
1302                 //*p->addr = BREAKPOINT_INSTRUCTION;
1303                 //*(p->addr+1) = p->opcode;
1304                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1305                 {
1306                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1307                         return -1;
1308                 }
1309         }
1310         else
1311         {
1312                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1313                 *(p->addr + 1) = p->opcode;
1314                 p->opcode = *p->addr;
1315                 *p->addr = BREAKPOINT_INSTRUCTION;
1316
1317                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1318         }
1319
1320         reset_current_kprobe();
1321
1322 #endif //REENTER
1323
1324         return 0;
1325 }
1326
1327
1328 void arch_arm_kprobe (struct kprobe *p)
1329 {
1330         *p->addr = BREAKPOINT_INSTRUCTION;
1331         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1332 }
1333
1334 void arch_disarm_kprobe (struct kprobe *p)
1335 {
1336         *p->addr = p->opcode;
1337         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1338 }
1339
1340
1341 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1342 {
1343         struct kretprobe_instance *ri = NULL;
1344         struct hlist_head *head;
1345         struct hlist_node *node, *tmp;
1346         unsigned long flags, orig_ret_address = 0;
1347         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1348
1349         struct kretprobe *crp = NULL;
1350         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1351
1352         DBPRINTF ("start");
1353
1354         if (p && p->tgid){
1355                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1356                 if (!thumb_mode( regs ))
1357                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1358                 else
1359                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1360         }
1361
1362         spin_lock_irqsave (&kretprobe_lock, flags);
1363
1364         /*
1365          * We are using different hash keys (current and mm) for finding kernel
1366          * space and user space probes.  Kernel space probes can change mm field in
1367          * task_struct.  User space probes can be shared between threads of one
1368          * process so they have different current but same mm.
1369          */
1370         if (p && p->tgid) {
1371                 head = kretprobe_inst_table_head(current->mm);
1372         } else {
1373                 head = kretprobe_inst_table_head(current);
1374         }
1375
1376         /*
1377          * It is possible to have multiple instances associated with a given
1378          * task either because an multiple functions in the call path
1379          * have a return probe installed on them, and/or more then one
1380          * return probe was registered for a target function.
1381          *
1382          * We can handle this because:
1383          *     - instances are always inserted at the head of the list
1384          *     - when multiple return probes are registered for the same
1385          *       function, the first instance's ret_addr will point to the
1386          *       real return address, and all the rest will point to
1387          *       kretprobe_trampoline
1388          */
1389         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1390         {
1391                 if (ri->task != current)
1392                         /* another task is sharing our hash bucket */
1393                         continue;
1394                 if (ri->rp && ri->rp->handler){
1395                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1396                 }
1397
1398                 orig_ret_address = (unsigned long) ri->ret_addr;
1399                 recycle_rp_inst (ri);
1400                 if (orig_ret_address != trampoline_address)
1401                         /*
1402                          * This is the real return address. Any other
1403                          * instances associated with this task are for
1404                          * other calls deeper on the call stack
1405                          */
1406                         break;
1407         }
1408         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1409         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1410         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1411         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1412         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1413         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1414         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1415         //}
1416         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1417                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1418
1419         regs->uregs[14] = orig_ret_address;
1420         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1421         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1422
1423         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1424         {
1425                 regs->uregs[15] = orig_ret_address;
1426         }else{
1427                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1428                 else regs->uregs[15] += 2;
1429         }
1430
1431         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1432
1433         if(p){ // ARM, MIPS, X86 user space
1434                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1435                 {
1436                         regs->ARM_cpsr &= 0xFFFFFFDF;
1437                 }else{
1438                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1439                         {
1440                                 regs->ARM_cpsr |= 0x20;
1441                         }
1442                 }
1443
1444                 //TODO: test - enter function, delete us retprobe, exit function
1445                 // for user space retprobes only - deferred deletion
1446
1447                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1448                 {
1449                         // if we are not at the end of the list and current retprobe should be disarmed
1450                         if (node && ri->rp2)
1451                         {
1452                                 struct hlist_node *current_node = node;
1453                                 crp = ri->rp2;
1454                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1455                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1456                                   DIE(die_msg, regs); */
1457                                 // look for other instances for the same retprobe
1458                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1459                                 {
1460                                         /*
1461                                          * Trying to find another retprobe instance associated with
1462                                          * the same retprobe.
1463                                          */
1464                                         if (ri->rp2 == crp && node != current_node)
1465                                                 break;
1466                                 }
1467
1468                                 if (!node)
1469                                 {
1470                                         // if there are no more instances for this retprobe
1471                                         // delete retprobe
1472                                         struct kprobe *is_p = &crp->kp;
1473                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1474                                         /*
1475                                           If there is no any retprobe instances of this retprobe
1476                                           we can free the resources related to the probe.
1477                                          */
1478                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1479                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1480                                         }
1481                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1482                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1483                                         }
1484                                         unregister_uprobe (&crp->kp, current, 1);
1485                                         kfree (crp);
1486                                 }
1487                                 hlist_del(current_node);
1488                         }
1489                 }
1490
1491                 if (kcb->kprobe_status == KPROBE_REENTER) {
1492                         restore_previous_kprobe(kcb);
1493                 } else {
1494                         reset_current_kprobe();
1495                 }
1496         }
1497
1498         spin_unlock_irqrestore (&kretprobe_lock, flags);
1499
1500         /*
1501          * By returning a non-zero value, we are telling
1502          * kprobe_handler() that we don't want the post_handler
1503          * to run (and have re-enabled preemption)
1504          */
1505
1506         return 1;
1507 }
1508
1509 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1510 {
1511         struct kretprobe_instance *ri;
1512
1513         DBPRINTF ("start\n");
1514         //TODO: test - remove retprobe after func entry but before its exit
1515         if ((ri = get_free_rp_inst (rp)) != NULL)
1516         {
1517                 ri->rp = rp;
1518                 ri->rp2 = NULL;
1519                 ri->task = current;
1520                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1521
1522                 if (rp->kp.tgid)
1523                         if (!thumb_mode( regs ))
1524                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1525                         else
1526                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1527
1528                 else    /* Replace the return addr with trampoline addr */
1529                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1530
1531 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1532                 add_rp_inst (ri);
1533         }
1534         else {
1535                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1536                 rp->nmissed++;
1537         }
1538 }
1539
1540
1541 int asm_init_module_dependencies()
1542 {
1543         //No module dependencies
1544         return 0;
1545 }
1546
1547
1548 void (* do_kpro)(struct undef_hook *);
1549 void (* undo_kpro)(struct undef_hook *);
1550
1551 // kernel probes hook
1552 struct undef_hook undef_ho_k = {
1553     .instr_mask = 0xffffffff,
1554     .instr_val  = BREAKPOINT_INSTRUCTION,
1555     .cpsr_mask  = MODE_MASK,
1556     .cpsr_val   = SVC_MODE,
1557     .fn         = kprobe_trap_handler
1558 };
1559
1560 // userspace probes hook (arm)
1561 struct undef_hook undef_ho_u = {
1562     .instr_mask = 0xffffffff,
1563     .instr_val  = BREAKPOINT_INSTRUCTION,
1564     .cpsr_mask  = MODE_MASK,
1565     .cpsr_val   = USR_MODE,
1566     .fn         = kprobe_trap_handler
1567 };
1568
1569 // userspace probes hook (thumb)
1570 struct undef_hook undef_ho_u_t = {
1571     .instr_mask = 0xffffffff,
1572     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1573     .cpsr_mask  = MODE_MASK,
1574     .cpsr_val   = USR_MODE,
1575     .fn         = kprobe_trap_handler
1576 };
1577
1578 int __init arch_init_kprobes (void)
1579 {
1580         unsigned int do_bp_handler = 0;
1581         int ret = 0;
1582
1583         if (arch_init_module_dependencies())
1584         {
1585                 DBPRINTF ("Unable to init module dependencies\n");
1586                 return -1;
1587         }
1588
1589         do_bp_handler = (unsigned int) kallsyms_search ("do_undefinstr");
1590         if (do_bp_handler == 0) {
1591                 DBPRINTF("no do_undefinstr symbol found!");
1592                 return -1;
1593         }
1594         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1595         // Register hooks (kprobe_handler)
1596         do_kpro = (void *)kallsyms_search ("register_undef_hook");
1597         if (do_kpro == 0) {
1598                 printk("no register_undef_hook symbol found!\n");
1599                 return -1;
1600         }
1601
1602         // Unregister hooks (kprobe_handler)
1603         undo_kpro = (void *)kallsyms_search ("unregister_undef_hook");
1604         if (undo_kpro == 0) {
1605                 printk("no unregister_undef_hook symbol found!\n");
1606                 return -1;
1607         }
1608
1609         do_kpro(&undef_ho_k);
1610         do_kpro(&undef_ho_u);
1611         do_kpro(&undef_ho_u_t);
1612         if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1613                 //dbi_unregister_jprobe(&do_exit_p, 0);
1614                 return ret;
1615         }
1616         return ret;
1617 }
1618
1619 void __exit dbi_arch_exit_kprobes (void)
1620 {
1621         undo_kpro(&undef_ho_u_t);
1622         undo_kpro(&undef_ho_u);
1623         undo_kpro(&undef_ho_k);
1624 }
1625
1626 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1627 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);