kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  *
  26  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  28  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  29  *              kprobe_handler() now called via undefined instruction hooks
  30  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  31  */
  32
  33 #include <linux/module.h>
  34 #include <linux/mm.h>
  35
  36 #include "dbi_kprobes.h"
  37 #include "../dbi_kprobes.h"
  38
  39 #include "../../dbi_kdebug.h"
  40 #include "../../dbi_insn_slots.h"
  41 #include "../../dbi_kprobes_deps.h"
  42 #include "../../dbi_uprobes.h"
  43
  44 #include <asm/cacheflush.h>
  45
  46 #ifdef OVERHEAD_DEBUG
  47 #include <linux/time.h>
  48 #endif
  49
  50 #include <asm/traps.h>
  51 #include <asm/ptrace.h>
  52 #include <linux/list.h>
  53 #include <linux/hash.h>
  54
  55 #define SUPRESS_BUG_MESSAGES
  56
  57 extern unsigned int *sched_addr;
  58 extern unsigned int *fork_addr;
  59
  60 extern struct kprobe * per_cpu__current_kprobe;
  61 extern spinlock_t kretprobe_lock;
  62 extern struct kretprobe *sched_rp;
  63
  64 extern struct hlist_head kprobe_insn_pages;
  65 extern struct hlist_head uprobe_insn_pages;
  66
  67 extern unsigned long (*kallsyms_search) (const char *name);
  68
  69 extern struct kprobe *kprobe_running (void);
  70 extern struct kprobe_ctlblk *get_kprobe_ctlblk (void);
  71 extern void reset_current_kprobe (void);
  72 extern struct kprobe * current_kprobe;
  73
  74 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  75
  76 #ifdef OVERHEAD_DEBUG
  77 unsigned long swap_sum_time = 0;
  78 unsigned long swap_sum_hit = 0;
  79 EXPORT_SYMBOL_GPL (swap_sum_time);
  80 EXPORT_SYMBOL_GPL (swap_sum_hit);
  81 #endif
  82
  83 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
  84 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
  85
  86 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t addr)
  87 {
  88         // real position less then PC by 8
  89         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
  90 }
  91
  92 unsigned int arr_traps_template[] = {
  93                 0xe1a0c00d,    // mov          ip, sp
  94                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
  95                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
  96                 0x00000000,    // b
  97                 0xe3500000,    // cmp          r0, #0  ; 0x0
  98                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
  99                 0x00000000,    // nop
 100                 0xffffffff     // end
 101 };
 102
 103
 104 struct kprobe trampoline_p =
 105 {
 106         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
 107         .pre_handler = trampoline_probe_handler
 108 };
 109
 110 // is instruction Thumb2 and NOT a branch, etc...
 111 int isThumb2(kprobe_opcode_t insn)
 112 {
 113         if((    (insn & 0xf800) == 0xe800 ||
 114                 (insn & 0xf800) == 0xf000 ||
 115                 (insn & 0xf800) == 0xf800)) return 1;
 116         return 0;
 117 }
 118
 119
 120 int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 121 {
 122         int i;
 123
 124         if (uregs & 0x10)
 125         {
 126                 int reg_mask = 0x1;
 127                 //search in reg list
 128                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 129                 {
 130                         if (!(insn & reg_mask))
 131                                 break;
 132                 }
 133         }
 134         else
 135         {
 136                 for (i = 0; i < 13; i++)
 137                 {
 138                         //              DBPRINTF("prep_pc_dep_insn_execbuf: check R%d/%d, changing regs %x in %x",
 139                         //                              i, ARM_INSN_REG_RN(insn), uregs, insn);
 140                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 141                                 continue;
 142                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 143                                 continue;
 144                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 145                                 continue;
 146                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 147                                 continue;
 148                         break;
 149                 }
 150         }
 151         if (i == 13)
 152         {
 153                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 154                 return -EINVAL;
 155         }
 156         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 157
 158         // set register to save
 159         ARM_INSN_REG_SET_RD (insns[0], i);
 160         // set register to load address to
 161         ARM_INSN_REG_SET_RD (insns[1], i);
 162         // set instruction to execute and patch it
 163         if (uregs & 0x10)
 164         {
 165                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 166                 ARM_INSN_REG_SET_MR (insn, i);
 167         }
 168         else
 169         {
 170                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 171                         ARM_INSN_REG_SET_RN (insn, i);
 172                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 173                         ARM_INSN_REG_SET_RD (insn, i);
 174                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 175                         ARM_INSN_REG_SET_RS (insn, i);
 176                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 177                         ARM_INSN_REG_SET_RM (insn, i);
 178         }
 179         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 180         // set register to restore
 181         ARM_INSN_REG_SET_RD (insns[3], i);
 182         return 0;
 183 }
 184
 185
 186
 187 int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 188 {
 189         unsigned char mreg = 0;
 190         unsigned char reg = 0;
 191
 192
 193         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 194         {
 195                 reg = ((insn & 0xffff) & uregs) >> 8;
 196         }else{
 197                 if (THUMB_INSN_MATCH (MOV3, insn))
 198                 {
 199                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 200                                 reg = (insn & 0xffff) & uregs;
 201                         else
 202                                 return 0;
 203                 }else{
 204                         if (THUMB2_INSN_MATCH (ADR, insn))
 205                         {
 206                                 reg = ((insn >> 16) & uregs) >> 8;
 207                                 if (reg == 15) return 0;
 208                         }else{
 209                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 210                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 211                                     THUMB2_INSN_MATCH (LDRWL, insn))
 212                                 {
 213                                         reg = ((insn >> 16) & uregs) >> 12;
 214                                         if (reg == 15) return 0;
 215                                 }else{
 216 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 217                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 218                                         {
 219                                                 reg = ((insn >> 16) & uregs) >> 12;
 220                                         }else{
 221                                                 if (THUMB2_INSN_MATCH (DP, insn))
 222                                                 {
 223                                                         reg = ((insn >> 16) & uregs) >> 12;
 224                                                         if (reg == 15) return 0;
 225                                                 }else{
 226                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 227                                                         {
 228                                                                 reg = ((insn >> 12) & uregs) >> 8;
 229                                                                 if (reg == 15) return 0;
 230                                                         }else{
 231                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 232                                                                 {
 233                                                                         reg = ((insn >> 12) & uregs) >> 8;
 234                                                                         if (reg == 15) return 0;
 235                                                                 }else{
 236                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 237                                                                         {
 238                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 239                                                                                 if (reg == 15) return 0;
 240                                                                         }else{
 241                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 242                                                                                 {
 243                                                                                         reg = 15;
 244                                                                                 }else{
 245                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 246                                                                                         {
 247                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 248                                                                                         }
 249                                                                                 }
 250                                                                         }
 251                                                                 }
 252                                                         }
 253                                                 }
 254                                         }
 255                                 }
 256                         }
 257                 }
 258         }
 259
 260         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 261                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 262                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 263         {
 264                 reg = THUMB2_INSN_REG_RT(insn);
 265         }
 266
 267         if (reg == 6 || reg == 7)
 268         {
 269                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 270                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 271                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 272                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 273                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 274                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 275                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 276                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 277         }
 278
 279
 280         if (THUMB_INSN_MATCH (APC, insn))
 281         {
 282 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 283                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 284         }else{
 285                 if (THUMB_INSN_MATCH (LRO3, insn))
 286                 {
 287 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 288                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 289                 }else{
 290                         if (THUMB_INSN_MATCH (MOV3, insn))
 291                         {
 292 //                              MOV Rd, PC -> MOV Rd, SP
 293                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 294                         }else{
 295                                 if (THUMB2_INSN_MATCH (ADR, insn))
 296                                 {
 297 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 298                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 299                                 }else{
 300                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 301                                             THUMB2_INSN_MATCH (LDRHW, insn))
 302                                         {
 303 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 304 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 305 //                                              !!! imm_12 vs. imm_8 !!!
 306 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 307                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 308                                         }else{
 309                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 310                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 311                                                     THUMB2_INSN_MATCH (LDREX, insn))
 312                                                 {
 313 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 314                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 315                                                 }else{
 316                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 317                                                         {
 318                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 319                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 320                                                                 {
 321                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 322                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 323                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 324                                                                         {
 325 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 326                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 327                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 328                                                                                 {
 329                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 330                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 331                                                                                         {
 332                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 333                                                                                                 {
 334                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 335                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 336                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 337                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 338                                                                                                 {
 339                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 340                                                                                                 }
 341                                                                                         }
 342                                                                                 }
 343                                                                         }
 344                                                                 }
 345                                                         }
 346                                                 }
 347                                         }
 348                                 }
 349                         }
 350                 }
 351         }
 352
 353         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 354         {
 355                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 356         }else{
 357                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 358                 {
 359                         if (THUMB2_INSN_REG_RN(insn) == 15)
 360                         {
 361                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 362                         }else{
 363                                 insns[2] = insn;
 364                         }
 365                 }else{
 366                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 367                         {
 368                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 369                                 {
 370                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 371                                 }else{
 372                                         insns[2] = insn;
 373                                 }
 374                         }
 375                 }
 376         }
 377
 378 //       STRx PC, xxx
 379         if ((reg == 15) && THUMB2_INSN_MATCH (STRW, insn)   || \
 380                            THUMB2_INSN_MATCH (STRBW, insn)  || \
 381                            THUMB2_INSN_MATCH (STRD, insn)   || \
 382                            THUMB2_INSN_MATCH (STRHT, insn)  || \
 383                            THUMB2_INSN_MATCH (STRT, insn)   || \
 384                            THUMB2_INSN_MATCH (STRHW1, insn) || \
 385                            THUMB2_INSN_MATCH (STRHW, insn) )
 386         {
 387                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 388         }
 389
 390
 391
 392         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 393         {
 394                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 395         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 396                 {
 397                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 398                         {
 399                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 400                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 401                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 402                 }
 403         }
 404
 405         return 0;
 406 }
 407
 408
 409
 410 int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 411 {
 412         int ret = 0;
 413         kprobe_opcode_t *insn;
 414
 415         // check instructions that can change PC by nature
 416         if (    ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 417                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 418                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 419                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 420                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 421                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 422                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 423                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 424                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 425         {
 426                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 427                 ret = -EFAULT;
 428         }
 429 #ifndef CONFIG_CPU_V7
 430         // check instructions that can write result to PC
 431         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 432                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 433                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 434                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 435                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 436                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 437         {
 438                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 439                 ret = -EFAULT;
 440         }
 441 #endif // CONFIG_CPU_V7
 442         // check special instruction loads store multiple registers
 443         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 444                         // store pc or load to pc
 445                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 446                          // store/load with pc update
 447                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 448         {
 449                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 450                 ret = -EFAULT;
 451         }
 452         return ret;
 453 }
 454
 455 int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 456 {
 457         int ret = 0;
 458
 459         // check instructions that can change PC
 460         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 461                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 462                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 463                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
 464                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 465                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 466                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 467                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 468                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
 469                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
 470                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
 471                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 472                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 473                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 474                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 475                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 476                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 477                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 478                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 479                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 480                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 481                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 482                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 483                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 484                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 485                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 486                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 487                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 488 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 489                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 490                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 491                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 492                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 493                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 494                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 495                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 496                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 497 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 498                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 499         {
 500                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 501                 ret = -EFAULT;
 502         }
 503
 504         return ret;
 505 }
 506
 507 int arch_prepare_kretprobe (struct kretprobe *p)
 508 {
 509         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 510         return 0;
 511 }
 512
 513 int arch_prepare_kprobe (struct kprobe *p)
 514 {
 515         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 516         int uregs, pc_dep;
 517         int ret = 0;
 518
 519         if (!ret)
 520         {
 521                 kprobe_opcode_t insn[MAX_INSN_SIZE];
 522                 struct arch_specific_insn ainsn;
 523                 /* insn: must be on special executable page on i386. */
 524                 p->ainsn.insn = get_insn_slot (NULL, 0);
 525                 if (!p->ainsn.insn)
 526                         return -ENOMEM;
 527                 memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 528                 ainsn.insn_arm = ainsn.insn = insn;
 529                 ret = arch_check_insn_arm (&ainsn);
 530                 if (!ret)
 531                 {
 532                         p->opcode = *p->addr;
 533
 534                         p->ainsn.boostable = 1;
 535                         uregs = pc_dep = 0;
 536                         // Rn, Rm ,Rd
 537                         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 538                                         ARM_INSN_MATCH (SRO, insn[0]))
 539                         {
 540
 541                                 uregs = 0xb;
 542                                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 543                                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 544                                 {
 545
 546                                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 547                                         pc_dep = 1;
 548                                 }
 549                         }
 550                         // Rn ,Rd
 551                         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 552                                         ARM_INSN_MATCH (SIO, insn[0]))
 553                         {
 554
 555                                 uregs = 0x3;
 556                                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 557                                                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 558                                 {
 559
 560                                         pc_dep = 1;
 561                                         DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
 562                                 }
 563                         }
 564                         // Rn, Rm, Rs
 565                         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 566                         {
 567
 568                                 uregs = 0xd;
 569                                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 570                                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 571                                 {
 572
 573                                         pc_dep = 1;
 574                                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 575                                 }
 576                         }
 577                         // register list
 578                         else if (ARM_INSN_MATCH (SM, insn[0]))
 579                         {
 580
 581                                 uregs = 0x10;
 582                                 if (ARM_INSN_REG_MR (insn[0], 15))
 583                                 {
 584
 585                                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 586                                         pc_dep = 1;
 587                                 }
 588                         }
 589                         // check instructions that can write result to SP andu uses PC
 590                         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 591                         {
 592                                 static int count;
 593                                 count++;
 594                                 //printk ("insn writes result to SP and uses PC: %lx/%d\n", ainsn.insn[0], count);
 595                                 free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 596                                 ret = -EFAULT;
 597                         }
 598                         else {
 599                                 if (uregs && pc_dep)
 600                                 {
 601                                         memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 602                                         if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 603                                         {
 604                                                 DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 605                                                 free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 606                                                 return -EINVAL;
 607                                         }
 608                                         //insns[KPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 609                                         insns[6] = (kprobe_opcode_t) (p->addr + 2);
 610                                 }
 611                                 else
 612                                 {
 613                                         memcpy (insns, gen_insn_execbuf, sizeof (insns));
 614                                         insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 615                                 }
 616                                 //insns[KPROBES_TRAMP_RET_BREAK_IDX] = UNDEF_INSTRUCTION;
 617                                 insns[7] = (kprobe_opcode_t) (p->addr + 1);
 618                                 DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 619                                 DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 620                                                 p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 621                                                 insns[5], insns[6], insns[7], insns[8]);
 622                                 memcpy (p->ainsn.insn, insns, sizeof(insns));
 623                                 flush_icache_range(p->ainsn.insn, p->ainsn.insn + sizeof(insns));
 624 #ifdef BOARD_tegra
 625                                 flush_cache_all();
 626 #endif
 627                         }
 628                 }
 629                 else
 630                 {
 631                         free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 632                 }
 633         }
 634         return ret;
 635 }
 636
 637 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 638 {
 639         kprobe_opcode_t insn;
 640         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 641
 642         insn = bpi >> 2;
 643         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 644         if (abs (insn & 0xffffff) > 0xffffff)
 645         {
 646                 DBPRINTF ("ERROR: kprobe address out of range\n");
 647                 BUG ();
 648         }
 649         insn = insn & 0xffffff;
 650         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 651         DBPRINTF ("insn=%lX\n", insn);
 652         return (unsigned int) insn;
 653 }
 654
 655
 656 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 657 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 658
 659 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 660 {
 661         int ret = 0;
 662         kprobe_opcode_t insn[MAX_INSN_SIZE];
 663
 664         if ((unsigned long) p->addr & 0x01)
 665         {
 666                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 667                 return -EINVAL;
 668         }
 669         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 670                 panic ("Failed to read memory %p!\n", p->addr);
 671         p->opcode = insn[0];
 672         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 673         if (!p->ainsn.insn_arm) {
 674                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 675                 return -ENOMEM;
 676         }
 677         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 678         if (ret) {
 679                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 680                 return -EFAULT;
 681         }
 682         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 683         if (!p->ainsn.insn_thumb) {
 684                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 685                 return -ENOMEM;
 686         }
 687         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 688         if (ret) {
 689                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 690                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 691                 return -EFAULT;
 692         }
 693         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
 694                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both)\n", __FILE__, __LINE__);
 695                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
 696                         panic ("Failed to write memory %p!\n", p->addr);
 697                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 698                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 699                 return -EFAULT;
 700         }
 701         p->ainsn.boostable = 1;
 702         return ret;
 703 }
 704
 705 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 706 {
 707         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
 708         return 0;
 709 }
 710
 711 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 712 {
 713         if(p->ss_addr)
 714         {
 715                 regs->uregs[15] = (unsigned long) p->ss_addr;
 716                 p->ss_addr = NULL;
 717         }
 718         else
 719                 regs->uregs[15] = (unsigned long) p->ainsn.insn;
 720 }
 721
 722 void save_previous_kprobe (struct kprobe_ctlblk *kcb, struct kprobe *cur_p)
 723 {
 724         if (kcb->prev_kprobe.kp != NULL)
 725         {
 726                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 727         }
 728
 729         kcb->prev_kprobe.kp = kprobe_running ();
 730         kcb->prev_kprobe.status = kcb->kprobe_status;
 731 }
 732
 733 void restore_previous_kprobe (struct kprobe_ctlblk *kcb)
 734 {
 735         __get_cpu_var (current_kprobe) = kcb->prev_kprobe.kp;
 736         kcb->kprobe_status = kcb->prev_kprobe.status;
 737         kcb->prev_kprobe.kp = NULL;
 738         kcb->prev_kprobe.status = 0;
 739 }
 740
 741 void set_current_kprobe (struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 742 {
 743         __get_cpu_var (current_kprobe) = p;
 744         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 745 }
 746
 747 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 748 {
 749         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 750         int uregs, pc_dep;
 751         kprobe_opcode_t insn[MAX_INSN_SIZE];
 752         struct arch_specific_insn ainsn;
 753
 754         p->safe_arm = -1;
 755         if ((unsigned long) p->addr & 0x01)
 756         {
 757                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 758                 return -EINVAL;
 759         }
 760         insn[0] = p->opcode;
 761         ainsn.insn_arm = insn;
 762         if (!arch_check_insn_arm(&ainsn))
 763         {
 764                 p->safe_arm = 0;
 765         }
 766         uregs = pc_dep = 0;
 767         // Rn, Rm ,Rd
 768         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 769                         ARM_INSN_MATCH (SRO, insn[0]))
 770         {
 771                 uregs = 0xb;
 772                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 773                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 774                 {
 775                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 776                         pc_dep = 1;
 777                 }
 778         }
 779         // Rn ,Rd
 780         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 781                         ARM_INSN_MATCH (SIO, insn[0]))
 782         {
 783                 uregs = 0x3;
 784                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 785                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 786                 {
 787                         pc_dep = 1;
 788                         DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
 789                 }
 790         }
 791         // Rn, Rm, Rs
 792         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 793         {
 794                 uregs = 0xd;
 795                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 796                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 797                 {
 798                         pc_dep = 1;
 799                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 800                 }
 801         }
 802         // register list
 803         else if (ARM_INSN_MATCH (SM, insn[0]))
 804         {
 805                 uregs = 0x10;
 806                 if (ARM_INSN_REG_MR (insn[0], 15))
 807                 {
 808                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 809                         pc_dep = 1;
 810                 }
 811         }
 812         // check instructions that can write result to SP andu uses PC
 813         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 814         {
 815                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 816                 p->safe_arm = -1;
 817                 // TODO: move free to later phase
 818                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 819                 //ret = -EFAULT;
 820         }
 821         if (unlikely(uregs && pc_dep))
 822         {
 823                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 824                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 825                 {
 826                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 827                                 insn[0], __FILE__, __LINE__);
 828                         p->safe_arm = -1;
 829                         // TODO: move free to later phase
 830                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 831                         //return -EINVAL;
 832                 }
 833                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 834                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 835         }
 836         else
 837         {
 838                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 839                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 840         }
 841         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 842         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 843
 844         // B
 845         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
 846         {
 847                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 848                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 849                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 850                 insns[7] = get_addr_b(p->opcode, p->addr);
 851         }
 852
 853         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 854                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 855                         insns[5], insns[6], insns[7], insns[8]);
 856         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 857         {
 858                 panic("failed to write memory %p!\n", p->ainsn.insn);
 859                 // Mr_Nobody: we have to panic, really??...
 860                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 861                 //return -EINVAL;
 862         }
 863         return 0;
 864 }
 865
 866 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 867 {
 868         int uregs, pc_dep;
 869         unsigned int addr;
 870         kprobe_opcode_t insn[MAX_INSN_SIZE];
 871         struct arch_specific_insn ainsn;
 872         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 873
 874         p->safe_thumb = -1;
 875         if ((unsigned long) p->addr & 0x01)
 876         {
 877                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 878                 return -EINVAL;
 879         }
 880         insn[0] = p->opcode;
 881         ainsn.insn_thumb = insn;
 882         if (!arch_check_insn_thumb(&ainsn))
 883         {
 884                 p->safe_thumb = 0;
 885         }
 886         uregs = 0;
 887         pc_dep = 0;
 888         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 889         {
 890                 uregs = 0x0700;         // 8-10
 891                 pc_dep = 1;
 892         }
 893         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 894         {
 895                 // MOV Rd, PC
 896                 uregs = 0x07;
 897                 pc_dep = 1;
 898         }
 899         else if THUMB2_INSN_MATCH (ADR, insn[0])
 900         {
 901                 uregs = 0x0f00;         // Rd 8-11
 902                 pc_dep = 1;
 903         }
 904         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 905                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 906                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 907                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 908                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 909                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 910                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 911                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 912                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 913                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 914         {
 915                 uregs = 0xf000;         // Rt 12-15
 916                 pc_dep = 1;
 917         }
 918         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 919         {
 920                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 921                 pc_dep = 1;
 922         }
 923         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 924         {
 925                 uregs = 0xf;
 926                 pc_dep = 1;
 927         }
 928         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 929         {
 930                 uregs = 0xf000; // Rd 12-15
 931                 pc_dep = 1;
 932         }
 933         else if (THUMB2_INSN_MATCH (STRD, insn[0]) && (THUMB2_INSN_REG_RN(insn[0] == 15) || THUMB2_INSN_REG_RT(insn[0] == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 934         {
 935                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 936                 pc_dep = 1;
 937         }
 938         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 939         {
 940                 uregs = 0x0f00; // Rd 8-11
 941                 pc_dep = 1;
 942         }
 943         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 944         {
 945                 uregs = 0x0f00;
 946                 pc_dep = 1;
 947         }
 948         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 949         {
 950                 uregs = 0x0f00; // Rd 8-11
 951                 pc_dep = 1;
 952         }
 953         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 954         {
 955                 uregs = 0x0f00; // Rd 8-11
 956                 pc_dep = 1;
 957         }
 958         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 959         {
 960                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 961                 pc_dep = 1;
 962         }
 963         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 964                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 965         {
 966                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 967                 pc_dep = 1;
 968         }
 969         if (unlikely(uregs && pc_dep))
 970         {
 971                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 972                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 973                 {
 974                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 975                                 insn[0], __FILE__, __LINE__);
 976                         p->safe_thumb = -1;
 977                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 978                         //return -EINVAL;
 979                 }
 980                 addr = ((unsigned int)p->addr) + 4;
 981                 *((unsigned short*)insns + 13) = 0xdeff;
 982                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 983                 *((unsigned short*)insns + 15) = addr >> 16;
 984                 if (!isThumb2(insn[0]))
 985                 {
 986                         addr = ((unsigned int)p->addr) + 2;
 987                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 988                         *((unsigned short*)insns + 17) = addr >> 16;
 989                 }
 990                 else {
 991                         addr = ((unsigned int)p->addr) + 4;
 992                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 993                         *((unsigned short*)insns + 17) = addr >> 16;
 994                 }
 995         }
 996         else {
 997                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
 998                 *((unsigned short*)insns + 13) = 0xdeff;
 999                 if (!isThumb2(insn[0]))
1000                 {
1001                         addr = ((unsigned int)p->addr) + 2;
1002                         *((unsigned short*)insns + 2) = insn[0];
1003                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
1004                         *((unsigned short*)insns + 17) = addr >> 16;
1005                 }
1006                 else {
1007                         addr = ((unsigned int)p->addr) + 4;
1008                         insns[1] = insn[0];
1009                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
1010                         *((unsigned short*)insns + 17) = addr >> 16;
1011                 }
1012         }
1013         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
1014         {
1015                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
1016                 // Mr_Nobody: we have to panic, really??...
1017                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1018                 //return -EINVAL;
1019         }
1020         return 0;
1021 }
1022
1023
1024 int kprobe_handler (struct pt_regs *regs)
1025 {
1026         struct kprobe *p = 0;
1027         int ret = 0, pid = 0, retprobe = 0, reenter = 0;
1028         kprobe_opcode_t *addr = NULL, *ssaddr = 0;
1029         struct kprobe_ctlblk *kcb;
1030         int i = 0;
1031 #ifdef OVERHEAD_DEBUG
1032         struct timeval swap_tv1;
1033         struct timeval swap_tv2;
1034 #endif
1035 #ifdef SUPRESS_BUG_MESSAGES
1036         int swap_oops_in_progress;
1037 #endif
1038         struct hlist_head *head;
1039         struct hlist_node *node;
1040         struct kprobe *pop, *retVal = NULL;
1041         struct kprobe *kp;
1042
1043 #ifdef SUPRESS_BUG_MESSAGES
1044         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1045         swap_oops_in_progress = oops_in_progress;
1046         oops_in_progress = 1;
1047 #endif
1048 #ifdef OVERHEAD_DEBUG
1049 #define USEC_IN_SEC_NUM                         1000000
1050         do_gettimeofday(&swap_tv1);
1051 #endif
1052         preempt_disable();
1053         addr = (kprobe_opcode_t *) (regs->uregs[15]);
1054         if (user_mode(regs))
1055         {
1056                 head = &kprobe_table[hash_ptr (addr, KPROBE_HASH_BITS)];
1057                 hlist_for_each_entry_rcu (pop, node, head, hlist) {
1058                         /*
1059                          * Searching occurred probe by
1060                          * instruction address and task_struct
1061                          */
1062                         if (pop->addr == addr) {
1063                                 if (pop->tgid == current->tgid) {
1064                                     retVal = pop;
1065                                     break;
1066                                 }
1067                         }
1068                 }
1069         }
1070         if (retVal) {
1071                 if (unlikely(thumb_mode(regs))) {
1072                         if (pop->safe_thumb != -1) {
1073                                 pop->ainsn.insn = pop->ainsn.insn_thumb;
1074                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1075                                         kp->ainsn.insn = pop->ainsn.insn_thumb;
1076                                 }
1077                         }
1078                         else {
1079                                 printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1080                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->opcode, pop->addr);
1081                                 // Test case when we do our actions on already running application
1082                                 arch_disarm_uprobe (pop, current);
1083                                 goto no_kprobe_live;
1084                         }
1085                 }
1086                 else {
1087                         if (pop->safe_arm != -1) {
1088                                 pop->ainsn.insn = pop->ainsn.insn_arm;
1089                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1090                                         kp->ainsn.insn = pop->ainsn.insn_arm;
1091                                 }
1092                         }
1093                         else {
1094                                 printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1095                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->opcode, pop->addr );
1096                                 // Test case when we do our actions on already running application
1097                                 arch_disarm_uprobe (pop, current);
1098                                 goto no_kprobe_live;
1099                         }
1100                 }
1101         }
1102         /* We're in an interrupt, but this is clear and BUG()-safe. */
1103         kcb = get_kprobe_ctlblk ();
1104         if (user_mode (regs))
1105         {
1106                 //DBPRINTF("exception[%lu] from user mode %s/%u addr %p (%lx).", nCount, current->comm, current->pid, addr, regs->uregs[14]);
1107                 pid = current->tgid;
1108         }
1109         /* Check we're not actually recursing */
1110         if (kprobe_running ())
1111         {
1112                 DBPRINTF ("lock???");
1113                 p = get_kprobe (addr, pid, current);
1114                 if (p)
1115                 {
1116                         if(!pid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)){
1117                                 save_previous_kprobe (kcb, p);
1118                                 kcb->kprobe_status = KPROBE_REENTER;
1119                                 reenter = 1;
1120                         }
1121                         else {
1122                                 /* We have reentered the kprobe_handler(), since
1123                                  * another probe was hit while within the handler.
1124                                  * We here save the original kprobes variables and
1125                                  * just single step on the instruction of the new probe
1126                                  * without calling any user handlers.
1127                                  */
1128                                 if(!p->ainsn.boostable){
1129                                         save_previous_kprobe (kcb, p);
1130                                         set_current_kprobe (p, regs, kcb);
1131                                 }
1132                                 kprobes_inc_nmissed_count (p);
1133                                 prepare_singlestep (p, regs);
1134                                 if(!p->ainsn.boostable)
1135                                         kcb->kprobe_status = KPROBE_REENTER;
1136                                 preempt_enable_no_resched ();
1137 #ifdef OVERHEAD_DEBUG
1138                                 do_gettimeofday(&swap_tv2);
1139                                 swap_sum_hit++;
1140                                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1141                                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1142 #endif
1143 #ifdef SUPRESS_BUG_MESSAGES
1144                                 oops_in_progress = swap_oops_in_progress;
1145 #endif
1146                                 return 0;
1147                         }
1148                 }
1149                 else
1150                 {
1151                         if(pid) { //we can reenter probe upon uretprobe exception
1152                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1153                                 // UNDEF_INSTRUCTION from user space
1154
1155                                 if (!thumb_mode ( regs ))
1156                                         p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1157                                 else
1158                                         p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1159
1160                                 if (p) {
1161                                         save_previous_kprobe (kcb, p);
1162                                         kcb->kprobe_status = KPROBE_REENTER;
1163                                         reenter = 1;
1164                                         retprobe = 1;
1165                                         DBPRINTF ("uretprobe %p\n", addr);
1166                                 }
1167                         }
1168                         if(!p) {
1169                                 p = __get_cpu_var (current_kprobe);
1170                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1171                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1172                                   DBPRINTF("kprobe_running !!! goto ss");
1173                                   goto ss_probe;
1174                                   } */
1175                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1176                                 if(pid)
1177                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1178                                 else
1179                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1180                                 if (addr == ssaddr)
1181                                 {
1182                                         regs->uregs[15] = (unsigned long) (p->addr + 1);
1183                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->uregs[15]);
1184                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1185                                                 restore_previous_kprobe (kcb);
1186                                         }
1187                                         else {
1188                                                 reset_current_kprobe ();
1189                                         }
1190                                 }
1191                                 DBPRINTF ("kprobe_running !!! goto no");
1192                                 ret = 1;
1193                                 /* If it's not ours, can't be delete race, (we hold lock). */
1194                                 DBPRINTF ("no_kprobe");
1195                                 goto no_kprobe;
1196                         }
1197                 }
1198         }
1199         if (!p)
1200         {
1201                 p = get_kprobe (addr, pid, current);
1202         }
1203         if (!p)
1204         {
1205                 if(pid) {
1206                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1207                         // UNDEF_INSTRUCTION from user space
1208
1209                         if (!thumb_mode ( regs ))
1210                                 p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1211                         else
1212                                 p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1213
1214                         if (!p) {
1215                                 /* Not one of ours: let kernel handle it */
1216                                 DBPRINTF ("no_kprobe");
1217                                 goto no_kprobe;
1218                         }
1219                         retprobe = 1;
1220                         DBPRINTF ("uretprobe %p\n", addr);
1221                 }
1222                 else {
1223                         /* Not one of ours: let kernel handle it */
1224                         DBPRINTF ("no_kprobe");
1225                         goto no_kprobe;
1226                 }
1227         }
1228         // restore opcode for thumb app
1229         if (user_mode( regs ) && thumb_mode( regs ))
1230         {
1231                 if (!isThumb2(p->opcode))
1232                 {
1233                         unsigned long tmp = p->opcode >> 16;
1234                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1235                 }else{
1236                         unsigned long tmp = p->opcode;
1237                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr), &tmp, 4);
1238                 }
1239                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1240         }
1241         set_current_kprobe (p, regs, kcb);
1242         if(!reenter)
1243                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1244         if (retprobe)           //(einsn == UNDEF_INSTRUCTION)
1245                 ret = trampoline_probe_handler (p, regs);
1246         else if (p->pre_handler)
1247         {
1248                 ret = p->pre_handler (p, regs);
1249                 if(!p->ainsn.boostable)
1250                         kcb->kprobe_status = KPROBE_HIT_SS;
1251                 else if(p->pre_handler != trampoline_probe_handler) {
1252 #ifdef SUPRESS_BUG_MESSAGES
1253                         preempt_disable();
1254 #endif
1255                         reset_current_kprobe();
1256 #ifdef SUPRESS_BUG_MESSAGES
1257                         preempt_enable_no_resched();
1258 #endif
1259                 }
1260         }
1261         if (ret)
1262         {
1263                 DBPRINTF ("p->pre_handler 1");
1264                 /* handler has already set things up, so skip ss setup */
1265 #ifdef OVERHEAD_DEBUG
1266                 do_gettimeofday(&swap_tv2);
1267                 swap_sum_hit++;
1268                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1269                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1270 #endif
1271 #ifdef SUPRESS_BUG_MESSAGES
1272                 oops_in_progress = swap_oops_in_progress;
1273 #endif
1274                 return 0;
1275         }
1276         DBPRINTF ("p->pre_handler 0");
1277
1278 no_kprobe:
1279         preempt_enable_no_resched ();
1280 #ifdef OVERHEAD_DEBUG
1281         do_gettimeofday(&swap_tv2);
1282         swap_sum_hit++;
1283         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1284                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1285 #endif
1286 #ifdef SUPRESS_BUG_MESSAGES
1287         oops_in_progress = swap_oops_in_progress;
1288 #endif
1289         printk("no_kprobe\n");
1290         return 1;               // return with death
1291 no_kprobe_live:
1292         preempt_enable_no_resched ();
1293 #ifdef OVERHEAD_DEBUG
1294         do_gettimeofday(&swap_tv2);
1295         swap_sum_hit++;
1296         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1297                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1298 #endif
1299 #ifdef SUPRESS_BUG_MESSAGES
1300         oops_in_progress = swap_oops_in_progress;
1301 #endif
1302         printk("no_kprobe live\n");
1303         return 0;               // ok - life is life
1304 }
1305
1306 void patch_suspended_task_ret_addr(struct task_struct *p, struct kretprobe *rp)
1307 {
1308         struct kretprobe_instance *ri = NULL;
1309         struct hlist_node *node, *tmp;
1310         struct hlist_head *head;
1311         unsigned long flags;
1312         int found = 0;
1313
1314         spin_lock_irqsave (&kretprobe_lock, flags);
1315         head = kretprobe_inst_table_head (p);
1316         hlist_for_each_entry_safe (ri, node, tmp, head, hlist){
1317                 if ((ri->rp == rp) && (p == ri->task)){
1318                         found = 1;
1319                         break;
1320                 }
1321         }
1322         spin_unlock_irqrestore (&kretprobe_lock, flags);
1323
1324 #ifndef task_thread_info
1325 #define task_thread_info(task) (task)->thread_info
1326 #endif // task_thread_info
1327
1328         if (found){
1329                 // update PC
1330                 if(thread_saved_pc(p) != (unsigned long)&kretprobe_trampoline){
1331                         ri->ret_addr = (kprobe_opcode_t *)thread_saved_pc(p);
1332                         task_thread_info(p)->cpu_context.pc = (unsigned long) &kretprobe_trampoline;
1333                 }
1334                 return;
1335         }
1336
1337         spin_lock_irqsave (&kretprobe_lock, flags);
1338         if ((ri = get_free_rp_inst(rp)) != NULL)
1339         {
1340                 ri->rp = rp;
1341                 ri->rp2 = NULL;
1342                 ri->task = p;
1343                 ri->ret_addr = (kprobe_opcode_t *)thread_saved_pc(p);
1344                 task_thread_info(p)->cpu_context.pc = (unsigned long) &kretprobe_trampoline;
1345                 add_rp_inst (ri);
1346                 //              printk("change2 saved pc %p->%p for %d/%d/%p\n", ri->ret_addr, &kretprobe_trampoline, p->tgid, p->pid, p);
1347         }
1348         else{
1349                 printk("no ri for %d\n", p->pid);
1350                 BUG();
1351         }
1352         spin_unlock_irqrestore (&kretprobe_lock, flags);
1353 }
1354
1355 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1356 {
1357         struct jprobe *jp = container_of (p, struct jprobe, kp);
1358         kprobe_pre_entry_handler_t pre_entry;
1359         entry_point_t entry;
1360
1361 # ifdef REENTER
1362         p = __get_cpu_var (current_kprobe);
1363 # endif
1364
1365         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1366         entry = (entry_point_t) jp->entry;
1367         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1368         //if(!entry)
1369         //      DIE("entry NULL", regs)
1370         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1371
1372         //call handler for all kernel probes and user space ones which belong to current tgid
1373         if (!p->tgid || (p->tgid == current->tgid))
1374         {
1375                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp){
1376                         struct task_struct *p, *g;
1377                         rcu_read_lock();
1378                         //swapper task
1379                         if(current != &init_task)
1380                                 patch_suspended_task_ret_addr(&init_task, sched_rp);
1381                         // other tasks
1382                         do_each_thread(g, p){
1383                                 if(p == current)
1384                                         continue;
1385                                 patch_suspended_task_ret_addr(p, sched_rp);
1386                         } while_each_thread(g, p);
1387                         rcu_read_unlock();
1388                 }
1389                 if (pre_entry)
1390                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1391                 if (entry){
1392                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1393                 }
1394                 else {
1395                         if (p->tgid)
1396                                 dbi_arch_uprobe_return ();
1397                         else
1398                                 dbi_jprobe_return ();
1399                 }
1400         }
1401         else if (p->tgid)
1402                 dbi_arch_uprobe_return ();
1403
1404         prepare_singlestep (p, regs);
1405
1406         return 1;
1407 }
1408
1409 void dbi_jprobe_return (void)
1410 {
1411         preempt_enable_no_resched();
1412 }
1413
1414 void dbi_arch_uprobe_return (void)
1415 {
1416         preempt_enable_no_resched();
1417 }
1418
1419 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1420 {
1421 # ifndef REENTER
1422         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1423         kprobe_opcode_t insns[2];
1424
1425         if (p->pid)
1426         {
1427                 insns[0] = BREAKPOINT_INSTRUCTION;
1428                 insns[1] = p->opcode;
1429                 //p->opcode = *p->addr;
1430                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1431                 {
1432                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1433                         return -1;
1434                 }
1435                 //*p->addr = BREAKPOINT_INSTRUCTION;
1436                 //*(p->addr+1) = p->opcode;
1437                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1438                 {
1439                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1440                         return -1;
1441                 }
1442         }
1443         else
1444         {
1445                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1446                 *(p->addr + 1) = p->opcode;
1447                 p->opcode = *p->addr;
1448                 *p->addr = BREAKPOINT_INSTRUCTION;
1449
1450                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1451         }
1452
1453         reset_current_kprobe ();
1454
1455 #endif //REENTER
1456
1457         return 0;
1458 }
1459
1460
1461 void arch_arm_kprobe (struct kprobe *p)
1462 {
1463         *p->addr = BREAKPOINT_INSTRUCTION;
1464         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1465 }
1466
1467 void arch_disarm_kprobe (struct kprobe *p)
1468 {
1469         *p->addr = p->opcode;
1470         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1471 }
1472
1473
1474 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1475 {
1476         struct kretprobe_instance *ri = NULL;
1477         struct hlist_head *head, empty_rp;
1478         struct hlist_node *node, *tmp;
1479         unsigned long flags, orig_ret_address = 0;
1480         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1481
1482         struct kretprobe *crp = NULL;
1483         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1484
1485         DBPRINTF ("start");
1486
1487         if (p && p->tgid){
1488                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1489                 if (!thumb_mode( regs ))
1490                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1491                 else
1492                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1493         }
1494
1495         INIT_HLIST_HEAD (&empty_rp);
1496         spin_lock_irqsave (&kretprobe_lock, flags);
1497
1498         /*
1499          * We are using different hash keys (current and mm) for finding kernel
1500          * space and user space probes.  Kernel space probes can change mm field in
1501          * task_struct.  User space probes can be shared between threads of one
1502          * process so they have different current but same mm.
1503          */
1504         if (p && p->tgid) {
1505                 head = kretprobe_inst_table_head(current->mm);
1506         } else {
1507                 head = kretprobe_inst_table_head(current);
1508         }
1509
1510         /*
1511          * It is possible to have multiple instances associated with a given
1512          * task either because an multiple functions in the call path
1513          * have a return probe installed on them, and/or more then one
1514          * return probe was registered for a target function.
1515          *
1516          * We can handle this because:
1517          *     - instances are always inserted at the head of the list
1518          *     - when multiple return probes are registered for the same
1519          *       function, the first instance's ret_addr will point to the
1520          *       real return address, and all the rest will point to
1521          *       kretprobe_trampoline
1522          */
1523         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1524         {
1525                 if (ri->task != current)
1526                         /* another task is sharing our hash bucket */
1527                         continue;
1528                 if (ri->rp && ri->rp->handler){
1529                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1530                 }
1531
1532                 orig_ret_address = (unsigned long) ri->ret_addr;
1533                 recycle_rp_inst (ri, &empty_rp);
1534                 if (orig_ret_address != trampoline_address)
1535                         /*
1536                          * This is the real return address. Any other
1537                          * instances associated with this task are for
1538                          * other calls deeper on the call stack
1539                          */
1540                         break;
1541         }
1542         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1543         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1544         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1545         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1546         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1547         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1548         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1549         //}
1550         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1551                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1552
1553         regs->uregs[14] = orig_ret_address;
1554         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1555         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1556
1557         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1558         {
1559                 regs->uregs[15] = orig_ret_address;
1560         }else{
1561                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1562                 else regs->uregs[15] += 2;
1563         }
1564
1565         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1566
1567         if(p){ // ARM, MIPS, X86 user space
1568                 if (kcb->kprobe_status == KPROBE_REENTER)
1569                         restore_previous_kprobe (kcb);
1570                 else
1571                         reset_current_kprobe ();
1572
1573                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1574                 {
1575                         regs->ARM_cpsr &= 0xFFFFFFDF;
1576                 }else{
1577                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1578                         {
1579                                 regs->ARM_cpsr |= 0x20;
1580                         }
1581                 }
1582
1583                 //TODO: test - enter function, delete us retprobe, exit function
1584                 // for user space retprobes only - deferred deletion
1585
1586                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1587                 {
1588                         // if we are not at the end of the list and current retprobe should be disarmed
1589                         if (node && ri->rp2)
1590                         {
1591                                 struct hlist_node *current_node = node;
1592                                 crp = ri->rp2;
1593                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1594                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1595                                   DIE(die_msg, regs); */
1596                                 // look for other instances for the same retprobe
1597                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1598                                 {
1599                                         /*
1600                                          * Trying to find another retprobe instance associated with
1601                                          * the same retprobe.
1602                                          */
1603                                         if (ri->rp2 == crp && node != current_node)
1604                                                 break;
1605                                 }
1606
1607                                 if (!node)
1608                                 {       // if there are no more instances for this retprobe
1609                                         // delete retprobe
1610                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1611                                         /*
1612                                           If there is no any retprobe instances of this retprobe
1613                                           we can free the resources related to the probe.
1614                                          */
1615                                         struct kprobe *is_p = &crp->kp;
1616                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1617                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1618                                         }
1619                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1620                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1621                                         }
1622                                         unregister_uprobe (&crp->kp, current, 1);
1623                                         kfree (crp);
1624                                 }
1625                                 hlist_del(current_node);
1626                         }
1627                 }
1628         }
1629
1630         hlist_for_each_entry_safe (ri, node, tmp, &empty_rp, hlist)
1631         {
1632                 hlist_del (&ri->hlist);
1633                 kfree (ri);
1634         }
1635         spin_unlock_irqrestore (&kretprobe_lock, flags);
1636
1637         preempt_enable_no_resched ();
1638         /*
1639          * By returning a non-zero value, we are telling
1640          * kprobe_handler() that we don't want the post_handler
1641          * to run (and have re-enabled preemption)
1642          */
1643
1644         return 1;
1645 }
1646
1647 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1648 {
1649         struct kretprobe_instance *ri;
1650
1651         DBPRINTF ("start\n");
1652         //TODO: test - remove retprobe after func entry but before its exit
1653         if ((ri = get_free_rp_inst (rp)) != NULL)
1654         {
1655                 ri->rp = rp;
1656                 ri->rp2 = NULL;
1657                 ri->task = current;
1658                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1659
1660                 if (rp->kp.tgid)
1661                         if (!thumb_mode( regs ))
1662                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1663                         else
1664                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1665
1666                 else    /* Replace the return addr with trampoline addr */
1667                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1668
1669 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1670                 add_rp_inst (ri);
1671         }
1672         else {
1673                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1674                 rp->nmissed++;
1675         }
1676 }
1677
1678
1679 int asm_init_module_dependencies()
1680 {
1681         //No module dependencies
1682         return 0;
1683 }
1684
1685 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38)
1686 typedef unsigned long (* in_gate_area_fp_t)(unsigned long);
1687 in_gate_area_fp_t in_gate_area_fp;
1688 #endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38) */
1689
1690 void (* do_kpro)(struct undef_hook *);
1691 void (* undo_kpro)(struct undef_hook *);
1692
1693 // kernel probes hook
1694 struct undef_hook undef_ho_k = {
1695     .instr_mask = 0xffffffff,
1696     .instr_val  = BREAKPOINT_INSTRUCTION,
1697     .cpsr_mask  = MODE_MASK,
1698     .cpsr_val   = SVC_MODE,
1699     .fn         = kprobe_handler,
1700 };
1701
1702 // userspace probes hook (arm)
1703 struct undef_hook undef_ho_u = {
1704     .instr_mask = 0xffffffff,
1705     .instr_val  = BREAKPOINT_INSTRUCTION,
1706     .cpsr_mask  = MODE_MASK,
1707     .cpsr_val   = USR_MODE,
1708     .fn         = kprobe_handler,
1709 };
1710
1711 // userspace probes hook (thumb)
1712 struct undef_hook undef_ho_u_t = {
1713     .instr_mask = 0xffffffff,
1714     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1715     .cpsr_mask  = MODE_MASK,
1716     .cpsr_val   = USR_MODE,
1717     .fn         = kprobe_handler,
1718 };
1719
1720 int __init arch_init_kprobes (void)
1721 {
1722         unsigned int do_bp_handler = 0;
1723         int ret = 0;
1724
1725         if (arch_init_module_dependencies())
1726         {
1727                 DBPRINTF ("Unable to init module dependencies\n");
1728                 return -1;
1729         }
1730
1731 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38)
1732         in_gate_area_fp = (in_gate_area_fp_t)kallsyms_search("in_gate_area_no_mm");
1733         if (!in_gate_area_fp) {
1734                 DBPRINTF("no in_gate_area symbol found!");
1735                 return -1;
1736         }
1737 #endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38) */
1738
1739         do_bp_handler = (unsigned int) kallsyms_search ("do_undefinstr");
1740         if (do_bp_handler == 0) {
1741                 DBPRINTF("no do_undefinstr symbol found!");
1742                 return -1;
1743         }
1744         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1745         // Register hooks (kprobe_handler)
1746         do_kpro = kallsyms_search ("register_undef_hook");
1747         if (do_kpro == 0) {
1748                 printk("no register_undef_hook symbol found!\n");
1749                 return -1;
1750         }
1751         do_kpro(&undef_ho_k);
1752         do_kpro(&undef_ho_u);
1753         do_kpro(&undef_ho_u_t);
1754         if ((ret = dbi_register_kprobe (&trampoline_p, 0)) != 0) {
1755                 //dbi_unregister_jprobe(&do_exit_p, 0);
1756                 return ret;
1757         }
1758         return ret;
1759 }
1760
1761 void __exit dbi_arch_exit_kprobes (void)
1762 {
1763         // Unregister hooks (kprobe_handler)
1764         undo_kpro = kallsyms_search ("unregister_undef_hook");
1765         if (undo_kpro == 0) {
1766                 printk("no unregister_undef_hook symbol found!\n");
1767                 return -1;
1768         }
1769         undo_kpro(&undef_ho_u_t);
1770         undo_kpro(&undef_ho_u);
1771         undo_kpro(&undef_ho_k);
1772 }
1773
1774 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1775 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);