Added functions, beginning with MOVW, instrumentation
[kernel/swap-modules.git] / kprobe / arch / asm-arm / dbi_kprobes.c
1 /*
2  *  Dynamic Binary Instrumentation Module based on KProbes
3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18  *
19  * Copyright (C) Samsung Electronics, 2006-2010
20  *
21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
23  *              Probes initial implementation; Support x86.
24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
25  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
26  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
28  *              kprobe_handler() now called via undefined instruction hooks
29  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
30  */
31
32 #include <linux/module.h>
33 #include <linux/mm.h>
34
35 #include "dbi_kprobes.h"
36 #include "../dbi_kprobes.h"
37
38 #include "../../dbi_kdebug.h"
39 #include "../../dbi_insn_slots.h"
40 #include "../../dbi_kprobes_deps.h"
41 #include "../../dbi_uprobes.h"
42
43 #include <asm/cacheflush.h>
44
45 #ifdef OVERHEAD_DEBUG
46 #include <linux/time.h>
47 #endif
48
49 #include <asm/traps.h>
50 #include <asm/ptrace.h>
51 #include <linux/list.h>
52 #include <linux/hash.h>
53
54 #define SUPRESS_BUG_MESSAGES
55
56 extern unsigned int *sched_addr;
57 extern unsigned int *fork_addr;
58
59 extern struct kprobe * per_cpu__current_kprobe;
60 extern spinlock_t kretprobe_lock;
61 extern struct kretprobe *sched_rp;
62
63 extern struct hlist_head kprobe_insn_pages;
64 extern struct hlist_head uprobe_insn_pages;
65
66 extern unsigned long (*kallsyms_search) (const char *name);
67
68 extern struct kprobe *kprobe_running (void);
69 extern struct kprobe_ctlblk *get_kprobe_ctlblk (void);
70 extern void reset_current_kprobe (void);
71 extern struct kprobe * current_kprobe;
72
73 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
74
75 #ifdef OVERHEAD_DEBUG
76 unsigned long swap_sum_time = 0;
77 unsigned long swap_sum_hit = 0;
78 EXPORT_SYMBOL_GPL (swap_sum_time);
79 EXPORT_SYMBOL_GPL (swap_sum_hit);
80 #endif
81
82 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
83 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
84
85 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t addr)
86 {
87         // real position less then PC by 8
88         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
89 }
90
91 unsigned int arr_traps_template[] = {
92                 0xe1a0c00d,    // mov          ip, sp
93                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
94                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
95                 0x00000000,    // b
96                 0xe3500000,    // cmp          r0, #0  ; 0x0
97                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
98                 0x00000000,    // nop
99                 0xffffffff     // end
100 };
101
102
103 struct kprobe trampoline_p =
104 {
105         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
106         .pre_handler = trampoline_probe_handler
107 };
108
109 // is instruction Thumb2 and NOT a branch, etc...
110 int isThumb2(kprobe_opcode_t insn)
111 {
112         if((    (insn & 0xf800) == 0xe800 ||
113                 (insn & 0xf800) == 0xf000 ||
114                 (insn & 0xf800) == 0xf800)) return 1;
115         return 0;
116 }
117
118
119 int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
120 {
121         int i;
122
123         if (uregs & 0x10)
124         {
125                 int reg_mask = 0x1;
126                 //search in reg list
127                 for (i = 0; i < 13; i++, reg_mask <<= 1)
128                 {
129                         if (!(insn & reg_mask))
130                                 break;
131                 }
132         }
133         else
134         {
135                 for (i = 0; i < 13; i++)
136                 {
137                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
138                                 continue;
139                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
140                                 continue;
141                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
142                                 continue;
143                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
144                                 continue;
145                         break;
146                 }
147         }
148         if (i == 13)
149         {
150                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
151                 return -EINVAL;
152         }
153         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
154
155         // set register to save
156         ARM_INSN_REG_SET_RD (insns[0], i);
157         // set register to load address to
158         ARM_INSN_REG_SET_RD (insns[1], i);
159         // set instruction to execute and patch it
160         if (uregs & 0x10)
161         {
162                 ARM_INSN_REG_CLEAR_MR (insn, 15);
163                 ARM_INSN_REG_SET_MR (insn, i);
164         }
165         else
166         {
167                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
168                         ARM_INSN_REG_SET_RN (insn, i);
169                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
170                         ARM_INSN_REG_SET_RD (insn, i);
171                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
172                         ARM_INSN_REG_SET_RS (insn, i);
173                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
174                         ARM_INSN_REG_SET_RM (insn, i);
175         }
176         insns[UPROBES_TRAMP_INSN_IDX] = insn;
177         // set register to restore
178         ARM_INSN_REG_SET_RD (insns[3], i);
179         return 0;
180 }
181
182
183
184 int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
185 {
186         unsigned char mreg = 0;
187         unsigned char reg = 0;
188
189
190         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
191         {
192                 reg = ((insn & 0xffff) & uregs) >> 8;
193         }else{
194                 if (THUMB_INSN_MATCH (MOV3, insn))
195                 {
196                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
197                                 reg = (insn & 0xffff) & uregs;
198                         else
199                                 return 0;
200                 }else{
201                         if (THUMB2_INSN_MATCH (ADR, insn))
202                         {
203                                 reg = ((insn >> 16) & uregs) >> 8;
204                                 if (reg == 15) return 0;
205                         }else{
206                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
207                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
208                                     THUMB2_INSN_MATCH (LDRWL, insn))
209                                 {
210                                         reg = ((insn >> 16) & uregs) >> 12;
211                                         if (reg == 15) return 0;
212                                 }else{
213 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
214                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
215                                         {
216                                                 reg = ((insn >> 16) & uregs) >> 12;
217                                         }else{
218                                                 if (THUMB2_INSN_MATCH (DP, insn))
219                                                 {
220                                                         reg = ((insn >> 16) & uregs) >> 12;
221                                                         if (reg == 15) return 0;
222                                                 }else{
223                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
224                                                         {
225                                                                 reg = ((insn >> 12) & uregs) >> 8;
226                                                                 if (reg == 15) return 0;
227                                                         }else{
228                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
229                                                                 {
230                                                                         reg = ((insn >> 12) & uregs) >> 8;
231                                                                         if (reg == 15) return 0;
232                                                                 }else{
233                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
234                                                                         {
235                                                                                 reg = ((insn >> 12) & uregs) >> 8;
236                                                                                 if (reg == 15) return 0;
237                                                                         }else{
238                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
239                                                                                 {
240                                                                                         reg = 15;
241                                                                                 }else{
242                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
243                                                                                         {
244                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
245                                                                                         }
246                                                                                 }
247                                                                         }
248                                                                 }
249                                                         }
250                                                 }
251                                         }
252                                 }
253                         }
254                 }
255         }
256
257         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
258                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
259                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
260         {
261                 reg = THUMB2_INSN_REG_RT(insn);
262         }
263
264         if (reg == 6 || reg == 7)
265         {
266                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
267                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
268                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
269                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
270                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
271                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
272                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
273                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
274         }
275
276
277         if (THUMB_INSN_MATCH (APC, insn))
278         {
279 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
280                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
281         }else{
282                 if (THUMB_INSN_MATCH (LRO3, insn))
283                 {
284 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
285                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
286                 }else{
287                         if (THUMB_INSN_MATCH (MOV3, insn))
288                         {
289 //                              MOV Rd, PC -> MOV Rd, SP
290                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
291                         }else{
292                                 if (THUMB2_INSN_MATCH (ADR, insn))
293                                 {
294 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
295                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
296                                 }else{
297                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
298                                             THUMB2_INSN_MATCH (LDRHW, insn))
299                                         {
300 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
301 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
302 //                                              !!! imm_12 vs. imm_8 !!!
303 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
304                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
305                                         }else{
306                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
307                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
308                                                     THUMB2_INSN_MATCH (LDREX, insn))
309                                                 {
310 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
311                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
312                                                 }else{
313                                                         if (THUMB2_INSN_MATCH (MUL, insn))
314                                                         {
315                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
316                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
317                                                                 {
318                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
319                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
320                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
321                                                                         {
322 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
323                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
324                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
325                                                                                 {
326                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
327                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
328                                                                                         {
329                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
330                                                                                                 {
331                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
332                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
333                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
334                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
335                                                                                                 {
336                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
337                                                                                                 }
338                                                                                         }
339                                                                                 }
340                                                                         }
341                                                                 }
342                                                         }
343                                                 }
344                                         }
345                                 }
346                         }
347                 }
348         }
349
350         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
351         {
352                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
353         }else{
354                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
355                 {
356                         if (THUMB2_INSN_REG_RN(insn) == 15)
357                         {
358                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
359                         }else{
360                                 insns[2] = insn;
361                         }
362                 }else{
363                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
364                         {
365                                 if (THUMB2_INSN_REG_RN(insn) == 15)
366                                 {
367                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
368                                 }else{
369                                         insns[2] = insn;
370                                 }
371                         }
372                 }
373         }
374
375 //       STRx PC, xxx
376         if ((reg == 15) && THUMB2_INSN_MATCH (STRW, insn)   || \
377                            THUMB2_INSN_MATCH (STRBW, insn)  || \
378                            THUMB2_INSN_MATCH (STRD, insn)   || \
379                            THUMB2_INSN_MATCH (STRHT, insn)  || \
380                            THUMB2_INSN_MATCH (STRT, insn)   || \
381                            THUMB2_INSN_MATCH (STRHW1, insn) || \
382                            THUMB2_INSN_MATCH (STRHW, insn) )
383         {
384                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
385         }
386
387
388
389         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
390         {
391                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
392         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
393                 {
394                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
395                         {
396                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
397                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
398                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
399                 }
400         }
401
402         return 0;
403 }
404
405
406
407 int arch_check_insn_arm (struct arch_specific_insn *ainsn)
408 {
409         int ret = 0;
410         kprobe_opcode_t *insn;
411
412         // check instructions that can change PC by nature
413         if (
414 //              ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
415                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
416                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
417                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
418                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
419                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
420                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
421                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
422                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
423         {
424                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
425                 ret = -EFAULT;
426         }
427 #ifndef CONFIG_CPU_V7
428         // check instructions that can write result to PC
429         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
430                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
431                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
432                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
433                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
434                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
435         {
436                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
437                 ret = -EFAULT;
438         }
439 #endif // CONFIG_CPU_V7
440         // check special instruction loads store multiple registers
441         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
442                         // store pc or load to pc
443                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
444                          // store/load with pc update
445                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
446         {
447                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
448                 ret = -EFAULT;
449         }
450         return ret;
451 }
452
453 int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
454 {
455         int ret = 0;
456
457         // check instructions that can change PC
458         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
459                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
460                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
461                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
462                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
463                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
464                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
465                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
466                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
467                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
468                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
469                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
470                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
471                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
472                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
473                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
474                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
475                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
476                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
477                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
478                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
479                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
480                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
481                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
482                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
483                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
484                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
485                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
486 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
487                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
488                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
489                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
490                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
491                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
492                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
493                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
494                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
495 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
496                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
497         {
498                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
499                 ret = -EFAULT;
500         }
501
502         return ret;
503 }
504
505 int arch_prepare_kretprobe (struct kretprobe *p)
506 {
507         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
508         return 0;
509 }
510
511 int arch_prepare_kprobe (struct kprobe *p)
512 {
513         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
514         int uregs, pc_dep, ret = 0;
515     kprobe_opcode_t insn[MAX_INSN_SIZE];
516     struct arch_specific_insn ainsn;
517
518     /* insn: must be on special executable page on i386. */
519     p->ainsn.insn = get_insn_slot (NULL, 0);
520     if (!p->ainsn.insn)
521         return -ENOMEM;
522
523     memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
524     ainsn.insn_arm = ainsn.insn = insn;
525     ret = arch_check_insn_arm (&ainsn);
526     if (!ret)
527     {
528         p->opcode = *p->addr;
529         p->ainsn.boostable = 1;
530         uregs = pc_dep = 0;
531
532         // Rn, Rm ,Rd
533         if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
534            ARM_INSN_MATCH (SRO, insn[0]))
535         {
536             uregs = 0xb;
537             if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
538                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
539             {
540                 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
541                 pc_dep = 1;
542             }
543         }
544         // Rn ,Rd
545         else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
546                 ARM_INSN_MATCH (SIO, insn[0]))
547         {
548             uregs = 0x3;
549             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
550                         (ARM_INSN_REG_RD (insn[0]) == 15)))
551             {
552                 pc_dep = 1;
553                 DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
554             }
555         }
556         // Rn, Rm, Rs
557         else if(ARM_INSN_MATCH (DPRS, insn[0]))
558         {
559             uregs = 0xd;
560             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
561                 (ARM_INSN_REG_RS (insn[0]) == 15))
562             {
563                 pc_dep = 1;
564                 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
565             }
566         }
567         // register list
568         else if(ARM_INSN_MATCH (SM, insn[0]))
569         {
570             uregs = 0x10;
571             if (ARM_INSN_REG_MR (insn[0], 15))
572             {
573                 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
574                 pc_dep = 1;
575             }
576         }
577         // check instructions that can write result to SP andu uses PC
578         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
579         {
580             free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
581             ret = -EFAULT;
582         }
583         else
584         {
585             if (uregs && pc_dep)
586             {
587                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
588                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
589                 {
590                     DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
591                     free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
592                     return -EINVAL;
593                 }
594                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
595             }
596             else
597             {
598                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
599                 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
600             }
601             insns[7] = (kprobe_opcode_t) (p->addr + 1);
602             DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
603             DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
604                     p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
605                     insns[5], insns[6], insns[7], insns[8]);
606             memcpy (p->ainsn.insn, insns, sizeof(insns));
607             flush_icache_range(p->ainsn.insn, p->ainsn.insn + sizeof(insns));
608 #ifdef BOARD_tegra
609             flush_cache_all();
610 #endif
611         }
612     }
613     else
614     {
615         free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
616         printk("arch_prepare_kprobe: instruction 0x%x not instrumentation, addr=0x%p\n", insn[0], p->addr);
617     }
618
619     return ret;
620 }
621
622 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
623 {
624         kprobe_opcode_t insn;
625         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
626
627         insn = bpi >> 2;
628         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
629         if (abs (insn & 0xffffff) > 0xffffff)
630         {
631                 DBPRINTF ("ERROR: kprobe address out of range\n");
632                 BUG ();
633         }
634         insn = insn & 0xffffff;
635         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
636         DBPRINTF ("insn=%lX\n", insn);
637         return (unsigned int) insn;
638 }
639
640
641 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
642 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
643
644 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
645 {
646         int ret = 0;
647         kprobe_opcode_t insn[MAX_INSN_SIZE];
648
649         if ((unsigned long) p->addr & 0x01)
650         {
651                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
652                 return -EINVAL;
653         }
654         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
655                 panic ("Failed to read memory %p!\n", p->addr);
656         p->opcode = insn[0];
657         p->ainsn.insn_arm = get_insn_slot(task, atomic);
658         if (!p->ainsn.insn_arm) {
659                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
660                 return -ENOMEM;
661         }
662         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
663         if (ret) {
664                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
665                 return -EFAULT;
666         }
667         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
668         if (!p->ainsn.insn_thumb) {
669                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
670                 return -ENOMEM;
671         }
672         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
673         if (ret) {
674                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
675                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
676                 return -EFAULT;
677         }
678         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
679                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both)\n", __FILE__, __LINE__);
680                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
681                         panic ("Failed to write memory %p!\n", p->addr);
682                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
683                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
684                 return -EFAULT;
685         }
686         p->ainsn.boostable = 1;
687         return ret;
688 }
689
690 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
691 {
692         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
693         return 0;
694 }
695
696 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
697 {
698         if(p->ss_addr)
699         {
700                 regs->uregs[15] = (unsigned long) p->ss_addr;
701                 p->ss_addr = NULL;
702         }
703         else
704                 regs->uregs[15] = (unsigned long) p->ainsn.insn;
705 }
706
707 void save_previous_kprobe (struct kprobe_ctlblk *kcb, struct kprobe *cur_p)
708 {
709         if (kcb->prev_kprobe.kp != NULL)
710         {
711                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
712         }
713
714         kcb->prev_kprobe.kp = kprobe_running ();
715         kcb->prev_kprobe.status = kcb->kprobe_status;
716 }
717
718 void restore_previous_kprobe (struct kprobe_ctlblk *kcb)
719 {
720         set_current_kprobe(kcb->prev_kprobe.kp, NULL, NULL);
721         kcb->kprobe_status = kcb->prev_kprobe.status;
722         kcb->prev_kprobe.kp = NULL;
723         kcb->prev_kprobe.status = 0;
724 }
725
726 void set_current_kprobe (struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
727 {
728         __get_cpu_var (current_kprobe) = p;
729         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
730 }
731
732 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
733 {
734         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
735         int uregs, pc_dep;
736         kprobe_opcode_t insn[MAX_INSN_SIZE];
737         struct arch_specific_insn ainsn;
738
739         p->safe_arm = -1;
740         if ((unsigned long) p->addr & 0x01)
741         {
742                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
743                 return -EINVAL;
744         }
745         insn[0] = p->opcode;
746         ainsn.insn_arm = insn;
747         if (!arch_check_insn_arm(&ainsn))
748         {
749                 p->safe_arm = 0;
750         }
751         uregs = pc_dep = 0;
752         // Rn, Rm ,Rd
753         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
754                         ARM_INSN_MATCH (SRO, insn[0]))
755         {
756                 uregs = 0xb;
757                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
758                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
759                 {
760                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
761                         pc_dep = 1;
762                 }
763         }
764         // Rn ,Rd
765         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
766                         ARM_INSN_MATCH (SIO, insn[0]))
767         {
768                 uregs = 0x3;
769                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
770                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
771                 {
772                         pc_dep = 1;
773                         DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
774                 }
775         }
776         // Rn, Rm, Rs
777         else if (ARM_INSN_MATCH (DPRS, insn[0]))
778         {
779                 uregs = 0xd;
780                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
781                                 (ARM_INSN_REG_RS (insn[0]) == 15))
782                 {
783                         pc_dep = 1;
784                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
785                 }
786         }
787         // register list
788         else if (ARM_INSN_MATCH (SM, insn[0]))
789         {
790                 uregs = 0x10;
791                 if (ARM_INSN_REG_MR (insn[0], 15))
792                 {
793                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
794                         pc_dep = 1;
795                 }
796         }
797         // check instructions that can write result to SP andu uses PC
798         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
799         {
800                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
801                 p->safe_arm = -1;
802                 // TODO: move free to later phase
803                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
804                 //ret = -EFAULT;
805         }
806         if (unlikely(uregs && pc_dep))
807         {
808                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
809                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
810                 {
811                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
812                                 insn[0], __FILE__, __LINE__);
813                         p->safe_arm = -1;
814                         // TODO: move free to later phase
815                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
816                         //return -EINVAL;
817                 }
818                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
819                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
820         }
821         else
822         {
823                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
824                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
825         }
826         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
827         insns[7] = (kprobe_opcode_t) (p->addr + 1);
828
829         // B
830         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
831         {
832                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
833                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
834                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
835                 insns[7] = get_addr_b(p->opcode, p->addr);
836         }
837
838         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
839                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
840                         insns[5], insns[6], insns[7], insns[8]);
841         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
842         {
843                 panic("failed to write memory %p!\n", p->ainsn.insn);
844                 // Mr_Nobody: we have to panic, really??...
845                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
846                 //return -EINVAL;
847         }
848         return 0;
849 }
850
851 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
852 {
853         int uregs, pc_dep;
854         unsigned int addr;
855         kprobe_opcode_t insn[MAX_INSN_SIZE];
856         struct arch_specific_insn ainsn;
857         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
858
859         p->safe_thumb = -1;
860         if ((unsigned long) p->addr & 0x01)
861         {
862                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
863                 return -EINVAL;
864         }
865         insn[0] = p->opcode;
866         ainsn.insn_thumb = insn;
867         if (!arch_check_insn_thumb(&ainsn))
868         {
869                 p->safe_thumb = 0;
870         }
871         uregs = 0;
872         pc_dep = 0;
873         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
874         {
875                 uregs = 0x0700;         // 8-10
876                 pc_dep = 1;
877         }
878         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
879         {
880                 // MOV Rd, PC
881                 uregs = 0x07;
882                 pc_dep = 1;
883         }
884         else if THUMB2_INSN_MATCH (ADR, insn[0])
885         {
886                 uregs = 0x0f00;         // Rd 8-11
887                 pc_dep = 1;
888         }
889         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
890                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
891                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
892                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
893                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
894                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
895                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
896                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
897                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
898                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
899         {
900                 uregs = 0xf000;         // Rt 12-15
901                 pc_dep = 1;
902         }
903         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
904         {
905                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
906                 pc_dep = 1;
907         }
908         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
909         {
910                 uregs = 0xf;
911                 pc_dep = 1;
912         }
913         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
914         {
915                 uregs = 0xf000; // Rd 12-15
916                 pc_dep = 1;
917         }
918         else if (THUMB2_INSN_MATCH (STRD, insn[0]) && (THUMB2_INSN_REG_RN(insn[0] == 15) || THUMB2_INSN_REG_RT(insn[0] == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
919         {
920                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
921                 pc_dep = 1;
922         }
923         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
924         {
925                 uregs = 0x0f00; // Rd 8-11
926                 pc_dep = 1;
927         }
928         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
929         {
930                 uregs = 0x0f00;
931                 pc_dep = 1;
932         }
933         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
934         {
935                 uregs = 0x0f00; // Rd 8-11
936                 pc_dep = 1;
937         }
938         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
939         {
940                 uregs = 0x0f00; // Rd 8-11
941                 pc_dep = 1;
942         }
943         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
944         {
945                 uregs = 0xf0000;        //Rn 0-3 (16-19)
946                 pc_dep = 1;
947         }
948         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
949                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
950         {
951                 uregs = 0xf0000;        //Rn 0-3 (16-19)
952                 pc_dep = 1;
953         }
954         if (unlikely(uregs && pc_dep))
955         {
956                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
957                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
958                 {
959                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
960                                 insn[0], __FILE__, __LINE__);
961                         p->safe_thumb = -1;
962                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
963                         //return -EINVAL;
964                 }
965                 addr = ((unsigned int)p->addr) + 4;
966                 *((unsigned short*)insns + 13) = 0xdeff;
967                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
968                 *((unsigned short*)insns + 15) = addr >> 16;
969                 if (!isThumb2(insn[0]))
970                 {
971                         addr = ((unsigned int)p->addr) + 2;
972                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
973                         *((unsigned short*)insns + 17) = addr >> 16;
974                 }
975                 else {
976                         addr = ((unsigned int)p->addr) + 4;
977                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
978                         *((unsigned short*)insns + 17) = addr >> 16;
979                 }
980         }
981         else {
982                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
983                 *((unsigned short*)insns + 13) = 0xdeff;
984                 if (!isThumb2(insn[0]))
985                 {
986                         addr = ((unsigned int)p->addr) + 2;
987                         *((unsigned short*)insns + 2) = insn[0];
988                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
989                         *((unsigned short*)insns + 17) = addr >> 16;
990                 }
991                 else {
992                         addr = ((unsigned int)p->addr) + 4;
993                         insns[1] = insn[0];
994                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
995                         *((unsigned short*)insns + 17) = addr >> 16;
996                 }
997         }
998         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
999         {
1000                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
1001                 // Mr_Nobody: we have to panic, really??...
1002                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1003                 //return -EINVAL;
1004         }
1005         return 0;
1006 }
1007
1008
1009 int kprobe_handler (struct pt_regs *regs)
1010 {
1011         struct kprobe *p = 0;
1012         int ret = 0, pid = 0, retprobe = 0, reenter = 0;
1013         kprobe_opcode_t *addr = NULL, *ssaddr = 0;
1014         struct kprobe_ctlblk *kcb;
1015         int i = 0;
1016 #ifdef OVERHEAD_DEBUG
1017         struct timeval swap_tv1;
1018         struct timeval swap_tv2;
1019 #endif
1020 #ifdef SUPRESS_BUG_MESSAGES
1021         int swap_oops_in_progress;
1022 #endif
1023         struct hlist_head *head;
1024         struct hlist_node *node;
1025         struct kprobe *pop, *retVal = NULL;
1026         struct kprobe *kp;
1027
1028 #ifdef SUPRESS_BUG_MESSAGES
1029         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1030         swap_oops_in_progress = oops_in_progress;
1031         oops_in_progress = 1;
1032 #endif
1033 #ifdef OVERHEAD_DEBUG
1034 #define USEC_IN_SEC_NUM                         1000000
1035         do_gettimeofday(&swap_tv1);
1036 #endif
1037         preempt_disable();
1038         addr = (kprobe_opcode_t *) (regs->uregs[15]);
1039         if (user_mode(regs))
1040         {
1041                 head = &kprobe_table[hash_ptr (addr, KPROBE_HASH_BITS)];
1042                 hlist_for_each_entry_rcu (pop, node, head, hlist) {
1043                         /*
1044                          * Searching occurred probe by
1045                          * instruction address and task_struct
1046                          */
1047                         if (pop->addr == addr) {
1048                                 if (pop->tgid == current->tgid) {
1049                                     retVal = pop;
1050                                     break;
1051                                 }
1052                         }
1053                 }
1054         }
1055         if (retVal) {
1056                 if (unlikely(thumb_mode(regs))) {
1057                         if (pop->safe_thumb != -1) {
1058                                 pop->ainsn.insn = pop->ainsn.insn_thumb;
1059                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1060                                         kp->ainsn.insn = pop->ainsn.insn_thumb;
1061                                 }
1062                         }
1063                         else {
1064                                 printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1065                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->opcode, pop->addr);
1066                                 // Test case when we do our actions on already running application
1067                                 arch_disarm_uprobe (pop, current);
1068                                 goto no_kprobe_live;
1069                         }
1070                 }
1071                 else {
1072                         if (pop->safe_arm != -1) {
1073                                 pop->ainsn.insn = pop->ainsn.insn_arm;
1074                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1075                                         kp->ainsn.insn = pop->ainsn.insn_arm;
1076                                 }
1077                         }
1078                         else {
1079                                 printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1080                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->opcode, pop->addr );
1081                                 // Test case when we do our actions on already running application
1082                                 arch_disarm_uprobe (pop, current);
1083                                 goto no_kprobe_live;
1084                         }
1085                 }
1086         }
1087         /* We're in an interrupt, but this is clear and BUG()-safe. */
1088         kcb = get_kprobe_ctlblk ();
1089         if (user_mode (regs))
1090         {
1091                 //DBPRINTF("exception[%lu] from user mode %s/%u addr %p (%lx).", nCount, current->comm, current->pid, addr, regs->uregs[14]);
1092                 pid = current->tgid;
1093         }
1094         /* Check we're not actually recursing */
1095         // TODO: handling of recursion is disabled
1096         if (0 && kprobe_running ())
1097         {
1098                 DBPRINTF ("lock???");
1099                 p = get_kprobe (addr, pid, current);
1100                 if (p)
1101                 {
1102                         if(!pid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)){
1103                                 save_previous_kprobe (kcb, p);
1104                                 kcb->kprobe_status = KPROBE_REENTER;
1105                                 reenter = 1;
1106                         }
1107                         else {
1108                                 /* We have reentered the kprobe_handler(), since
1109                                  * another probe was hit while within the handler.
1110                                  * We here save the original kprobes variables and
1111                                  * just single step on the instruction of the new probe
1112                                  * without calling any user handlers.
1113                                  */
1114                                 if(!p->ainsn.boostable){
1115                                         save_previous_kprobe (kcb, p);
1116                                         set_current_kprobe (p, regs, kcb);
1117                                 }
1118                                 kprobes_inc_nmissed_count (p);
1119                                 prepare_singlestep (p, regs);
1120                                 if(!p->ainsn.boostable)
1121                                         kcb->kprobe_status = KPROBE_REENTER;
1122                                 preempt_enable_no_resched ();
1123 #ifdef OVERHEAD_DEBUG
1124                                 do_gettimeofday(&swap_tv2);
1125                                 swap_sum_hit++;
1126                                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1127                                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1128 #endif
1129 #ifdef SUPRESS_BUG_MESSAGES
1130                                 oops_in_progress = swap_oops_in_progress;
1131 #endif
1132                                 return 0;
1133                         }
1134                 }
1135                 else
1136                 {
1137                         if(pid) { //we can reenter probe upon uretprobe exception
1138                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1139                                 // UNDEF_INSTRUCTION from user space
1140
1141                                 if (!thumb_mode ( regs ))
1142                                         p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1143                                 else
1144                                         p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1145
1146                                 if (p) {
1147                                         save_previous_kprobe (kcb, p);
1148                                         kcb->kprobe_status = KPROBE_REENTER;
1149                                         reenter = 1;
1150                                         retprobe = 1;
1151                                         DBPRINTF ("uretprobe %p\n", addr);
1152                                 }
1153                         }
1154                         if(!p) {
1155                                 p = kprobe_running();
1156                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1157                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1158                                   DBPRINTF("kprobe_running !!! goto ss");
1159                                   goto ss_probe;
1160                                   } */
1161                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1162                                 if(pid)
1163                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1164                                 else
1165                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1166                                 if (addr == ssaddr)
1167                                 {
1168                                         regs->uregs[15] = (unsigned long) (p->addr + 1);
1169                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->uregs[15]);
1170                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1171                                                 restore_previous_kprobe (kcb);
1172                                         }
1173                                         else {
1174                                                 reset_current_kprobe ();
1175                                         }
1176                                 }
1177                                 DBPRINTF ("kprobe_running !!! goto no");
1178                                 ret = 1;
1179                                 /* If it's not ours, can't be delete race, (we hold lock). */
1180                                 DBPRINTF ("no_kprobe");
1181                                 goto no_kprobe;
1182                         }
1183                 }
1184         }
1185         if (!p)
1186         {
1187                 p = get_kprobe (addr, pid, current);
1188         }
1189         if (!p)
1190         {
1191                 if(pid) {
1192                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1193                         // UNDEF_INSTRUCTION from user space
1194
1195                         if (!thumb_mode ( regs ))
1196                                 p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1197                         else
1198                                 p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1199
1200                         if (!p) {
1201                                 /* Not one of ours: let kernel handle it */
1202                                 DBPRINTF ("no_kprobe");
1203                                 goto no_kprobe;
1204                         }
1205                         retprobe = 1;
1206                         DBPRINTF ("uretprobe %p\n", addr);
1207                 }
1208                 else {
1209                         /* Not one of ours: let kernel handle it */
1210                         DBPRINTF ("no_kprobe");
1211                         goto no_kprobe;
1212                 }
1213         }
1214         // restore opcode for thumb app
1215         if (user_mode( regs ) && thumb_mode( regs ))
1216         {
1217                 if (!isThumb2(p->opcode))
1218                 {
1219                         unsigned long tmp = p->opcode >> 16;
1220                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1221                 }else{
1222                         unsigned long tmp = p->opcode;
1223                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr), &tmp, 4);
1224                 }
1225                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1226         }
1227         set_current_kprobe (p, regs, kcb);
1228         if(!reenter)
1229                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1230         if (retprobe)           //(einsn == UNDEF_INSTRUCTION)
1231                 ret = trampoline_probe_handler (p, regs);
1232         else if (p->pre_handler)
1233         {
1234                 ret = p->pre_handler (p, regs);
1235                 if(!p->ainsn.boostable)
1236                         kcb->kprobe_status = KPROBE_HIT_SS;
1237                 else if(p->pre_handler != trampoline_probe_handler) {
1238 #ifdef SUPRESS_BUG_MESSAGES
1239                         preempt_disable();
1240 #endif
1241                         reset_current_kprobe();
1242 #ifdef SUPRESS_BUG_MESSAGES
1243                         preempt_enable_no_resched();
1244 #endif
1245                 }
1246         }
1247         if (ret)
1248         {
1249                 DBPRINTF ("p->pre_handler 1");
1250                 /* handler has already set things up, so skip ss setup */
1251 #ifdef OVERHEAD_DEBUG
1252                 do_gettimeofday(&swap_tv2);
1253                 swap_sum_hit++;
1254                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1255                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1256 #endif
1257 #ifdef SUPRESS_BUG_MESSAGES
1258                 oops_in_progress = swap_oops_in_progress;
1259 #endif
1260                 return 0;
1261         }
1262         DBPRINTF ("p->pre_handler 0");
1263
1264 no_kprobe:
1265         preempt_enable_no_resched ();
1266 #ifdef OVERHEAD_DEBUG
1267         do_gettimeofday(&swap_tv2);
1268         swap_sum_hit++;
1269         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1270                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1271 #endif
1272 #ifdef SUPRESS_BUG_MESSAGES
1273         oops_in_progress = swap_oops_in_progress;
1274 #endif
1275         printk("no_kprobe\n");
1276         return 1;               // return with death
1277 no_kprobe_live:
1278         preempt_enable_no_resched ();
1279 #ifdef OVERHEAD_DEBUG
1280         do_gettimeofday(&swap_tv2);
1281         swap_sum_hit++;
1282         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1283                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1284 #endif
1285 #ifdef SUPRESS_BUG_MESSAGES
1286         oops_in_progress = swap_oops_in_progress;
1287 #endif
1288         printk("no_kprobe live\n");
1289         return 0;               // ok - life is life
1290 }
1291
1292 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1293 {
1294         struct jprobe *jp = container_of (p, struct jprobe, kp);
1295         kprobe_pre_entry_handler_t pre_entry;
1296         entry_point_t entry;
1297
1298 # ifdef REENTER
1299         p = kprobe_running();
1300 # endif
1301
1302         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1303         entry = (entry_point_t) jp->entry;
1304         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1305         //if(!entry)
1306         //      DIE("entry NULL", regs)
1307         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1308
1309         //call handler for all kernel probes and user space ones which belong to current tgid
1310         if (!p->tgid || (p->tgid == current->tgid))
1311         {
1312                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1313                     patch_suspended_all_task_ret_addr(sched_rp);
1314                 }
1315                 if (pre_entry)
1316                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1317                 if (entry){
1318                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1319                 }
1320                 else {
1321                         if (p->tgid)
1322                                 dbi_arch_uprobe_return ();
1323                         else
1324                                 dbi_jprobe_return ();
1325                 }
1326         }
1327         else if (p->tgid)
1328                 dbi_arch_uprobe_return ();
1329
1330         prepare_singlestep (p, regs);
1331
1332         return 1;
1333 }
1334
1335 void dbi_jprobe_return (void)
1336 {
1337         preempt_enable_no_resched();
1338 }
1339
1340 void dbi_arch_uprobe_return (void)
1341 {
1342         preempt_enable_no_resched();
1343 }
1344
1345 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1346 {
1347 # ifndef REENTER
1348         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1349         kprobe_opcode_t insns[2];
1350
1351         if (p->pid)
1352         {
1353                 insns[0] = BREAKPOINT_INSTRUCTION;
1354                 insns[1] = p->opcode;
1355                 //p->opcode = *p->addr;
1356                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1357                 {
1358                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1359                         return -1;
1360                 }
1361                 //*p->addr = BREAKPOINT_INSTRUCTION;
1362                 //*(p->addr+1) = p->opcode;
1363                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1364                 {
1365                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1366                         return -1;
1367                 }
1368         }
1369         else
1370         {
1371                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1372                 *(p->addr + 1) = p->opcode;
1373                 p->opcode = *p->addr;
1374                 *p->addr = BREAKPOINT_INSTRUCTION;
1375
1376                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1377         }
1378
1379         reset_current_kprobe ();
1380
1381 #endif //REENTER
1382
1383         return 0;
1384 }
1385
1386
1387 void arch_arm_kprobe (struct kprobe *p)
1388 {
1389         *p->addr = BREAKPOINT_INSTRUCTION;
1390         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1391 }
1392
1393 void arch_disarm_kprobe (struct kprobe *p)
1394 {
1395         *p->addr = p->opcode;
1396         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1397 }
1398
1399
1400 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1401 {
1402         struct kretprobe_instance *ri = NULL;
1403         struct hlist_head *head, empty_rp;
1404         struct hlist_node *node, *tmp;
1405         unsigned long flags, orig_ret_address = 0;
1406         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1407
1408         struct kretprobe *crp = NULL;
1409         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1410
1411         DBPRINTF ("start");
1412
1413         if (p && p->tgid){
1414                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1415                 if (!thumb_mode( regs ))
1416                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1417                 else
1418                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1419         }
1420
1421         INIT_HLIST_HEAD (&empty_rp);
1422         spin_lock_irqsave (&kretprobe_lock, flags);
1423
1424         /*
1425          * We are using different hash keys (current and mm) for finding kernel
1426          * space and user space probes.  Kernel space probes can change mm field in
1427          * task_struct.  User space probes can be shared between threads of one
1428          * process so they have different current but same mm.
1429          */
1430         if (p && p->tgid) {
1431                 head = kretprobe_inst_table_head(current->mm);
1432         } else {
1433                 head = kretprobe_inst_table_head(current);
1434         }
1435
1436         /*
1437          * It is possible to have multiple instances associated with a given
1438          * task either because an multiple functions in the call path
1439          * have a return probe installed on them, and/or more then one
1440          * return probe was registered for a target function.
1441          *
1442          * We can handle this because:
1443          *     - instances are always inserted at the head of the list
1444          *     - when multiple return probes are registered for the same
1445          *       function, the first instance's ret_addr will point to the
1446          *       real return address, and all the rest will point to
1447          *       kretprobe_trampoline
1448          */
1449         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1450         {
1451                 if (ri->task != current)
1452                         /* another task is sharing our hash bucket */
1453                         continue;
1454                 if (ri->rp && ri->rp->handler){
1455                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1456                 }
1457
1458                 orig_ret_address = (unsigned long) ri->ret_addr;
1459                 recycle_rp_inst (ri);
1460                 if (orig_ret_address != trampoline_address)
1461                         /*
1462                          * This is the real return address. Any other
1463                          * instances associated with this task are for
1464                          * other calls deeper on the call stack
1465                          */
1466                         break;
1467         }
1468         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1469         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1470         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1471         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1472         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1473         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1474         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1475         //}
1476         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1477                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1478
1479         regs->uregs[14] = orig_ret_address;
1480         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1481         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1482
1483         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1484         {
1485                 regs->uregs[15] = orig_ret_address;
1486         }else{
1487                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1488                 else regs->uregs[15] += 2;
1489         }
1490
1491         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1492
1493         if(p){ // ARM, MIPS, X86 user space
1494                 if (kcb->kprobe_status == KPROBE_REENTER)
1495                         restore_previous_kprobe (kcb);
1496                 else
1497                         reset_current_kprobe ();
1498
1499                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1500                 {
1501                         regs->ARM_cpsr &= 0xFFFFFFDF;
1502                 }else{
1503                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1504                         {
1505                                 regs->ARM_cpsr |= 0x20;
1506                         }
1507                 }
1508
1509                 //TODO: test - enter function, delete us retprobe, exit function
1510                 // for user space retprobes only - deferred deletion
1511
1512                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1513                 {
1514                         // if we are not at the end of the list and current retprobe should be disarmed
1515                         if (node && ri->rp2)
1516                         {
1517                                 struct hlist_node *current_node = node;
1518                                 crp = ri->rp2;
1519                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1520                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1521                                   DIE(die_msg, regs); */
1522                                 // look for other instances for the same retprobe
1523                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1524                                 {
1525                                         /*
1526                                          * Trying to find another retprobe instance associated with
1527                                          * the same retprobe.
1528                                          */
1529                                         if (ri->rp2 == crp && node != current_node)
1530                                                 break;
1531                                 }
1532
1533                                 if (!node)
1534                                 {       // if there are no more instances for this retprobe
1535                                         // delete retprobe
1536                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1537                                         /*
1538                                           If there is no any retprobe instances of this retprobe
1539                                           we can free the resources related to the probe.
1540                                          */
1541                                         struct kprobe *is_p = &crp->kp;
1542                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1543                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1544                                         }
1545                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1546                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1547                                         }
1548                                         unregister_uprobe (&crp->kp, current, 1);
1549                                         kfree (crp);
1550                                 }
1551                                 hlist_del(current_node);
1552                         }
1553                 }
1554         }
1555
1556         hlist_for_each_entry_safe (ri, node, tmp, &empty_rp, hlist)
1557         {
1558                 hlist_del (&ri->hlist);
1559                 kfree (ri);
1560         }
1561         spin_unlock_irqrestore (&kretprobe_lock, flags);
1562
1563         preempt_enable_no_resched ();
1564         /*
1565          * By returning a non-zero value, we are telling
1566          * kprobe_handler() that we don't want the post_handler
1567          * to run (and have re-enabled preemption)
1568          */
1569
1570         return 1;
1571 }
1572
1573 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1574 {
1575         struct kretprobe_instance *ri;
1576
1577         DBPRINTF ("start\n");
1578         //TODO: test - remove retprobe after func entry but before its exit
1579         if ((ri = get_free_rp_inst (rp)) != NULL)
1580         {
1581                 ri->rp = rp;
1582                 ri->rp2 = NULL;
1583                 ri->task = current;
1584                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1585
1586                 if (rp->kp.tgid)
1587                         if (!thumb_mode( regs ))
1588                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1589                         else
1590                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1591
1592                 else    /* Replace the return addr with trampoline addr */
1593                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1594
1595 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1596                 add_rp_inst (ri);
1597         }
1598         else {
1599                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1600                 rp->nmissed++;
1601         }
1602 }
1603
1604
1605 int asm_init_module_dependencies()
1606 {
1607         //No module dependencies
1608         return 0;
1609 }
1610
1611 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38)
1612 typedef unsigned long (* in_gate_area_fp_t)(unsigned long);
1613 in_gate_area_fp_t in_gate_area_fp;
1614 #endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38) */
1615
1616 void (* do_kpro)(struct undef_hook *);
1617 void (* undo_kpro)(struct undef_hook *);
1618
1619 // kernel probes hook
1620 struct undef_hook undef_ho_k = {
1621     .instr_mask = 0xffffffff,
1622     .instr_val  = BREAKPOINT_INSTRUCTION,
1623     .cpsr_mask  = MODE_MASK,
1624     .cpsr_val   = SVC_MODE,
1625     .fn         = kprobe_handler,
1626 };
1627
1628 // userspace probes hook (arm)
1629 struct undef_hook undef_ho_u = {
1630     .instr_mask = 0xffffffff,
1631     .instr_val  = BREAKPOINT_INSTRUCTION,
1632     .cpsr_mask  = MODE_MASK,
1633     .cpsr_val   = USR_MODE,
1634     .fn         = kprobe_handler,
1635 };
1636
1637 // userspace probes hook (thumb)
1638 struct undef_hook undef_ho_u_t = {
1639     .instr_mask = 0xffffffff,
1640     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1641     .cpsr_mask  = MODE_MASK,
1642     .cpsr_val   = USR_MODE,
1643     .fn         = kprobe_handler,
1644 };
1645
1646 int __init arch_init_kprobes (void)
1647 {
1648         unsigned int do_bp_handler = 0;
1649         int ret = 0;
1650
1651         if (arch_init_module_dependencies())
1652         {
1653                 DBPRINTF ("Unable to init module dependencies\n");
1654                 return -1;
1655         }
1656
1657 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38)
1658         in_gate_area_fp = (in_gate_area_fp_t)kallsyms_search("in_gate_area_no_mm");
1659         if (!in_gate_area_fp) {
1660                 DBPRINTF("no in_gate_area symbol found!");
1661                 return -1;
1662         }
1663 #endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38) */
1664
1665         do_bp_handler = (unsigned int) kallsyms_search ("do_undefinstr");
1666         if (do_bp_handler == 0) {
1667                 DBPRINTF("no do_undefinstr symbol found!");
1668                 return -1;
1669         }
1670         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1671         // Register hooks (kprobe_handler)
1672         do_kpro = kallsyms_search ("register_undef_hook");
1673         if (do_kpro == 0) {
1674                 printk("no register_undef_hook symbol found!\n");
1675                 return -1;
1676         }
1677         do_kpro(&undef_ho_k);
1678         do_kpro(&undef_ho_u);
1679         do_kpro(&undef_ho_u_t);
1680         if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1681                 //dbi_unregister_jprobe(&do_exit_p, 0);
1682                 return ret;
1683         }
1684         return ret;
1685 }
1686
1687 void __exit dbi_arch_exit_kprobes (void)
1688 {
1689         // Unregister hooks (kprobe_handler)
1690         undo_kpro = kallsyms_search ("unregister_undef_hook");
1691         if (undo_kpro == 0) {
1692                 printk("no unregister_undef_hook symbol found!\n");
1693                 return -1;
1694         }
1695         undo_kpro(&undef_ho_u_t);
1696         undo_kpro(&undef_ho_u);
1697         undo_kpro(&undef_ho_k);
1698 }
1699
1700 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1701 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);