kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  26  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  28  *              kprobe_handler() now called via undefined instruction hooks
  29  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/mm.h>
  34
  35 #include "dbi_kprobes.h"
  36 #include "../dbi_kprobes.h"
  37 #include "../../dbi_kprobes.h"
  38
  39 #include "../../dbi_kdebug.h"
  40 #include "../../dbi_insn_slots.h"
  41 #include "../../dbi_kprobes_deps.h"
  42 #include <ksyms.h>
  43
  44 #include <asm/cacheflush.h>
  45
  46 #ifdef TRAP_OVERHEAD_DEBUG
  47 #include <linux/pid.h>
  48 #include <linux/signal.h>
  49 #endif
  50
  51 #ifdef OVERHEAD_DEBUG
  52 #include <linux/time.h>
  53 #endif
  54
  55 #include <asm/traps.h>
  56 #include <asm/ptrace.h>
  57 #include <linux/list.h>
  58 #include <linux/hash.h>
  59
  60 #define SUPRESS_BUG_MESSAGES
  61
  62 extern struct kprobe * per_cpu__current_kprobe;
  63 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  64
  65 #ifdef OVERHEAD_DEBUG
  66 unsigned long swap_sum_time = 0;
  67 unsigned long swap_sum_hit = 0;
  68 EXPORT_SYMBOL_GPL (swap_sum_time);
  69 EXPORT_SYMBOL_GPL (swap_sum_hit);
  70 #endif
  71
  72 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
  73 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
  74
  75 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t *addr)
  76 {
  77         // real position less then PC by 8
  78         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
  79 }
  80
  81 static unsigned int arr_traps_template[] = {
  82                 0xe1a0c00d,    // mov          ip, sp
  83                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
  84                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
  85                 0x00000000,    // b
  86                 0xe3500000,    // cmp          r0, #0  ; 0x0
  87                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
  88                 0x00000000,    // nop
  89                 0xffffffff     // end
  90 };
  91
  92
  93 static struct kprobe trampoline_p =
  94 {
  95         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
  96         .pre_handler = trampoline_probe_handler
  97 };
  98
  99 // is instruction Thumb2 and NOT a branch, etc...
 100 static int isThumb2(kprobe_opcode_t insn)
 101 {
 102         if((    (insn & 0xf800) == 0xe800 ||
 103                 (insn & 0xf800) == 0xf000 ||
 104                 (insn & 0xf800) == 0xf800)) return 1;
 105         return 0;
 106 }
 107
 108
 109 static int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 110 {
 111         int i;
 112
 113         if (uregs & 0x10)
 114         {
 115                 int reg_mask = 0x1;
 116                 //search in reg list
 117                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 118                 {
 119                         if (!(insn & reg_mask))
 120                                 break;
 121                 }
 122         }
 123         else
 124         {
 125                 for (i = 0; i < 13; i++)
 126                 {
 127                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 128                                 continue;
 129                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 130                                 continue;
 131                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 132                                 continue;
 133                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 134                                 continue;
 135                         break;
 136                 }
 137         }
 138         if (i == 13)
 139         {
 140                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 141                 return -EINVAL;
 142         }
 143         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 144
 145         // set register to save
 146         ARM_INSN_REG_SET_RD (insns[0], i);
 147         // set register to load address to
 148         ARM_INSN_REG_SET_RD (insns[1], i);
 149         // set instruction to execute and patch it
 150         if (uregs & 0x10)
 151         {
 152                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 153                 ARM_INSN_REG_SET_MR (insn, i);
 154         }
 155         else
 156         {
 157                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 158                         ARM_INSN_REG_SET_RN (insn, i);
 159                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 160                         ARM_INSN_REG_SET_RD (insn, i);
 161                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 162                         ARM_INSN_REG_SET_RS (insn, i);
 163                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 164                         ARM_INSN_REG_SET_RM (insn, i);
 165         }
 166         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 167         // set register to restore
 168         ARM_INSN_REG_SET_RD (insns[3], i);
 169         return 0;
 170 }
 171
 172
 173
 174 static int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 175 {
 176         unsigned char mreg = 0;
 177         unsigned char reg = 0;
 178
 179
 180         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 181         {
 182                 reg = ((insn & 0xffff) & uregs) >> 8;
 183         }else{
 184                 if (THUMB_INSN_MATCH (MOV3, insn))
 185                 {
 186                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 187                                 reg = (insn & 0xffff) & uregs;
 188                         else
 189                                 return 0;
 190                 }else{
 191                         if (THUMB2_INSN_MATCH (ADR, insn))
 192                         {
 193                                 reg = ((insn >> 16) & uregs) >> 8;
 194                                 if (reg == 15) return 0;
 195                         }else{
 196                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 197                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 198                                     THUMB2_INSN_MATCH (LDRWL, insn))
 199                                 {
 200                                         reg = ((insn >> 16) & uregs) >> 12;
 201                                         if (reg == 15) return 0;
 202                                 }else{
 203 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 204                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 205                                         {
 206                                                 reg = ((insn >> 16) & uregs) >> 12;
 207                                         }else{
 208                                                 if (THUMB2_INSN_MATCH (DP, insn))
 209                                                 {
 210                                                         reg = ((insn >> 16) & uregs) >> 12;
 211                                                         if (reg == 15) return 0;
 212                                                 }else{
 213                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 214                                                         {
 215                                                                 reg = ((insn >> 12) & uregs) >> 8;
 216                                                                 if (reg == 15) return 0;
 217                                                         }else{
 218                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 219                                                                 {
 220                                                                         reg = ((insn >> 12) & uregs) >> 8;
 221                                                                         if (reg == 15) return 0;
 222                                                                 }else{
 223                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 224                                                                         {
 225                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 226                                                                                 if (reg == 15) return 0;
 227                                                                         }else{
 228                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 229                                                                                 {
 230                                                                                         reg = 15;
 231                                                                                 }else{
 232                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 233                                                                                         {
 234                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 235                                                                                         }
 236                                                                                 }
 237                                                                         }
 238                                                                 }
 239                                                         }
 240                                                 }
 241                                         }
 242                                 }
 243                         }
 244                 }
 245         }
 246
 247         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 248                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 249                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 250         {
 251                 reg = THUMB2_INSN_REG_RT(insn);
 252         }
 253
 254         if (reg == 6 || reg == 7)
 255         {
 256                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 257                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 258                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 259                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 260                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 261                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 262                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 263                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 264         }
 265
 266
 267         if (THUMB_INSN_MATCH (APC, insn))
 268         {
 269 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 270                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 271         }else{
 272                 if (THUMB_INSN_MATCH (LRO3, insn))
 273                 {
 274 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 275                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 276                 }else{
 277                         if (THUMB_INSN_MATCH (MOV3, insn))
 278                         {
 279 //                              MOV Rd, PC -> MOV Rd, SP
 280                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 281                         }else{
 282                                 if (THUMB2_INSN_MATCH (ADR, insn))
 283                                 {
 284 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 285                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 286                                 }else{
 287                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 288                                             THUMB2_INSN_MATCH (LDRHW, insn))
 289                                         {
 290 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 291 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 292 //                                              !!! imm_12 vs. imm_8 !!!
 293 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 294                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 295                                         }else{
 296                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 297                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 298                                                     THUMB2_INSN_MATCH (LDREX, insn))
 299                                                 {
 300 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 301                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 302                                                 }else{
 303                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 304                                                         {
 305                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 306                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 307                                                                 {
 308                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 309                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 310                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 311                                                                         {
 312 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 313                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 314                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 315                                                                                 {
 316                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 317                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 318                                                                                         {
 319                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 320                                                                                                 {
 321                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 322                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 323                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 324                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 325                                                                                                 {
 326                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 327                                                                                                 }
 328                                                                                         }
 329                                                                                 }
 330                                                                         }
 331                                                                 }
 332                                                         }
 333                                                 }
 334                                         }
 335                                 }
 336                         }
 337                 }
 338         }
 339
 340         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 341         {
 342                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 343         }else{
 344                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 345                 {
 346                         if (THUMB2_INSN_REG_RN(insn) == 15)
 347                         {
 348                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 349                         }else{
 350                                 insns[2] = insn;
 351                         }
 352                 }else{
 353                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 354                         {
 355                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 356                                 {
 357                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 358                                 }else{
 359                                         insns[2] = insn;
 360                                 }
 361                         }
 362                 }
 363         }
 364
 365 //       STRx PC, xxx
 366         if ((reg == 15) && (THUMB2_INSN_MATCH (STRW, insn)   || \
 367                             THUMB2_INSN_MATCH (STRBW, insn)  || \
 368                             THUMB2_INSN_MATCH (STRD, insn)   || \
 369                             THUMB2_INSN_MATCH (STRHT, insn)  || \
 370                             THUMB2_INSN_MATCH (STRT, insn)   || \
 371                             THUMB2_INSN_MATCH (STRHW1, insn) || \
 372                             THUMB2_INSN_MATCH (STRHW, insn) ))
 373         {
 374                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 375         }
 376
 377
 378
 379         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 380         {
 381                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 382         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 383                 {
 384                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 385                         {
 386                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 387                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 388                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 389                 }
 390         }
 391
 392         return 0;
 393 }
 394
 395
 396
 397 static int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 398 {
 399         int ret = 0;
 400
 401         // check instructions that can change PC by nature
 402         if (
 403 //              ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 404                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 405                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 406                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 407                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 408                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 409                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 410                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 411                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 412         {
 413                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 414                 ret = -EFAULT;
 415         }
 416 #ifndef CONFIG_CPU_V7
 417         // check instructions that can write result to PC
 418         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 419                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 420                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 421                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 422                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 423                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 424         {
 425                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 426                 ret = -EFAULT;
 427         }
 428 #endif // CONFIG_CPU_V7
 429         // check special instruction loads store multiple registers
 430         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 431                         // store pc or load to pc
 432                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 433                          // store/load with pc update
 434                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 435         {
 436                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 437                 ret = -EFAULT;
 438         }
 439         return ret;
 440 }
 441
 442 static int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 443 {
 444         int ret = 0;
 445
 446         // check instructions that can change PC
 447         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 448                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 449                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 450                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
 451                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 452                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 453                 THUMB_INSN_MATCH (CBZ, ainsn->insn_thumb[0]) ||
 454                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 455                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 456                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
 457                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
 458                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
 459                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 460                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 461                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 462                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 463                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 464                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 465                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 466                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 467                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 468                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 469                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 470                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 471                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 472                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 473                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 474                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 475                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 476 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 477                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 478                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 479                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 480                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 481                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 482                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 483                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 484                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 485 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 486                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 487         {
 488                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 489                 ret = -EFAULT;
 490         }
 491
 492         return ret;
 493 }
 494
 495 int arch_prepare_kretprobe (struct kretprobe *p)
 496 {
 497         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 498         return 0;
 499 }
 500
 501 int arch_prepare_kprobe (struct kprobe *p)
 502 {
 503         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 504         int uregs, pc_dep, ret = 0;
 505     kprobe_opcode_t insn[MAX_INSN_SIZE];
 506     struct arch_specific_insn ainsn;
 507
 508     /* insn: must be on special executable page on i386. */
 509     p->ainsn.insn = get_insn_slot (NULL, 0);
 510     if (!p->ainsn.insn)
 511         return -ENOMEM;
 512
 513     memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 514     ainsn.insn_arm = ainsn.insn = insn;
 515     ret = arch_check_insn_arm (&ainsn);
 516     if (!ret)
 517     {
 518         p->opcode = *p->addr;
 519         uregs = pc_dep = 0;
 520
 521         // Rn, Rm ,Rd
 522         if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 523            ARM_INSN_MATCH (SRO, insn[0]))
 524         {
 525             uregs = 0xb;
 526             if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 527                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
 528             {
 529                 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 530                 pc_dep = 1;
 531             }
 532         }
 533         // Rn ,Rd
 534         else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 535                 ARM_INSN_MATCH (SIO, insn[0]))
 536         {
 537             uregs = 0x3;
 538             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 539                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 540             {
 541                 pc_dep = 1;
 542                 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 543             }
 544         }
 545         // Rn, Rm, Rs
 546         else if(ARM_INSN_MATCH (DPRS, insn[0]))
 547         {
 548             uregs = 0xd;
 549             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 550                 (ARM_INSN_REG_RS (insn[0]) == 15))
 551             {
 552                 pc_dep = 1;
 553                 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 554             }
 555         }
 556         // register list
 557         else if(ARM_INSN_MATCH (SM, insn[0]))
 558         {
 559             uregs = 0x10;
 560             if (ARM_INSN_REG_MR (insn[0], 15))
 561             {
 562                 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 563                 pc_dep = 1;
 564             }
 565         }
 566         // check instructions that can write result to SP andu uses PC
 567         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 568         {
 569             free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 570             ret = -EFAULT;
 571         }
 572         else
 573         {
 574             if (uregs && pc_dep)
 575             {
 576                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 577                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 578                 {
 579                     DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 580                     free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 581                     return -EINVAL;
 582                 }
 583                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 584             }
 585             else
 586             {
 587                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 588                 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 589             }
 590             insns[7] = (kprobe_opcode_t) (p->addr + 1);
 591             DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 592             DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 593                     p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 594                     insns[5], insns[6], insns[7], insns[8]);
 595             memcpy (p->ainsn.insn, insns, sizeof(insns));
 596             flush_icache_range((long unsigned)p->ainsn.insn, (long unsigned)(p->ainsn.insn) + sizeof(insns));
 597 #ifdef BOARD_tegra
 598             flush_cache_all();
 599 #endif
 600         }
 601     }
 602     else
 603     {
 604         free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 605         printk("arch_prepare_kprobe: instruction 0x%lx not instrumentation, addr=0x%p\n", insn[0], p->addr);
 606     }
 607
 608     return ret;
 609 }
 610
 611 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 612 {
 613         kprobe_opcode_t insn;
 614         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 615
 616         insn = bpi >> 2;
 617         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 618         if (abs (insn & 0xffffff) > 0xffffff)
 619         {
 620                 DBPRINTF ("ERROR: kprobe address out of range\n");
 621                 BUG ();
 622         }
 623         insn = insn & 0xffffff;
 624         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 625         DBPRINTF ("insn=%lX\n", insn);
 626         return (unsigned int) insn;
 627 }
 628
 629
 630 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 631 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 632
 633 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 634 {
 635         int ret = 0;
 636         kprobe_opcode_t insn[MAX_INSN_SIZE];
 637
 638         if ((unsigned long) p->addr & 0x01)
 639         {
 640                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 641                 return -EINVAL;
 642         }
 643         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 644                 panic ("Failed to read memory task[tgid=%u, comm=%s] %p!\n", task->tgid, task->comm, p->addr);
 645         p->opcode = insn[0];
 646         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 647         if (!p->ainsn.insn_arm) {
 648                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 649                 return -ENOMEM;
 650         }
 651         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 652         if (ret) {
 653                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 654                 return -EFAULT;
 655         }
 656         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 657         if (!p->ainsn.insn_thumb) {
 658                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 659                 return -ENOMEM;
 660         }
 661         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 662         if (ret) {
 663                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 664                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 665                 return -EFAULT;
 666         }
 667         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
 668                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both) [tgid=%u, addr=%lx, data=%lx]\n",
 669                                 __FILE__, __LINE__, task->tgid, (unsigned long)p->addr, (unsigned long)p->opcode);
 670                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
 671                         panic ("Failed to write memory %p!\n", p->addr);
 672                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 673                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 674                 return -EFAULT;
 675         }
 676         return ret;
 677 }
 678 EXPORT_SYMBOL_GPL(arch_prepare_uprobe);
 679
 680 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 681 {
 682         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
 683         return 0;
 684 }
 685 EXPORT_SYMBOL_GPL(arch_prepare_uretprobe);
 686
 687 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 688 {
 689         if (p->ss_addr) {
 690                 regs->ARM_pc = (unsigned long)p->ss_addr;
 691                 p->ss_addr = NULL;
 692         } else {
 693                 regs->ARM_pc = (unsigned long)p->ainsn.insn;
 694         }
 695 }
 696
 697 void save_previous_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p_run)
 698 {
 699         if (p_run == NULL) {
 700                 panic("arm_save_previous_kprobe: p_run == NULL\n");
 701         }
 702
 703         if (kcb->prev_kprobe.kp != NULL) {
 704                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 705         }
 706
 707         kcb->prev_kprobe.kp = p_run;
 708         kcb->prev_kprobe.status = kcb->kprobe_status;
 709 }
 710
 711 void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 712 {
 713         set_current_kprobe(kcb->prev_kprobe.kp, NULL, NULL);
 714         kcb->kprobe_status = kcb->prev_kprobe.status;
 715         kcb->prev_kprobe.kp = NULL;
 716         kcb->prev_kprobe.status = 0;
 717 }
 718
 719 void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 720 {
 721         __get_cpu_var(current_kprobe) = p;
 722         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 723 }
 724
 725 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 726 {
 727         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 728         int uregs, pc_dep;
 729         kprobe_opcode_t insn[MAX_INSN_SIZE];
 730         struct arch_specific_insn ainsn;
 731
 732         p->safe_arm = -1;
 733         if ((unsigned long) p->addr & 0x01)
 734         {
 735                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 736                 return -EINVAL;
 737         }
 738         insn[0] = p->opcode;
 739         ainsn.insn_arm = insn;
 740         if (!arch_check_insn_arm(&ainsn))
 741         {
 742                 p->safe_arm = 0;
 743         }
 744         uregs = pc_dep = 0;
 745         // Rn, Rm ,Rd
 746         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 747                         ARM_INSN_MATCH (SRO, insn[0]))
 748         {
 749                 uregs = 0xb;
 750                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 751                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 752                 {
 753                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 754                         pc_dep = 1;
 755                 }
 756         }
 757         // Rn ,Rd
 758         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 759                         ARM_INSN_MATCH (SIO, insn[0]))
 760         {
 761                 uregs = 0x3;
 762                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 763                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 764                 {
 765                         pc_dep = 1;
 766                         DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 767                 }
 768         }
 769         // Rn, Rm, Rs
 770         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 771         {
 772                 uregs = 0xd;
 773                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 774                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 775                 {
 776                         pc_dep = 1;
 777                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 778                 }
 779         }
 780         // register list
 781         else if (ARM_INSN_MATCH (SM, insn[0]))
 782         {
 783                 uregs = 0x10;
 784                 if (ARM_INSN_REG_MR (insn[0], 15))
 785                 {
 786                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 787                         pc_dep = 1;
 788                 }
 789         }
 790         // check instructions that can write result to SP andu uses PC
 791         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 792         {
 793                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 794                 p->safe_arm = -1;
 795                 // TODO: move free to later phase
 796                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 797                 //ret = -EFAULT;
 798         }
 799         if (unlikely(uregs && pc_dep))
 800         {
 801                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 802                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 803                 {
 804                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 805                                 __FILE__, __LINE__, insn[0]);
 806                         p->safe_arm = -1;
 807                         // TODO: move free to later phase
 808                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 809                         //return -EINVAL;
 810                 }
 811                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 812                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 813         }
 814         else
 815         {
 816                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 817                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 818         }
 819         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 820         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 821
 822         // B
 823         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
 824         {
 825                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 826                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 827                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 828                 insns[7] = get_addr_b(p->opcode, p->addr);
 829         }
 830
 831         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 832                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 833                         insns[5], insns[6], insns[7], insns[8]);
 834         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 835         {
 836                 panic("failed to write memory %p!\n", p->ainsn.insn);
 837                 // Mr_Nobody: we have to panic, really??...
 838                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 839                 //return -EINVAL;
 840         }
 841         return 0;
 842 }
 843
 844 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 845 {
 846         int uregs, pc_dep;
 847         unsigned int addr;
 848         kprobe_opcode_t insn[MAX_INSN_SIZE];
 849         struct arch_specific_insn ainsn;
 850         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 851
 852         p->safe_thumb = -1;
 853         if ((unsigned long) p->addr & 0x01)
 854         {
 855                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 856                 return -EINVAL;
 857         }
 858         insn[0] = p->opcode;
 859         ainsn.insn_thumb = insn;
 860         if (!arch_check_insn_thumb(&ainsn))
 861         {
 862                 p->safe_thumb = 0;
 863         }
 864         uregs = 0;
 865         pc_dep = 0;
 866         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 867         {
 868                 uregs = 0x0700;         // 8-10
 869                 pc_dep = 1;
 870         }
 871         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 872         {
 873                 // MOV Rd, PC
 874                 uregs = 0x07;
 875                 pc_dep = 1;
 876         }
 877         else if THUMB2_INSN_MATCH (ADR, insn[0])
 878         {
 879                 uregs = 0x0f00;         // Rd 8-11
 880                 pc_dep = 1;
 881         }
 882         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 883                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 884                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 885                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 886                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 887                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 888                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 889                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 890                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 891                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 892         {
 893                 uregs = 0xf000;         // Rt 12-15
 894                 pc_dep = 1;
 895         }
 896         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 897         {
 898                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 899                 pc_dep = 1;
 900         }
 901         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 902         {
 903                 uregs = 0xf;
 904                 pc_dep = 1;
 905         }
 906         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 907         {
 908                 uregs = 0xf000; // Rd 12-15
 909                 pc_dep = 1;
 910         }
 911         else if (THUMB2_INSN_MATCH(STRD, insn[0]) && ((THUMB2_INSN_REG_RN(insn[0]) == 15) || (THUMB2_INSN_REG_RT(insn[0]) == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 912         {
 913                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 914                 pc_dep = 1;
 915         }
 916         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 917         {
 918                 uregs = 0x0f00; // Rd 8-11
 919                 pc_dep = 1;
 920         }
 921         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 922         {
 923                 uregs = 0x0f00;
 924                 pc_dep = 1;
 925         }
 926         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 927         {
 928                 uregs = 0x0f00; // Rd 8-11
 929                 pc_dep = 1;
 930         }
 931         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 932         {
 933                 uregs = 0x0f00; // Rd 8-11
 934                 pc_dep = 1;
 935         }
 936         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 937         {
 938                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 939                 pc_dep = 1;
 940         }
 941         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 942                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 943         {
 944                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 945                 pc_dep = 1;
 946         }
 947         if (unlikely(uregs && pc_dep))
 948         {
 949                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 950                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 951                 {
 952                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 953                                 __FILE__, __LINE__, insn[0]);
 954                         p->safe_thumb = -1;
 955                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 956                         //return -EINVAL;
 957                 }
 958                 addr = ((unsigned int)p->addr) + 4;
 959                 *((unsigned short*)insns + 13) = 0xdeff;
 960                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 961                 *((unsigned short*)insns + 15) = addr >> 16;
 962                 if (!isThumb2(insn[0]))
 963                 {
 964                         addr = ((unsigned int)p->addr) + 2;
 965                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 966                         *((unsigned short*)insns + 17) = addr >> 16;
 967                 }
 968                 else {
 969                         addr = ((unsigned int)p->addr) + 4;
 970                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 971                         *((unsigned short*)insns + 17) = addr >> 16;
 972                 }
 973         }
 974         else {
 975                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
 976                 *((unsigned short*)insns + 13) = 0xdeff;
 977                 if (!isThumb2(insn[0]))
 978                 {
 979                         addr = ((unsigned int)p->addr) + 2;
 980                         *((unsigned short*)insns + 2) = insn[0];
 981                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 982                         *((unsigned short*)insns + 17) = addr >> 16;
 983                 }
 984                 else {
 985                         addr = ((unsigned int)p->addr) + 4;
 986                         insns[1] = insn[0];
 987                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 988                         *((unsigned short*)insns + 17) = addr >> 16;
 989                 }
 990         }
 991         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
 992         {
 993                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
 994                 // Mr_Nobody: we have to panic, really??...
 995                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 996                 //return -EINVAL;
 997         }
 998         return 0;
 999 }
1000
1001 static int check_validity_insn(struct kprobe *p, struct pt_regs *regs, struct task_struct *task)
1002 {
1003         struct kprobe *kp;
1004
1005         if (unlikely(thumb_mode(regs))) {
1006                 if (p->safe_thumb != -1) {
1007                         p->ainsn.insn = p->ainsn.insn_thumb;
1008                         list_for_each_entry_rcu(kp, &p->list, list) {
1009                                 kp->ainsn.insn = p->ainsn.insn_thumb;
1010                         }
1011                 } else {
1012                         printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1013                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1014                         // Test case when we do our actions on already running application
1015                         arch_disarm_uprobe(p, task);
1016                         return -1;
1017                 }
1018         } else {
1019                 if (p->safe_arm != -1) {
1020                         p->ainsn.insn = p->ainsn.insn_arm;
1021                         list_for_each_entry_rcu(kp, &p->list, list) {
1022                                 kp->ainsn.insn = p->ainsn.insn_arm;
1023                         }
1024                 } else {
1025                         printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1026                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1027                         // Test case when we do our actions on already running application
1028                         arch_disarm_uprobe(p, task);
1029                         return -1;
1030                 }
1031         }
1032
1033         return 0;
1034 }
1035
1036 static int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
1037 {
1038         int ret;
1039         unsigned long flags;
1040         local_irq_save(flags);
1041         ret = kprobe_handler(regs);
1042         local_irq_restore(flags);
1043         return ret;
1044 }
1045
1046 #ifdef TRAP_OVERHEAD_DEBUG
1047 static unsigned long trap_handler_counter_debug = 0;
1048 #define SAMPLING_COUNTER                               100000
1049 #endif
1050
1051 int kprobe_handler(struct pt_regs *regs)
1052 {
1053         int err_out = 0;
1054         char *msg_out = NULL;
1055         unsigned long user_m = user_mode(regs);
1056         pid_t tgid = (user_m) ? current->tgid : 0;
1057         kprobe_opcode_t *addr = (kprobe_opcode_t *) (regs->ARM_pc);
1058
1059         struct kprobe *p = NULL, *p_run = NULL;
1060         int ret = 0, retprobe = 0, reenter = 0;
1061         kprobe_opcode_t *ssaddr = NULL;
1062         struct kprobe_ctlblk *kcb;
1063
1064 #ifdef SUPRESS_BUG_MESSAGES
1065         int swap_oops_in_progress;
1066         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1067         swap_oops_in_progress = oops_in_progress;
1068         oops_in_progress = 1;
1069 #endif
1070 #ifdef TRAP_OVERHEAD_DEBUG
1071         trap_handler_counter_debug++;
1072         if ( trap_handler_counter_debug < SAMPLING_COUNTER ) {
1073                 err_out = 0;
1074         }
1075         else {
1076                 // XXX NOTE - user must care about catching signal via signal handler to avoid hanging!
1077                 printk("Trap %ld reached - send SIGUSR1\n", trap_handler_counter_debug);
1078                 kill_pid(get_task_pid(current, PIDTYPE_PID), SIGUSR1, 1);
1079                 trap_handler_counter_debug = 0;
1080                 err_out = 0;
1081         }
1082         return err_out;
1083 #endif
1084 #ifdef OVERHEAD_DEBUG
1085         struct timeval swap_tv1;
1086         struct timeval swap_tv2;
1087 #define USEC_IN_SEC_NUM                         1000000
1088         do_gettimeofday(&swap_tv1);
1089 #endif
1090         preempt_disable();
1091
1092 //      printk("### kprobe_handler: task[tgid=%u (%s)] addr=%p\n", tgid, current->comm, addr);
1093         p = get_kprobe(addr, tgid);
1094
1095         if (user_m && p && (check_validity_insn(p, regs, current) != 0)) {
1096                 goto no_kprobe_live;
1097         }
1098
1099         /* We're in an interrupt, but this is clear and BUG()-safe. */
1100         kcb = get_kprobe_ctlblk ();
1101
1102         /* Check we're not actually recursing */
1103         // TODO: event is not saving in trace
1104         p_run = kprobe_running();
1105         if (p_run)
1106         {
1107                 DBPRINTF("lock???");
1108                 if (p)
1109                 {
1110                         if (!tgid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)) {
1111                                 save_previous_kprobe(kcb, p_run);
1112                                 kcb->kprobe_status = KPROBE_REENTER;
1113                                 reenter = 1;
1114                         } else {
1115                                 /* We have reentered the kprobe_handler(), since
1116                                  * another probe was hit while within the handler.
1117                                  * We here save the original kprobes variables and
1118                                  * just single step on the instruction of the new probe
1119                                  * without calling any user handlers.
1120                                  */
1121                                 kprobes_inc_nmissed_count (p);
1122                                 prepare_singlestep (p, regs);
1123
1124                                 err_out = 0;
1125                                 goto out;
1126                         }
1127                 } else {
1128                         if(tgid) { //we can reenter probe upon uretprobe exception
1129                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1130                                 // UNDEF_INSTRUCTION from user space
1131
1132                                 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1133                                 if (p) {
1134                                         save_previous_kprobe(kcb, p_run);
1135                                         kcb->kprobe_status = KPROBE_REENTER;
1136                                         reenter = 1;
1137                                         retprobe = 1;
1138                                         DBPRINTF ("uretprobe %p\n", addr);
1139                                 }
1140                         }
1141                         if(!p) {
1142                                 p = p_run;
1143                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1144                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1145                                   DBPRINTF("kprobe_running !!! goto ss");
1146                                   goto ss_probe;
1147                                   } */
1148                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1149                                 if (tgid)
1150                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1151                                 else
1152                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1153                                 if (addr == ssaddr) {
1154                                         regs->ARM_pc = (unsigned long) (p->addr + 1);
1155                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->ARM_pc);
1156                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1157                                                 restore_previous_kprobe(kcb);
1158                                         } else {
1159                                                 reset_current_kprobe();
1160                                         }
1161                                 }
1162                                 DBPRINTF ("kprobe_running !!! goto no");
1163                                 ret = 1;
1164                                 /* If it's not ours, can't be delete race, (we hold lock). */
1165                                 DBPRINTF ("no_kprobe");
1166                                 goto no_kprobe;
1167                         }
1168                 }
1169         }
1170
1171         if (!p) {
1172                 if (tgid) {
1173                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1174                         // UNDEF_INSTRUCTION from user space
1175
1176                         p = get_kprobe_by_insn_slot(addr, tgid, regs);
1177                         if (!p) {
1178                                 /* Not one of ours: let kernel handle it */
1179                                 DBPRINTF ("no_kprobe");
1180                                 goto no_kprobe;
1181                         }
1182                         retprobe = 1;
1183                         DBPRINTF ("uretprobe %p\n", addr);
1184                 } else {
1185                         /* Not one of ours: let kernel handle it */
1186                         DBPRINTF ("no_kprobe");
1187                         goto no_kprobe;
1188                 }
1189         }
1190         // restore opcode for thumb app
1191         if (user_mode( regs ) && thumb_mode( regs )) {
1192                 if (!isThumb2(p->opcode)) {
1193                         unsigned long tmp = p->opcode >> 16;
1194                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1195
1196                         // "2*sizeof(kprobe_opcode_t)" - strange. Should be "sizeof(kprobe_opcode_t)", need to test
1197                         flush_icache_range((unsigned int) p->addr, ((unsigned int)p->addr) + (2 * sizeof(kprobe_opcode_t)));
1198                 }
1199         }
1200         set_current_kprobe(p, NULL, NULL);
1201         if(!reenter)
1202                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1203         if (retprobe) {         //(einsn == UNDEF_INSTRUCTION)
1204                 ret = trampoline_probe_handler (p, regs);
1205         } else if (p->pre_handler) {
1206                 ret = p->pre_handler (p, regs);
1207                 if(p->pre_handler != trampoline_probe_handler) {
1208                         reset_current_kprobe();
1209                 }
1210         }
1211
1212         if (ret) {
1213                 /* handler has already set things up, so skip ss setup */
1214                 err_out = 0;
1215                 goto out;
1216         }
1217
1218 no_kprobe:
1219         msg_out = "no_kprobe\n";
1220         err_out = 1;            // return with death
1221         goto out;
1222
1223 no_kprobe_live:
1224         msg_out = "no_kprobe live\n";
1225         err_out = 0;            // ok - life is life
1226         goto out;
1227
1228 out:
1229         preempt_enable_no_resched();
1230 #ifdef OVERHEAD_DEBUG
1231         do_gettimeofday(&swap_tv2);
1232         swap_sum_hit++;
1233         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1234                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1235 #endif
1236 #ifdef SUPRESS_BUG_MESSAGES
1237         oops_in_progress = swap_oops_in_progress;
1238 #endif
1239
1240         if(msg_out) {
1241                 printk(msg_out);
1242         }
1243
1244         return err_out;
1245 }
1246
1247 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1248 {
1249         struct jprobe *jp = container_of (p, struct jprobe, kp);
1250         kprobe_pre_entry_handler_t pre_entry;
1251         entry_point_t entry;
1252
1253 # ifdef REENTER
1254 //      p = kprobe_running(regs);
1255 # endif
1256
1257         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1258         entry = (entry_point_t) jp->entry;
1259         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1260         //if(!entry)
1261         //      DIE("entry NULL", regs)
1262         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1263
1264         //call handler for all kernel probes and user space ones which belong to current tgid
1265         if (!p->tgid || (p->tgid == current->tgid))
1266         {
1267                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1268                         struct thread_info *tinfo = (struct thread_info *)regs->ARM_r2;
1269                         patch_suspended_task(sched_rp, tinfo->task);
1270                 }
1271                 if (pre_entry)
1272                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1273                 if (entry){
1274                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1275                 }
1276                 else {
1277                         if (p->tgid)
1278                                 dbi_arch_uprobe_return ();
1279                         else
1280                                 dbi_jprobe_return ();
1281                 }
1282         }
1283         else if (p->tgid)
1284                 dbi_arch_uprobe_return ();
1285
1286         prepare_singlestep (p, regs);
1287
1288         return 1;
1289 }
1290 EXPORT_SYMBOL_GPL(setjmp_pre_handler);
1291
1292 void dbi_jprobe_return (void)
1293 {
1294 }
1295
1296 void dbi_arch_uprobe_return (void)
1297 {
1298 }
1299 EXPORT_SYMBOL_GPL(dbi_arch_uprobe_return);
1300
1301 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1302 {
1303 # ifndef REENTER
1304         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1305         kprobe_opcode_t insns[2];
1306
1307         if (p->pid)
1308         {
1309                 insns[0] = BREAKPOINT_INSTRUCTION;
1310                 insns[1] = p->opcode;
1311                 //p->opcode = *p->addr;
1312                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1313                 {
1314                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1315                         return -1;
1316                 }
1317                 //*p->addr = BREAKPOINT_INSTRUCTION;
1318                 //*(p->addr+1) = p->opcode;
1319                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1320                 {
1321                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1322                         return -1;
1323                 }
1324         }
1325         else
1326         {
1327                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1328                 *(p->addr + 1) = p->opcode;
1329                 p->opcode = *p->addr;
1330                 *p->addr = BREAKPOINT_INSTRUCTION;
1331
1332                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1333         }
1334
1335         reset_current_kprobe();
1336
1337 #endif //REENTER
1338
1339         return 0;
1340 }
1341 EXPORT_SYMBOL_GPL(longjmp_break_handler);
1342
1343 void arch_arm_kprobe (struct kprobe *p)
1344 {
1345         *p->addr = BREAKPOINT_INSTRUCTION;
1346         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1347 }
1348
1349 void arch_disarm_kprobe (struct kprobe *p)
1350 {
1351         *p->addr = p->opcode;
1352         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1353 }
1354
1355
1356 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1357 {
1358         struct kretprobe_instance *ri = NULL;
1359         struct hlist_head *head;
1360         struct hlist_node *node, *tmp;
1361         unsigned long flags, orig_ret_address = 0;
1362         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1363
1364         struct kretprobe *crp = NULL;
1365         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1366
1367         DBPRINTF ("start");
1368
1369         if (p && p->tgid){
1370                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1371                 if (!thumb_mode( regs ))
1372                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1373                 else
1374                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1375         }
1376
1377         spin_lock_irqsave (&kretprobe_lock, flags);
1378
1379         /*
1380          * We are using different hash keys (current and mm) for finding kernel
1381          * space and user space probes.  Kernel space probes can change mm field in
1382          * task_struct.  User space probes can be shared between threads of one
1383          * process so they have different current but same mm.
1384          */
1385         if (p && p->tgid) {
1386                 head = kretprobe_inst_table_head(current->mm);
1387         } else {
1388                 head = kretprobe_inst_table_head(current);
1389         }
1390
1391         /*
1392          * It is possible to have multiple instances associated with a given
1393          * task either because an multiple functions in the call path
1394          * have a return probe installed on them, and/or more then one
1395          * return probe was registered for a target function.
1396          *
1397          * We can handle this because:
1398          *     - instances are always inserted at the head of the list
1399          *     - when multiple return probes are registered for the same
1400          *       function, the first instance's ret_addr will point to the
1401          *       real return address, and all the rest will point to
1402          *       kretprobe_trampoline
1403          */
1404         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1405         {
1406                 if (ri->task != current)
1407                         /* another task is sharing our hash bucket */
1408                         continue;
1409                 if (ri->rp && ri->rp->handler){
1410                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1411                 }
1412
1413                 orig_ret_address = (unsigned long) ri->ret_addr;
1414                 recycle_rp_inst (ri);
1415                 if (orig_ret_address != trampoline_address)
1416                         /*
1417                          * This is the real return address. Any other
1418                          * instances associated with this task are for
1419                          * other calls deeper on the call stack
1420                          */
1421                         break;
1422         }
1423         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1424         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1425         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1426         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1427         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1428         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1429         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1430         //}
1431         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1432                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1433
1434         regs->uregs[14] = orig_ret_address;
1435         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1436         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1437
1438         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1439         {
1440                 regs->uregs[15] = orig_ret_address;
1441         }else{
1442                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1443                 else regs->uregs[15] += 2;
1444         }
1445
1446         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1447
1448         if(p){ // ARM, MIPS, X86 user space
1449                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1450                 {
1451                         regs->ARM_cpsr &= 0xFFFFFFDF;
1452                 }else{
1453                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1454                         {
1455                                 regs->ARM_cpsr |= 0x20;
1456                         }
1457                 }
1458
1459                 //TODO: test - enter function, delete us retprobe, exit function
1460                 // for user space retprobes only - deferred deletion
1461
1462                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1463                 {
1464                         // if we are not at the end of the list and current retprobe should be disarmed
1465                         if (node && ri->rp2)
1466                         {
1467                                 struct hlist_node *current_node = node;
1468                                 crp = ri->rp2;
1469                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1470                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1471                                   DIE(die_msg, regs); */
1472                                 // look for other instances for the same retprobe
1473                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1474                                 {
1475                                         /*
1476                                          * Trying to find another retprobe instance associated with
1477                                          * the same retprobe.
1478                                          */
1479                                         if (ri->rp2 == crp && node != current_node)
1480                                                 break;
1481                                 }
1482
1483                                 if (!node)
1484                                 {
1485                                         // if there are no more instances for this retprobe
1486                                         // delete retprobe
1487                                         struct kprobe *is_p = &crp->kp;
1488                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1489                                         /*
1490                                           If there is no any retprobe instances of this retprobe
1491                                           we can free the resources related to the probe.
1492                                          */
1493                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1494                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1495                                         }
1496                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1497                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1498                                         }
1499
1500                                         dbi_unregister_kprobe(&crp->kp, current);
1501                                         kfree (crp);
1502                                 }
1503                                 hlist_del(current_node);
1504                         }
1505                 }
1506
1507                 if (kcb->kprobe_status == KPROBE_REENTER) {
1508                         restore_previous_kprobe(kcb);
1509                 } else {
1510                         reset_current_kprobe();
1511                 }
1512         }
1513
1514         spin_unlock_irqrestore (&kretprobe_lock, flags);
1515
1516         /*
1517          * By returning a non-zero value, we are telling
1518          * kprobe_handler() that we don't want the post_handler
1519          * to run (and have re-enabled preemption)
1520          */
1521
1522         return 1;
1523 }
1524
1525 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1526 {
1527         struct kretprobe_instance *ri;
1528
1529         DBPRINTF ("start\n");
1530         //TODO: test - remove retprobe after func entry but before its exit
1531         if ((ri = get_free_rp_inst (rp)) != NULL)
1532         {
1533                 ri->rp = rp;
1534                 ri->rp2 = NULL;
1535                 ri->task = current;
1536                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1537                 ri->sp = (kprobe_opcode_t *)regs->ARM_sp; //uregs[13];
1538
1539                 if (rp->kp.tgid)
1540                         if (!thumb_mode( regs ))
1541                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1542                         else
1543                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1544
1545                 else    /* Replace the return addr with trampoline addr */
1546                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1547
1548 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1549                 add_rp_inst (ri);
1550         }
1551         else {
1552                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1553                 rp->nmissed++;
1554         }
1555 }
1556
1557
1558 int asm_init_module_dependencies(void)
1559 {
1560         //No module dependencies
1561         return 0;
1562 }
1563
1564 typedef void (* kpro_type)(struct undef_hook *);
1565 static kpro_type do_kpro;
1566 static kpro_type undo_kpro;
1567
1568 // kernel probes hook
1569 static struct undef_hook undef_ho_k = {
1570     .instr_mask = 0xffffffff,
1571     .instr_val  = BREAKPOINT_INSTRUCTION,
1572     .cpsr_mask  = MODE_MASK,
1573     .cpsr_val   = SVC_MODE,
1574     .fn         = kprobe_trap_handler
1575 };
1576
1577 // userspace probes hook (arm)
1578 static struct undef_hook undef_ho_u = {
1579     .instr_mask = 0xffffffff,
1580     .instr_val  = BREAKPOINT_INSTRUCTION,
1581     .cpsr_mask  = MODE_MASK,
1582     .cpsr_val   = USR_MODE,
1583     .fn         = kprobe_trap_handler
1584 };
1585
1586 // userspace probes hook (thumb)
1587 static struct undef_hook undef_ho_u_t = {
1588     .instr_mask = 0xffffffff,
1589     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1590     .cpsr_mask  = MODE_MASK,
1591     .cpsr_val   = USR_MODE,
1592     .fn         = kprobe_trap_handler
1593 };
1594
1595 int __init arch_init_kprobes (void)
1596 {
1597         unsigned int do_bp_handler = 0;
1598         int ret = 0;
1599
1600         if (arch_init_module_dependencies())
1601         {
1602                 DBPRINTF ("Unable to init module dependencies\n");
1603                 return -1;
1604         }
1605
1606         do_bp_handler = swap_ksyms("do_undefinstr");
1607         if (do_bp_handler == 0) {
1608                 DBPRINTF("no do_undefinstr symbol found!");
1609                 return -1;
1610         }
1611         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1612         // Register hooks (kprobe_handler)
1613         do_kpro = (kpro_type)swap_ksyms("register_undef_hook");
1614         if (do_kpro == NULL) {
1615                 printk("no register_undef_hook symbol found!\n");
1616                 return -1;
1617         }
1618
1619         // Unregister hooks (kprobe_handler)
1620         undo_kpro = (kpro_type)swap_ksyms("unregister_undef_hook");
1621         if (undo_kpro == NULL) {
1622                 printk("no unregister_undef_hook symbol found!\n");
1623                 return -1;
1624         }
1625
1626         do_kpro(&undef_ho_k);
1627         do_kpro(&undef_ho_u);
1628         do_kpro(&undef_ho_u_t);
1629         if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1630                 //dbi_unregister_jprobe(&do_exit_p, 0);
1631                 return ret;
1632         }
1633         return ret;
1634 }
1635
1636 void __exit dbi_arch_exit_kprobes (void)
1637 {
1638         undo_kpro(&undef_ho_u_t);
1639         undo_kpro(&undef_ho_u);
1640         undo_kpro(&undef_ho_k);
1641 }
1642
1643 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1644 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);