kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  26  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  28  *              kprobe_handler() now called via undefined instruction hooks
  29  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/mm.h>
  34
  35 #include "dbi_kprobes.h"
  36 #include "../dbi_kprobes.h"
  37 #include "../../dbi_kprobes.h"
  38
  39 #include "../../dbi_kdebug.h"
  40 #include "../../dbi_insn_slots.h"
  41 #include "../../dbi_kprobes_deps.h"
  42 #include "../../dbi_uprobes.h"
  43 #include <ksyms.h>
  44
  45 #include <asm/cacheflush.h>
  46
  47 #ifdef OVERHEAD_DEBUG
  48 #include <linux/time.h>
  49 #endif
  50
  51 #include <asm/traps.h>
  52 #include <asm/ptrace.h>
  53 #include <linux/list.h>
  54 #include <linux/hash.h>
  55
  56 #define SUPRESS_BUG_MESSAGES
  57
  58 extern struct kprobe * per_cpu__current_kprobe;
  59 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  60
  61 #ifdef OVERHEAD_DEBUG
  62 unsigned long swap_sum_time = 0;
  63 unsigned long swap_sum_hit = 0;
  64 EXPORT_SYMBOL_GPL (swap_sum_time);
  65 EXPORT_SYMBOL_GPL (swap_sum_hit);
  66 #endif
  67
  68 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
  69 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
  70
  71 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t *addr)
  72 {
  73         // real position less then PC by 8
  74         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
  75 }
  76
  77 static unsigned int arr_traps_template[] = {
  78                 0xe1a0c00d,    // mov          ip, sp
  79                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
  80                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
  81                 0x00000000,    // b
  82                 0xe3500000,    // cmp          r0, #0  ; 0x0
  83                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
  84                 0x00000000,    // nop
  85                 0xffffffff     // end
  86 };
  87
  88
  89 static struct kprobe trampoline_p =
  90 {
  91         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
  92         .pre_handler = trampoline_probe_handler
  93 };
  94
  95 // is instruction Thumb2 and NOT a branch, etc...
  96 static int isThumb2(kprobe_opcode_t insn)
  97 {
  98         if((    (insn & 0xf800) == 0xe800 ||
  99                 (insn & 0xf800) == 0xf000 ||
 100                 (insn & 0xf800) == 0xf800)) return 1;
 101         return 0;
 102 }
 103
 104
 105 static int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 106 {
 107         int i;
 108
 109         if (uregs & 0x10)
 110         {
 111                 int reg_mask = 0x1;
 112                 //search in reg list
 113                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 114                 {
 115                         if (!(insn & reg_mask))
 116                                 break;
 117                 }
 118         }
 119         else
 120         {
 121                 for (i = 0; i < 13; i++)
 122                 {
 123                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 124                                 continue;
 125                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 126                                 continue;
 127                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 128                                 continue;
 129                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 130                                 continue;
 131                         break;
 132                 }
 133         }
 134         if (i == 13)
 135         {
 136                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 137                 return -EINVAL;
 138         }
 139         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 140
 141         // set register to save
 142         ARM_INSN_REG_SET_RD (insns[0], i);
 143         // set register to load address to
 144         ARM_INSN_REG_SET_RD (insns[1], i);
 145         // set instruction to execute and patch it
 146         if (uregs & 0x10)
 147         {
 148                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 149                 ARM_INSN_REG_SET_MR (insn, i);
 150         }
 151         else
 152         {
 153                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 154                         ARM_INSN_REG_SET_RN (insn, i);
 155                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 156                         ARM_INSN_REG_SET_RD (insn, i);
 157                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 158                         ARM_INSN_REG_SET_RS (insn, i);
 159                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 160                         ARM_INSN_REG_SET_RM (insn, i);
 161         }
 162         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 163         // set register to restore
 164         ARM_INSN_REG_SET_RD (insns[3], i);
 165         return 0;
 166 }
 167
 168
 169
 170 static int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 171 {
 172         unsigned char mreg = 0;
 173         unsigned char reg = 0;
 174
 175
 176         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 177         {
 178                 reg = ((insn & 0xffff) & uregs) >> 8;
 179         }else{
 180                 if (THUMB_INSN_MATCH (MOV3, insn))
 181                 {
 182                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 183                                 reg = (insn & 0xffff) & uregs;
 184                         else
 185                                 return 0;
 186                 }else{
 187                         if (THUMB2_INSN_MATCH (ADR, insn))
 188                         {
 189                                 reg = ((insn >> 16) & uregs) >> 8;
 190                                 if (reg == 15) return 0;
 191                         }else{
 192                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 193                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 194                                     THUMB2_INSN_MATCH (LDRWL, insn))
 195                                 {
 196                                         reg = ((insn >> 16) & uregs) >> 12;
 197                                         if (reg == 15) return 0;
 198                                 }else{
 199 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 200                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 201                                         {
 202                                                 reg = ((insn >> 16) & uregs) >> 12;
 203                                         }else{
 204                                                 if (THUMB2_INSN_MATCH (DP, insn))
 205                                                 {
 206                                                         reg = ((insn >> 16) & uregs) >> 12;
 207                                                         if (reg == 15) return 0;
 208                                                 }else{
 209                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 210                                                         {
 211                                                                 reg = ((insn >> 12) & uregs) >> 8;
 212                                                                 if (reg == 15) return 0;
 213                                                         }else{
 214                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 215                                                                 {
 216                                                                         reg = ((insn >> 12) & uregs) >> 8;
 217                                                                         if (reg == 15) return 0;
 218                                                                 }else{
 219                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 220                                                                         {
 221                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 222                                                                                 if (reg == 15) return 0;
 223                                                                         }else{
 224                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 225                                                                                 {
 226                                                                                         reg = 15;
 227                                                                                 }else{
 228                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 229                                                                                         {
 230                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 231                                                                                         }
 232                                                                                 }
 233                                                                         }
 234                                                                 }
 235                                                         }
 236                                                 }
 237                                         }
 238                                 }
 239                         }
 240                 }
 241         }
 242
 243         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 244                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 245                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 246         {
 247                 reg = THUMB2_INSN_REG_RT(insn);
 248         }
 249
 250         if (reg == 6 || reg == 7)
 251         {
 252                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 253                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 254                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 255                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 256                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 257                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 258                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 259                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 260         }
 261
 262
 263         if (THUMB_INSN_MATCH (APC, insn))
 264         {
 265 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 266                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 267         }else{
 268                 if (THUMB_INSN_MATCH (LRO3, insn))
 269                 {
 270 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 271                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 272                 }else{
 273                         if (THUMB_INSN_MATCH (MOV3, insn))
 274                         {
 275 //                              MOV Rd, PC -> MOV Rd, SP
 276                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 277                         }else{
 278                                 if (THUMB2_INSN_MATCH (ADR, insn))
 279                                 {
 280 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 281                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 282                                 }else{
 283                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 284                                             THUMB2_INSN_MATCH (LDRHW, insn))
 285                                         {
 286 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 287 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 288 //                                              !!! imm_12 vs. imm_8 !!!
 289 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 290                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 291                                         }else{
 292                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 293                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 294                                                     THUMB2_INSN_MATCH (LDREX, insn))
 295                                                 {
 296 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 297                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 298                                                 }else{
 299                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 300                                                         {
 301                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 302                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 303                                                                 {
 304                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 305                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 306                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 307                                                                         {
 308 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 309                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 310                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 311                                                                                 {
 312                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 313                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 314                                                                                         {
 315                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 316                                                                                                 {
 317                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 318                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 319                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 320                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 321                                                                                                 {
 322                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 323                                                                                                 }
 324                                                                                         }
 325                                                                                 }
 326                                                                         }
 327                                                                 }
 328                                                         }
 329                                                 }
 330                                         }
 331                                 }
 332                         }
 333                 }
 334         }
 335
 336         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 337         {
 338                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 339         }else{
 340                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 341                 {
 342                         if (THUMB2_INSN_REG_RN(insn) == 15)
 343                         {
 344                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 345                         }else{
 346                                 insns[2] = insn;
 347                         }
 348                 }else{
 349                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 350                         {
 351                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 352                                 {
 353                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 354                                 }else{
 355                                         insns[2] = insn;
 356                                 }
 357                         }
 358                 }
 359         }
 360
 361 //       STRx PC, xxx
 362         if ((reg == 15) && (THUMB2_INSN_MATCH (STRW, insn)   || \
 363                             THUMB2_INSN_MATCH (STRBW, insn)  || \
 364                             THUMB2_INSN_MATCH (STRD, insn)   || \
 365                             THUMB2_INSN_MATCH (STRHT, insn)  || \
 366                             THUMB2_INSN_MATCH (STRT, insn)   || \
 367                             THUMB2_INSN_MATCH (STRHW1, insn) || \
 368                             THUMB2_INSN_MATCH (STRHW, insn) ))
 369         {
 370                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 371         }
 372
 373
 374
 375         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 376         {
 377                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 378         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 379                 {
 380                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 381                         {
 382                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 383                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 384                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 385                 }
 386         }
 387
 388         return 0;
 389 }
 390
 391
 392
 393 static int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 394 {
 395         int ret = 0;
 396
 397         // check instructions that can change PC by nature
 398         if (
 399 //              ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 400                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 401                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 402                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 403                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 404                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 405                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 406                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 407                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 408         {
 409                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 410                 ret = -EFAULT;
 411         }
 412 #ifndef CONFIG_CPU_V7
 413         // check instructions that can write result to PC
 414         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 415                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 416                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 417                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 418                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 419                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 420         {
 421                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 422                 ret = -EFAULT;
 423         }
 424 #endif // CONFIG_CPU_V7
 425         // check special instruction loads store multiple registers
 426         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 427                         // store pc or load to pc
 428                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 429                          // store/load with pc update
 430                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 431         {
 432                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 433                 ret = -EFAULT;
 434         }
 435         return ret;
 436 }
 437
 438 static int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 439 {
 440         int ret = 0;
 441
 442         // check instructions that can change PC
 443         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 444                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 445                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 446                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
 447                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 448                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 449                 THUMB_INSN_MATCH (CBZ, ainsn->insn_thumb[0]) ||
 450                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 451                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 452                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
 453                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
 454                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
 455                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 456                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 457                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 458                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 459                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 460                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 461                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 462                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 463                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 464                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 465                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 466                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 467                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 468                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 469                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 470                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 471                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 472 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 473                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 474                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 475                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 476                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 477                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 478                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 479                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 480                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 481 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 482                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 483         {
 484                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 485                 ret = -EFAULT;
 486         }
 487
 488         return ret;
 489 }
 490
 491 int arch_prepare_kretprobe (struct kretprobe *p)
 492 {
 493         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 494         return 0;
 495 }
 496
 497 int arch_prepare_kprobe (struct kprobe *p)
 498 {
 499         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 500         int uregs, pc_dep, ret = 0;
 501     kprobe_opcode_t insn[MAX_INSN_SIZE];
 502     struct arch_specific_insn ainsn;
 503
 504     /* insn: must be on special executable page on i386. */
 505     p->ainsn.insn = get_insn_slot (NULL, 0);
 506     if (!p->ainsn.insn)
 507         return -ENOMEM;
 508
 509     memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 510     ainsn.insn_arm = ainsn.insn = insn;
 511     ret = arch_check_insn_arm (&ainsn);
 512     if (!ret)
 513     {
 514         p->opcode = *p->addr;
 515         uregs = pc_dep = 0;
 516
 517         // Rn, Rm ,Rd
 518         if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 519            ARM_INSN_MATCH (SRO, insn[0]))
 520         {
 521             uregs = 0xb;
 522             if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 523                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
 524             {
 525                 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 526                 pc_dep = 1;
 527             }
 528         }
 529         // Rn ,Rd
 530         else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 531                 ARM_INSN_MATCH (SIO, insn[0]))
 532         {
 533             uregs = 0x3;
 534             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 535                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 536             {
 537                 pc_dep = 1;
 538                 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 539             }
 540         }
 541         // Rn, Rm, Rs
 542         else if(ARM_INSN_MATCH (DPRS, insn[0]))
 543         {
 544             uregs = 0xd;
 545             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 546                 (ARM_INSN_REG_RS (insn[0]) == 15))
 547             {
 548                 pc_dep = 1;
 549                 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 550             }
 551         }
 552         // register list
 553         else if(ARM_INSN_MATCH (SM, insn[0]))
 554         {
 555             uregs = 0x10;
 556             if (ARM_INSN_REG_MR (insn[0], 15))
 557             {
 558                 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 559                 pc_dep = 1;
 560             }
 561         }
 562         // check instructions that can write result to SP andu uses PC
 563         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 564         {
 565             free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 566             ret = -EFAULT;
 567         }
 568         else
 569         {
 570             if (uregs && pc_dep)
 571             {
 572                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 573                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 574                 {
 575                     DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 576                     free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 577                     return -EINVAL;
 578                 }
 579                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 580             }
 581             else
 582             {
 583                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 584                 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 585             }
 586             insns[7] = (kprobe_opcode_t) (p->addr + 1);
 587             DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 588             DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 589                     p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 590                     insns[5], insns[6], insns[7], insns[8]);
 591             memcpy (p->ainsn.insn, insns, sizeof(insns));
 592             flush_icache_range((long unsigned)p->ainsn.insn, (long unsigned)(p->ainsn.insn) + sizeof(insns));
 593 #ifdef BOARD_tegra
 594             flush_cache_all();
 595 #endif
 596         }
 597     }
 598     else
 599     {
 600         free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 601         printk("arch_prepare_kprobe: instruction 0x%lx not instrumentation, addr=0x%p\n", insn[0], p->addr);
 602     }
 603
 604     return ret;
 605 }
 606
 607 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 608 {
 609         kprobe_opcode_t insn;
 610         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 611
 612         insn = bpi >> 2;
 613         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 614         if (abs (insn & 0xffffff) > 0xffffff)
 615         {
 616                 DBPRINTF ("ERROR: kprobe address out of range\n");
 617                 BUG ();
 618         }
 619         insn = insn & 0xffffff;
 620         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 621         DBPRINTF ("insn=%lX\n", insn);
 622         return (unsigned int) insn;
 623 }
 624
 625
 626 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 627 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 628
 629 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 630 {
 631         int ret = 0;
 632         kprobe_opcode_t insn[MAX_INSN_SIZE];
 633
 634         if ((unsigned long) p->addr & 0x01)
 635         {
 636                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 637                 return -EINVAL;
 638         }
 639         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 640                 panic ("Failed to read memory task[tgid=%u, comm=%s] %p!\n", task->tgid, task->comm, p->addr);
 641         p->opcode = insn[0];
 642         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 643         if (!p->ainsn.insn_arm) {
 644                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 645                 return -ENOMEM;
 646         }
 647         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 648         if (ret) {
 649                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 650                 return -EFAULT;
 651         }
 652         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 653         if (!p->ainsn.insn_thumb) {
 654                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 655                 return -ENOMEM;
 656         }
 657         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 658         if (ret) {
 659                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 660                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 661                 return -EFAULT;
 662         }
 663         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
 664                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both) [tgid=%u, addr=%lx, data=%lx]\n",
 665                                 __FILE__, __LINE__, task->tgid, (unsigned long)p->addr, (unsigned long)p->opcode);
 666                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
 667                         panic ("Failed to write memory %p!\n", p->addr);
 668                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 669                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 670                 return -EFAULT;
 671         }
 672         return ret;
 673 }
 674
 675 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 676 {
 677         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
 678         return 0;
 679 }
 680
 681 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 682 {
 683         if (p->ss_addr) {
 684                 regs->ARM_pc = (unsigned long)p->ss_addr;
 685                 p->ss_addr = NULL;
 686         } else {
 687                 regs->ARM_pc = (unsigned long)p->ainsn.insn;
 688         }
 689 }
 690
 691 void save_previous_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p_run)
 692 {
 693         if (p_run == NULL) {
 694                 panic("arm_save_previous_kprobe: p_run == NULL\n");
 695         }
 696
 697         if (kcb->prev_kprobe.kp != NULL) {
 698                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 699         }
 700
 701         kcb->prev_kprobe.kp = p_run;
 702         kcb->prev_kprobe.status = kcb->kprobe_status;
 703 }
 704
 705 void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 706 {
 707         set_current_kprobe(kcb->prev_kprobe.kp, NULL, NULL);
 708         kcb->kprobe_status = kcb->prev_kprobe.status;
 709         kcb->prev_kprobe.kp = NULL;
 710         kcb->prev_kprobe.status = 0;
 711 }
 712
 713 void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 714 {
 715         __get_cpu_var(current_kprobe) = p;
 716         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 717 }
 718
 719 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 720 {
 721         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 722         int uregs, pc_dep;
 723         kprobe_opcode_t insn[MAX_INSN_SIZE];
 724         struct arch_specific_insn ainsn;
 725
 726         p->safe_arm = -1;
 727         if ((unsigned long) p->addr & 0x01)
 728         {
 729                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 730                 return -EINVAL;
 731         }
 732         insn[0] = p->opcode;
 733         ainsn.insn_arm = insn;
 734         if (!arch_check_insn_arm(&ainsn))
 735         {
 736                 p->safe_arm = 0;
 737         }
 738         uregs = pc_dep = 0;
 739         // Rn, Rm ,Rd
 740         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 741                         ARM_INSN_MATCH (SRO, insn[0]))
 742         {
 743                 uregs = 0xb;
 744                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 745                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 746                 {
 747                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 748                         pc_dep = 1;
 749                 }
 750         }
 751         // Rn ,Rd
 752         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 753                         ARM_INSN_MATCH (SIO, insn[0]))
 754         {
 755                 uregs = 0x3;
 756                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 757                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 758                 {
 759                         pc_dep = 1;
 760                         DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 761                 }
 762         }
 763         // Rn, Rm, Rs
 764         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 765         {
 766                 uregs = 0xd;
 767                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 768                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 769                 {
 770                         pc_dep = 1;
 771                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 772                 }
 773         }
 774         // register list
 775         else if (ARM_INSN_MATCH (SM, insn[0]))
 776         {
 777                 uregs = 0x10;
 778                 if (ARM_INSN_REG_MR (insn[0], 15))
 779                 {
 780                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 781                         pc_dep = 1;
 782                 }
 783         }
 784         // check instructions that can write result to SP andu uses PC
 785         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 786         {
 787                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 788                 p->safe_arm = -1;
 789                 // TODO: move free to later phase
 790                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 791                 //ret = -EFAULT;
 792         }
 793         if (unlikely(uregs && pc_dep))
 794         {
 795                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 796                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 797                 {
 798                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 799                                 __FILE__, __LINE__, insn[0]);
 800                         p->safe_arm = -1;
 801                         // TODO: move free to later phase
 802                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 803                         //return -EINVAL;
 804                 }
 805                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 806                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 807         }
 808         else
 809         {
 810                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 811                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 812         }
 813         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 814         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 815
 816         // B
 817         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
 818         {
 819                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 820                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 821                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 822                 insns[7] = get_addr_b(p->opcode, p->addr);
 823         }
 824
 825         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 826                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 827                         insns[5], insns[6], insns[7], insns[8]);
 828         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 829         {
 830                 panic("failed to write memory %p!\n", p->ainsn.insn);
 831                 // Mr_Nobody: we have to panic, really??...
 832                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 833                 //return -EINVAL;
 834         }
 835         return 0;
 836 }
 837
 838 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 839 {
 840         int uregs, pc_dep;
 841         unsigned int addr;
 842         kprobe_opcode_t insn[MAX_INSN_SIZE];
 843         struct arch_specific_insn ainsn;
 844         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 845
 846         p->safe_thumb = -1;
 847         if ((unsigned long) p->addr & 0x01)
 848         {
 849                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 850                 return -EINVAL;
 851         }
 852         insn[0] = p->opcode;
 853         ainsn.insn_thumb = insn;
 854         if (!arch_check_insn_thumb(&ainsn))
 855         {
 856                 p->safe_thumb = 0;
 857         }
 858         uregs = 0;
 859         pc_dep = 0;
 860         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 861         {
 862                 uregs = 0x0700;         // 8-10
 863                 pc_dep = 1;
 864         }
 865         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 866         {
 867                 // MOV Rd, PC
 868                 uregs = 0x07;
 869                 pc_dep = 1;
 870         }
 871         else if THUMB2_INSN_MATCH (ADR, insn[0])
 872         {
 873                 uregs = 0x0f00;         // Rd 8-11
 874                 pc_dep = 1;
 875         }
 876         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 877                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 878                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 879                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 880                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 881                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 882                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 883                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 884                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 885                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 886         {
 887                 uregs = 0xf000;         // Rt 12-15
 888                 pc_dep = 1;
 889         }
 890         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 891         {
 892                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 893                 pc_dep = 1;
 894         }
 895         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 896         {
 897                 uregs = 0xf;
 898                 pc_dep = 1;
 899         }
 900         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 901         {
 902                 uregs = 0xf000; // Rd 12-15
 903                 pc_dep = 1;
 904         }
 905         else if (THUMB2_INSN_MATCH(STRD, insn[0]) && ((THUMB2_INSN_REG_RN(insn[0]) == 15) || (THUMB2_INSN_REG_RT(insn[0]) == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 906         {
 907                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 908                 pc_dep = 1;
 909         }
 910         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 911         {
 912                 uregs = 0x0f00; // Rd 8-11
 913                 pc_dep = 1;
 914         }
 915         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 916         {
 917                 uregs = 0x0f00;
 918                 pc_dep = 1;
 919         }
 920         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 921         {
 922                 uregs = 0x0f00; // Rd 8-11
 923                 pc_dep = 1;
 924         }
 925         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 926         {
 927                 uregs = 0x0f00; // Rd 8-11
 928                 pc_dep = 1;
 929         }
 930         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 931         {
 932                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 933                 pc_dep = 1;
 934         }
 935         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 936                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 937         {
 938                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 939                 pc_dep = 1;
 940         }
 941         if (unlikely(uregs && pc_dep))
 942         {
 943                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 944                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 945                 {
 946                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 947                                 __FILE__, __LINE__, insn[0]);
 948                         p->safe_thumb = -1;
 949                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 950                         //return -EINVAL;
 951                 }
 952                 addr = ((unsigned int)p->addr) + 4;
 953                 *((unsigned short*)insns + 13) = 0xdeff;
 954                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 955                 *((unsigned short*)insns + 15) = addr >> 16;
 956                 if (!isThumb2(insn[0]))
 957                 {
 958                         addr = ((unsigned int)p->addr) + 2;
 959                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 960                         *((unsigned short*)insns + 17) = addr >> 16;
 961                 }
 962                 else {
 963                         addr = ((unsigned int)p->addr) + 4;
 964                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 965                         *((unsigned short*)insns + 17) = addr >> 16;
 966                 }
 967         }
 968         else {
 969                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
 970                 *((unsigned short*)insns + 13) = 0xdeff;
 971                 if (!isThumb2(insn[0]))
 972                 {
 973                         addr = ((unsigned int)p->addr) + 2;
 974                         *((unsigned short*)insns + 2) = insn[0];
 975                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 976                         *((unsigned short*)insns + 17) = addr >> 16;
 977                 }
 978                 else {
 979                         addr = ((unsigned int)p->addr) + 4;
 980                         insns[1] = insn[0];
 981                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 982                         *((unsigned short*)insns + 17) = addr >> 16;
 983                 }
 984         }
 985         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
 986         {
 987                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
 988                 // Mr_Nobody: we have to panic, really??...
 989                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 990                 //return -EINVAL;
 991         }
 992         return 0;
 993 }
 994
 995 static int check_validity_insn(struct kprobe *p, struct pt_regs *regs, struct task_struct *task)
 996 {
 997         struct kprobe *kp;
 998
 999         if (unlikely(thumb_mode(regs))) {
1000                 if (p->safe_thumb != -1) {
1001                         p->ainsn.insn = p->ainsn.insn_thumb;
1002                         list_for_each_entry_rcu(kp, &p->list, list) {
1003                                 kp->ainsn.insn = p->ainsn.insn_thumb;
1004                         }
1005                 } else {
1006                         printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1007                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1008                         // Test case when we do our actions on already running application
1009                         arch_disarm_uprobe(p, task);
1010                         return -1;
1011                 }
1012         } else {
1013                 if (p->safe_arm != -1) {
1014                         p->ainsn.insn = p->ainsn.insn_arm;
1015                         list_for_each_entry_rcu(kp, &p->list, list) {
1016                                 kp->ainsn.insn = p->ainsn.insn_arm;
1017                         }
1018                 } else {
1019                         printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1020                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1021                         // Test case when we do our actions on already running application
1022                         arch_disarm_uprobe(p, task);
1023                         return -1;
1024                 }
1025         }
1026
1027         return 0;
1028 }
1029
1030 static int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
1031 {
1032         int ret;
1033         unsigned long flags;
1034         local_irq_save(flags);
1035         ret = kprobe_handler(regs);
1036         local_irq_restore(flags);
1037         return ret;
1038 }
1039
1040 int kprobe_handler(struct pt_regs *regs)
1041 {
1042         int err_out = 0;
1043         char *msg_out = NULL;
1044         unsigned long user_m = user_mode(regs);
1045         pid_t tgid = (user_m) ? current->tgid : 0;
1046         kprobe_opcode_t *addr = (kprobe_opcode_t *) (regs->ARM_pc);
1047
1048         struct kprobe *p = NULL, *p_run = NULL;
1049         int ret = 0, retprobe = 0, reenter = 0;
1050         kprobe_opcode_t *ssaddr = NULL;
1051         struct kprobe_ctlblk *kcb;
1052
1053 #ifdef SUPRESS_BUG_MESSAGES
1054         int swap_oops_in_progress;
1055         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1056         swap_oops_in_progress = oops_in_progress;
1057         oops_in_progress = 1;
1058 #endif
1059 #ifdef OVERHEAD_DEBUG
1060         struct timeval swap_tv1;
1061         struct timeval swap_tv2;
1062 #define USEC_IN_SEC_NUM                         1000000
1063         do_gettimeofday(&swap_tv1);
1064 #endif
1065         preempt_disable();
1066
1067 //      printk("### kprobe_handler: task[tgid=%u (%s)] addr=%p\n", tgid, current->comm, addr);
1068         p = get_kprobe(addr, tgid);
1069
1070         if (user_m && p && (check_validity_insn(p, regs, current) != 0)) {
1071                 goto no_kprobe_live;
1072         }
1073
1074         /* We're in an interrupt, but this is clear and BUG()-safe. */
1075         kcb = get_kprobe_ctlblk ();
1076
1077         /* Check we're not actually recursing */
1078         // TODO: event is not saving in trace
1079         p_run = kprobe_running();
1080         if (p_run)
1081         {
1082                 DBPRINTF("lock???");
1083                 if (p)
1084                 {
1085                         if (!tgid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)) {
1086                                 save_previous_kprobe(kcb, p_run);
1087                                 kcb->kprobe_status = KPROBE_REENTER;
1088                                 reenter = 1;
1089                         } else {
1090                                 /* We have reentered the kprobe_handler(), since
1091                                  * another probe was hit while within the handler.
1092                                  * We here save the original kprobes variables and
1093                                  * just single step on the instruction of the new probe
1094                                  * without calling any user handlers.
1095                                  */
1096                                 kprobes_inc_nmissed_count (p);
1097                                 prepare_singlestep (p, regs);
1098
1099                                 err_out = 0;
1100                                 goto out;
1101                         }
1102                 } else {
1103                         if(tgid) { //we can reenter probe upon uretprobe exception
1104                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1105                                 // UNDEF_INSTRUCTION from user space
1106
1107                                 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1108                                 if (p) {
1109                                         save_previous_kprobe(kcb, p_run);
1110                                         kcb->kprobe_status = KPROBE_REENTER;
1111                                         reenter = 1;
1112                                         retprobe = 1;
1113                                         DBPRINTF ("uretprobe %p\n", addr);
1114                                 }
1115                         }
1116                         if(!p) {
1117                                 p = p_run;
1118                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1119                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1120                                   DBPRINTF("kprobe_running !!! goto ss");
1121                                   goto ss_probe;
1122                                   } */
1123                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1124                                 if (tgid)
1125                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1126                                 else
1127                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1128                                 if (addr == ssaddr) {
1129                                         regs->ARM_pc = (unsigned long) (p->addr + 1);
1130                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->ARM_pc);
1131                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1132                                                 restore_previous_kprobe(kcb);
1133                                         } else {
1134                                                 reset_current_kprobe();
1135                                         }
1136                                 }
1137                                 DBPRINTF ("kprobe_running !!! goto no");
1138                                 ret = 1;
1139                                 /* If it's not ours, can't be delete race, (we hold lock). */
1140                                 DBPRINTF ("no_kprobe");
1141                                 goto no_kprobe;
1142                         }
1143                 }
1144         }
1145
1146         if (!p) {
1147                 if (tgid) {
1148                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1149                         // UNDEF_INSTRUCTION from user space
1150
1151                         p = get_kprobe_by_insn_slot(addr, tgid, regs);
1152                         if (!p) {
1153                                 /* Not one of ours: let kernel handle it */
1154                                 DBPRINTF ("no_kprobe");
1155                                 goto no_kprobe;
1156                         }
1157                         retprobe = 1;
1158                         DBPRINTF ("uretprobe %p\n", addr);
1159                 } else {
1160                         /* Not one of ours: let kernel handle it */
1161                         DBPRINTF ("no_kprobe");
1162                         goto no_kprobe;
1163                 }
1164         }
1165         // restore opcode for thumb app
1166         if (user_mode( regs ) && thumb_mode( regs )) {
1167                 if (!isThumb2(p->opcode)) {
1168                         unsigned long tmp = p->opcode >> 16;
1169                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1170
1171                         // "2*sizeof(kprobe_opcode_t)" - strange. Should be "sizeof(kprobe_opcode_t)", need to test
1172                         flush_icache_range((unsigned int) p->addr, ((unsigned int)p->addr) + (2 * sizeof(kprobe_opcode_t)));
1173                 }
1174         }
1175         set_current_kprobe(p, NULL, NULL);
1176         if(!reenter)
1177                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1178         if (retprobe) {         //(einsn == UNDEF_INSTRUCTION)
1179                 ret = trampoline_probe_handler (p, regs);
1180         } else if (p->pre_handler) {
1181                 ret = p->pre_handler (p, regs);
1182                 if(p->pre_handler != trampoline_probe_handler) {
1183                         reset_current_kprobe();
1184                 }
1185         }
1186
1187         if (ret) {
1188                 /* handler has already set things up, so skip ss setup */
1189                 err_out = 0;
1190                 goto out;
1191         }
1192
1193 no_kprobe:
1194         msg_out = "no_kprobe\n";
1195         err_out = 1;            // return with death
1196         goto out;
1197
1198 no_kprobe_live:
1199         msg_out = "no_kprobe live\n";
1200         err_out = 0;            // ok - life is life
1201         goto out;
1202
1203 out:
1204         preempt_enable_no_resched();
1205 #ifdef OVERHEAD_DEBUG
1206         do_gettimeofday(&swap_tv2);
1207         swap_sum_hit++;
1208         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1209                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1210 #endif
1211 #ifdef SUPRESS_BUG_MESSAGES
1212         oops_in_progress = swap_oops_in_progress;
1213 #endif
1214
1215         if(msg_out) {
1216                 printk(msg_out);
1217         }
1218
1219         return err_out;
1220 }
1221
1222 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1223 {
1224         struct jprobe *jp = container_of (p, struct jprobe, kp);
1225         kprobe_pre_entry_handler_t pre_entry;
1226         entry_point_t entry;
1227
1228 # ifdef REENTER
1229 //      p = kprobe_running(regs);
1230 # endif
1231
1232         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1233         entry = (entry_point_t) jp->entry;
1234         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1235         //if(!entry)
1236         //      DIE("entry NULL", regs)
1237         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1238
1239         //call handler for all kernel probes and user space ones which belong to current tgid
1240         if (!p->tgid || (p->tgid == current->tgid))
1241         {
1242                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1243                     patch_suspended_all_task_ret_addr(sched_rp);
1244                 }
1245                 if (pre_entry)
1246                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1247                 if (entry){
1248                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1249                 }
1250                 else {
1251                         if (p->tgid)
1252                                 dbi_arch_uprobe_return ();
1253                         else
1254                                 dbi_jprobe_return ();
1255                 }
1256         }
1257         else if (p->tgid)
1258                 dbi_arch_uprobe_return ();
1259
1260         prepare_singlestep (p, regs);
1261
1262         return 1;
1263 }
1264
1265 void dbi_jprobe_return (void)
1266 {
1267 }
1268
1269 void dbi_arch_uprobe_return (void)
1270 {
1271 }
1272
1273 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1274 {
1275 # ifndef REENTER
1276         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1277         kprobe_opcode_t insns[2];
1278
1279         if (p->pid)
1280         {
1281                 insns[0] = BREAKPOINT_INSTRUCTION;
1282                 insns[1] = p->opcode;
1283                 //p->opcode = *p->addr;
1284                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1285                 {
1286                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1287                         return -1;
1288                 }
1289                 //*p->addr = BREAKPOINT_INSTRUCTION;
1290                 //*(p->addr+1) = p->opcode;
1291                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1292                 {
1293                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1294                         return -1;
1295                 }
1296         }
1297         else
1298         {
1299                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1300                 *(p->addr + 1) = p->opcode;
1301                 p->opcode = *p->addr;
1302                 *p->addr = BREAKPOINT_INSTRUCTION;
1303
1304                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1305         }
1306
1307         reset_current_kprobe();
1308
1309 #endif //REENTER
1310
1311         return 0;
1312 }
1313
1314
1315 void arch_arm_kprobe (struct kprobe *p)
1316 {
1317         *p->addr = BREAKPOINT_INSTRUCTION;
1318         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1319 }
1320
1321 void arch_disarm_kprobe (struct kprobe *p)
1322 {
1323         *p->addr = p->opcode;
1324         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1325 }
1326
1327
1328 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1329 {
1330         struct kretprobe_instance *ri = NULL;
1331         struct hlist_head *head;
1332         struct hlist_node *node, *tmp;
1333         unsigned long flags, orig_ret_address = 0;
1334         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1335
1336         struct kretprobe *crp = NULL;
1337         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1338
1339         DBPRINTF ("start");
1340
1341         if (p && p->tgid){
1342                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1343                 if (!thumb_mode( regs ))
1344                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1345                 else
1346                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1347         }
1348
1349         spin_lock_irqsave (&kretprobe_lock, flags);
1350
1351         /*
1352          * We are using different hash keys (current and mm) for finding kernel
1353          * space and user space probes.  Kernel space probes can change mm field in
1354          * task_struct.  User space probes can be shared between threads of one
1355          * process so they have different current but same mm.
1356          */
1357         if (p && p->tgid) {
1358                 head = kretprobe_inst_table_head(current->mm);
1359         } else {
1360                 head = kretprobe_inst_table_head(current);
1361         }
1362
1363         /*
1364          * It is possible to have multiple instances associated with a given
1365          * task either because an multiple functions in the call path
1366          * have a return probe installed on them, and/or more then one
1367          * return probe was registered for a target function.
1368          *
1369          * We can handle this because:
1370          *     - instances are always inserted at the head of the list
1371          *     - when multiple return probes are registered for the same
1372          *       function, the first instance's ret_addr will point to the
1373          *       real return address, and all the rest will point to
1374          *       kretprobe_trampoline
1375          */
1376         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1377         {
1378                 if (ri->task != current)
1379                         /* another task is sharing our hash bucket */
1380                         continue;
1381                 if (ri->rp && ri->rp->handler){
1382                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1383                 }
1384
1385                 orig_ret_address = (unsigned long) ri->ret_addr;
1386                 recycle_rp_inst (ri);
1387                 if (orig_ret_address != trampoline_address)
1388                         /*
1389                          * This is the real return address. Any other
1390                          * instances associated with this task are for
1391                          * other calls deeper on the call stack
1392                          */
1393                         break;
1394         }
1395         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1396         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1397         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1398         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1399         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1400         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1401         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1402         //}
1403         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1404                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1405
1406         regs->uregs[14] = orig_ret_address;
1407         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1408         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1409
1410         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1411         {
1412                 regs->uregs[15] = orig_ret_address;
1413         }else{
1414                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1415                 else regs->uregs[15] += 2;
1416         }
1417
1418         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1419
1420         if(p){ // ARM, MIPS, X86 user space
1421                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1422                 {
1423                         regs->ARM_cpsr &= 0xFFFFFFDF;
1424                 }else{
1425                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1426                         {
1427                                 regs->ARM_cpsr |= 0x20;
1428                         }
1429                 }
1430
1431                 //TODO: test - enter function, delete us retprobe, exit function
1432                 // for user space retprobes only - deferred deletion
1433
1434                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1435                 {
1436                         // if we are not at the end of the list and current retprobe should be disarmed
1437                         if (node && ri->rp2)
1438                         {
1439                                 struct hlist_node *current_node = node;
1440                                 crp = ri->rp2;
1441                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1442                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1443                                   DIE(die_msg, regs); */
1444                                 // look for other instances for the same retprobe
1445                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1446                                 {
1447                                         /*
1448                                          * Trying to find another retprobe instance associated with
1449                                          * the same retprobe.
1450                                          */
1451                                         if (ri->rp2 == crp && node != current_node)
1452                                                 break;
1453                                 }
1454
1455                                 if (!node)
1456                                 {
1457                                         // if there are no more instances for this retprobe
1458                                         // delete retprobe
1459                                         struct kprobe *is_p = &crp->kp;
1460                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1461                                         /*
1462                                           If there is no any retprobe instances of this retprobe
1463                                           we can free the resources related to the probe.
1464                                          */
1465                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1466                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1467                                         }
1468                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1469                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1470                                         }
1471                                         unregister_uprobe (&crp->kp, current, 1);
1472                                         kfree (crp);
1473                                 }
1474                                 hlist_del(current_node);
1475                         }
1476                 }
1477
1478                 if (kcb->kprobe_status == KPROBE_REENTER) {
1479                         restore_previous_kprobe(kcb);
1480                 } else {
1481                         reset_current_kprobe();
1482                 }
1483         }
1484
1485         spin_unlock_irqrestore (&kretprobe_lock, flags);
1486
1487         /*
1488          * By returning a non-zero value, we are telling
1489          * kprobe_handler() that we don't want the post_handler
1490          * to run (and have re-enabled preemption)
1491          */
1492
1493         return 1;
1494 }
1495
1496 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1497 {
1498         struct kretprobe_instance *ri;
1499
1500         DBPRINTF ("start\n");
1501         //TODO: test - remove retprobe after func entry but before its exit
1502         if ((ri = get_free_rp_inst (rp)) != NULL)
1503         {
1504                 ri->rp = rp;
1505                 ri->rp2 = NULL;
1506                 ri->task = current;
1507                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1508
1509                 if (rp->kp.tgid)
1510                         if (!thumb_mode( regs ))
1511                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1512                         else
1513                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1514
1515                 else    /* Replace the return addr with trampoline addr */
1516                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1517
1518 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1519                 add_rp_inst (ri);
1520         }
1521         else {
1522                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1523                 rp->nmissed++;
1524         }
1525 }
1526
1527
1528 int asm_init_module_dependencies(void)
1529 {
1530         //No module dependencies
1531         return 0;
1532 }
1533
1534 typedef void (* kpro_type)(struct undef_hook *);
1535 static kpro_type do_kpro;
1536 static kpro_type undo_kpro;
1537
1538 // kernel probes hook
1539 static struct undef_hook undef_ho_k = {
1540     .instr_mask = 0xffffffff,
1541     .instr_val  = BREAKPOINT_INSTRUCTION,
1542     .cpsr_mask  = MODE_MASK,
1543     .cpsr_val   = SVC_MODE,
1544     .fn         = kprobe_trap_handler
1545 };
1546
1547 // userspace probes hook (arm)
1548 static struct undef_hook undef_ho_u = {
1549     .instr_mask = 0xffffffff,
1550     .instr_val  = BREAKPOINT_INSTRUCTION,
1551     .cpsr_mask  = MODE_MASK,
1552     .cpsr_val   = USR_MODE,
1553     .fn         = kprobe_trap_handler
1554 };
1555
1556 // userspace probes hook (thumb)
1557 static struct undef_hook undef_ho_u_t = {
1558     .instr_mask = 0xffffffff,
1559     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1560     .cpsr_mask  = MODE_MASK,
1561     .cpsr_val   = USR_MODE,
1562     .fn         = kprobe_trap_handler
1563 };
1564
1565 int __init arch_init_kprobes (void)
1566 {
1567         unsigned int do_bp_handler = 0;
1568         int ret = 0;
1569
1570         if (arch_init_module_dependencies())
1571         {
1572                 DBPRINTF ("Unable to init module dependencies\n");
1573                 return -1;
1574         }
1575
1576         do_bp_handler = swap_ksyms("do_undefinstr");
1577         if (do_bp_handler == 0) {
1578                 DBPRINTF("no do_undefinstr symbol found!");
1579                 return -1;
1580         }
1581         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1582         // Register hooks (kprobe_handler)
1583         do_kpro = (kpro_type)swap_ksyms("register_undef_hook");
1584         if (do_kpro == NULL) {
1585                 printk("no register_undef_hook symbol found!\n");
1586                 return -1;
1587         }
1588
1589         // Unregister hooks (kprobe_handler)
1590         undo_kpro = (kpro_type)swap_ksyms("unregister_undef_hook");
1591         if (undo_kpro == NULL) {
1592                 printk("no unregister_undef_hook symbol found!\n");
1593                 return -1;
1594         }
1595
1596         do_kpro(&undef_ho_k);
1597         do_kpro(&undef_ho_u);
1598         do_kpro(&undef_ho_u_t);
1599         if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1600                 //dbi_unregister_jprobe(&do_exit_p, 0);
1601                 return ret;
1602         }
1603         return ret;
1604 }
1605
1606 void __exit dbi_arch_exit_kprobes (void)
1607 {
1608         undo_kpro(&undef_ho_u_t);
1609         undo_kpro(&undef_ho_u);
1610         undo_kpro(&undef_ho_k);
1611 }
1612
1613 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1614 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);