kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  26  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  28  *              kprobe_handler() now called via undefined instruction hooks
  29  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/mm.h>
  34
  35 #include "dbi_kprobes.h"
  36 #include "../dbi_kprobes.h"
  37
  38 #include "../../dbi_kdebug.h"
  39 #include "../../dbi_insn_slots.h"
  40 #include "../../dbi_kprobes_deps.h"
  41 #include "../../dbi_uprobes.h"
  42 #include <ksyms.h>
  43
  44 #include <asm/cacheflush.h>
  45
  46 #ifdef OVERHEAD_DEBUG
  47 #include <linux/time.h>
  48 #endif
  49
  50 #include <asm/traps.h>
  51 #include <asm/ptrace.h>
  52 #include <linux/list.h>
  53 #include <linux/hash.h>
  54
  55 #define SUPRESS_BUG_MESSAGES
  56
  57 extern unsigned long sched_addr;
  58 extern unsigned long fork_addr;
  59
  60 extern struct kprobe * per_cpu__current_kprobe;
  61 extern spinlock_t kretprobe_lock;
  62 extern struct kretprobe *sched_rp;
  63
  64 extern struct hlist_head kprobe_insn_pages;
  65 extern struct hlist_head uprobe_insn_pages;
  66
  67 extern struct kprobe *kprobe_running(void);
  68 extern void reset_current_kprobe(void);
  69 extern struct kprobe_ctlblk *get_kprobe_ctlblk(void);
  70 extern struct kprobe * current_kprobe;
  71
  72 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  73
  74 #ifdef OVERHEAD_DEBUG
  75 unsigned long swap_sum_time = 0;
  76 unsigned long swap_sum_hit = 0;
  77 EXPORT_SYMBOL_GPL (swap_sum_time);
  78 EXPORT_SYMBOL_GPL (swap_sum_hit);
  79 #endif
  80
  81 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
  82 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
  83
  84 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t *addr)
  85 {
  86         // real position less then PC by 8
  87         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
  88 }
  89
  90 unsigned int arr_traps_template[] = {
  91                 0xe1a0c00d,    // mov          ip, sp
  92                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
  93                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
  94                 0x00000000,    // b
  95                 0xe3500000,    // cmp          r0, #0  ; 0x0
  96                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
  97                 0x00000000,    // nop
  98                 0xffffffff     // end
  99 };
 100
 101
 102 struct kprobe trampoline_p =
 103 {
 104         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
 105         .pre_handler = trampoline_probe_handler
 106 };
 107
 108 // is instruction Thumb2 and NOT a branch, etc...
 109 int isThumb2(kprobe_opcode_t insn)
 110 {
 111         if((    (insn & 0xf800) == 0xe800 ||
 112                 (insn & 0xf800) == 0xf000 ||
 113                 (insn & 0xf800) == 0xf800)) return 1;
 114         return 0;
 115 }
 116
 117
 118 int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 119 {
 120         int i;
 121
 122         if (uregs & 0x10)
 123         {
 124                 int reg_mask = 0x1;
 125                 //search in reg list
 126                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 127                 {
 128                         if (!(insn & reg_mask))
 129                                 break;
 130                 }
 131         }
 132         else
 133         {
 134                 for (i = 0; i < 13; i++)
 135                 {
 136                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 137                                 continue;
 138                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 139                                 continue;
 140                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 141                                 continue;
 142                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 143                                 continue;
 144                         break;
 145                 }
 146         }
 147         if (i == 13)
 148         {
 149                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 150                 return -EINVAL;
 151         }
 152         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 153
 154         // set register to save
 155         ARM_INSN_REG_SET_RD (insns[0], i);
 156         // set register to load address to
 157         ARM_INSN_REG_SET_RD (insns[1], i);
 158         // set instruction to execute and patch it
 159         if (uregs & 0x10)
 160         {
 161                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 162                 ARM_INSN_REG_SET_MR (insn, i);
 163         }
 164         else
 165         {
 166                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 167                         ARM_INSN_REG_SET_RN (insn, i);
 168                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 169                         ARM_INSN_REG_SET_RD (insn, i);
 170                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 171                         ARM_INSN_REG_SET_RS (insn, i);
 172                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 173                         ARM_INSN_REG_SET_RM (insn, i);
 174         }
 175         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 176         // set register to restore
 177         ARM_INSN_REG_SET_RD (insns[3], i);
 178         return 0;
 179 }
 180
 181
 182
 183 int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 184 {
 185         unsigned char mreg = 0;
 186         unsigned char reg = 0;
 187
 188
 189         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 190         {
 191                 reg = ((insn & 0xffff) & uregs) >> 8;
 192         }else{
 193                 if (THUMB_INSN_MATCH (MOV3, insn))
 194                 {
 195                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 196                                 reg = (insn & 0xffff) & uregs;
 197                         else
 198                                 return 0;
 199                 }else{
 200                         if (THUMB2_INSN_MATCH (ADR, insn))
 201                         {
 202                                 reg = ((insn >> 16) & uregs) >> 8;
 203                                 if (reg == 15) return 0;
 204                         }else{
 205                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 206                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 207                                     THUMB2_INSN_MATCH (LDRWL, insn))
 208                                 {
 209                                         reg = ((insn >> 16) & uregs) >> 12;
 210                                         if (reg == 15) return 0;
 211                                 }else{
 212 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 213                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 214                                         {
 215                                                 reg = ((insn >> 16) & uregs) >> 12;
 216                                         }else{
 217                                                 if (THUMB2_INSN_MATCH (DP, insn))
 218                                                 {
 219                                                         reg = ((insn >> 16) & uregs) >> 12;
 220                                                         if (reg == 15) return 0;
 221                                                 }else{
 222                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 223                                                         {
 224                                                                 reg = ((insn >> 12) & uregs) >> 8;
 225                                                                 if (reg == 15) return 0;
 226                                                         }else{
 227                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 228                                                                 {
 229                                                                         reg = ((insn >> 12) & uregs) >> 8;
 230                                                                         if (reg == 15) return 0;
 231                                                                 }else{
 232                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 233                                                                         {
 234                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 235                                                                                 if (reg == 15) return 0;
 236                                                                         }else{
 237                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 238                                                                                 {
 239                                                                                         reg = 15;
 240                                                                                 }else{
 241                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 242                                                                                         {
 243                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 244                                                                                         }
 245                                                                                 }
 246                                                                         }
 247                                                                 }
 248                                                         }
 249                                                 }
 250                                         }
 251                                 }
 252                         }
 253                 }
 254         }
 255
 256         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 257                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 258                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 259         {
 260                 reg = THUMB2_INSN_REG_RT(insn);
 261         }
 262
 263         if (reg == 6 || reg == 7)
 264         {
 265                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 266                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 267                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 268                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 269                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 270                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 271                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 272                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 273         }
 274
 275
 276         if (THUMB_INSN_MATCH (APC, insn))
 277         {
 278 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 279                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 280         }else{
 281                 if (THUMB_INSN_MATCH (LRO3, insn))
 282                 {
 283 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 284                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 285                 }else{
 286                         if (THUMB_INSN_MATCH (MOV3, insn))
 287                         {
 288 //                              MOV Rd, PC -> MOV Rd, SP
 289                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 290                         }else{
 291                                 if (THUMB2_INSN_MATCH (ADR, insn))
 292                                 {
 293 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 294                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 295                                 }else{
 296                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 297                                             THUMB2_INSN_MATCH (LDRHW, insn))
 298                                         {
 299 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 300 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 301 //                                              !!! imm_12 vs. imm_8 !!!
 302 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 303                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 304                                         }else{
 305                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 306                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 307                                                     THUMB2_INSN_MATCH (LDREX, insn))
 308                                                 {
 309 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 310                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 311                                                 }else{
 312                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 313                                                         {
 314                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 315                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 316                                                                 {
 317                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 318                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 319                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 320                                                                         {
 321 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 322                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 323                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 324                                                                                 {
 325                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 326                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 327                                                                                         {
 328                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 329                                                                                                 {
 330                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 331                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 332                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 333                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 334                                                                                                 {
 335                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 336                                                                                                 }
 337                                                                                         }
 338                                                                                 }
 339                                                                         }
 340                                                                 }
 341                                                         }
 342                                                 }
 343                                         }
 344                                 }
 345                         }
 346                 }
 347         }
 348
 349         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 350         {
 351                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 352         }else{
 353                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 354                 {
 355                         if (THUMB2_INSN_REG_RN(insn) == 15)
 356                         {
 357                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 358                         }else{
 359                                 insns[2] = insn;
 360                         }
 361                 }else{
 362                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 363                         {
 364                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 365                                 {
 366                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 367                                 }else{
 368                                         insns[2] = insn;
 369                                 }
 370                         }
 371                 }
 372         }
 373
 374 //       STRx PC, xxx
 375         if ((reg == 15) && (THUMB2_INSN_MATCH (STRW, insn)   || \
 376                             THUMB2_INSN_MATCH (STRBW, insn)  || \
 377                             THUMB2_INSN_MATCH (STRD, insn)   || \
 378                             THUMB2_INSN_MATCH (STRHT, insn)  || \
 379                             THUMB2_INSN_MATCH (STRT, insn)   || \
 380                             THUMB2_INSN_MATCH (STRHW1, insn) || \
 381                             THUMB2_INSN_MATCH (STRHW, insn) ))
 382         {
 383                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 384         }
 385
 386
 387
 388         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 389         {
 390                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 391         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 392                 {
 393                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 394                         {
 395                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 396                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 397                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 398                 }
 399         }
 400
 401         return 0;
 402 }
 403
 404
 405
 406 int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 407 {
 408         int ret = 0;
 409
 410         // check instructions that can change PC by nature
 411         if (
 412 //              ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 413                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 414                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 415                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 416                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 417                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 418                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 419                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 420                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 421         {
 422                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 423                 ret = -EFAULT;
 424         }
 425 #ifndef CONFIG_CPU_V7
 426         // check instructions that can write result to PC
 427         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 428                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 429                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 430                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 431                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 432                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 433         {
 434                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 435                 ret = -EFAULT;
 436         }
 437 #endif // CONFIG_CPU_V7
 438         // check special instruction loads store multiple registers
 439         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 440                         // store pc or load to pc
 441                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 442                          // store/load with pc update
 443                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 444         {
 445                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 446                 ret = -EFAULT;
 447         }
 448         return ret;
 449 }
 450
 451 int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 452 {
 453         int ret = 0;
 454
 455         // check instructions that can change PC
 456         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 457                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 458                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 459                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
 460                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 461                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 462                 THUMB_INSN_MATCH (CBZ, ainsn->insn_thumb[0]) ||
 463                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 464                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 465                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
 466                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
 467                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
 468                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 469                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 470                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 471                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 472                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 473                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 474                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 475                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 476                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 477                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 478                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 479                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 480                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 481                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 482                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 483                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 484                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 485 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 486                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 487                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 488                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 489                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 490                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 491                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 492                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 493                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 494 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 495                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 496         {
 497                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 498                 ret = -EFAULT;
 499         }
 500
 501         return ret;
 502 }
 503
 504 int arch_prepare_kretprobe (struct kretprobe *p)
 505 {
 506         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 507         return 0;
 508 }
 509
 510 int arch_prepare_kprobe (struct kprobe *p)
 511 {
 512         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 513         int uregs, pc_dep, ret = 0;
 514     kprobe_opcode_t insn[MAX_INSN_SIZE];
 515     struct arch_specific_insn ainsn;
 516
 517     /* insn: must be on special executable page on i386. */
 518     p->ainsn.insn = get_insn_slot (NULL, 0);
 519     if (!p->ainsn.insn)
 520         return -ENOMEM;
 521
 522     memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 523     ainsn.insn_arm = ainsn.insn = insn;
 524     ret = arch_check_insn_arm (&ainsn);
 525     if (!ret)
 526     {
 527         p->opcode = *p->addr;
 528         uregs = pc_dep = 0;
 529
 530         // Rn, Rm ,Rd
 531         if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 532            ARM_INSN_MATCH (SRO, insn[0]))
 533         {
 534             uregs = 0xb;
 535             if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 536                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
 537             {
 538                 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 539                 pc_dep = 1;
 540             }
 541         }
 542         // Rn ,Rd
 543         else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 544                 ARM_INSN_MATCH (SIO, insn[0]))
 545         {
 546             uregs = 0x3;
 547             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 548                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 549             {
 550                 pc_dep = 1;
 551                 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 552             }
 553         }
 554         // Rn, Rm, Rs
 555         else if(ARM_INSN_MATCH (DPRS, insn[0]))
 556         {
 557             uregs = 0xd;
 558             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 559                 (ARM_INSN_REG_RS (insn[0]) == 15))
 560             {
 561                 pc_dep = 1;
 562                 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 563             }
 564         }
 565         // register list
 566         else if(ARM_INSN_MATCH (SM, insn[0]))
 567         {
 568             uregs = 0x10;
 569             if (ARM_INSN_REG_MR (insn[0], 15))
 570             {
 571                 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 572                 pc_dep = 1;
 573             }
 574         }
 575         // check instructions that can write result to SP andu uses PC
 576         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 577         {
 578             free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 579             ret = -EFAULT;
 580         }
 581         else
 582         {
 583             if (uregs && pc_dep)
 584             {
 585                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 586                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 587                 {
 588                     DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 589                     free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 590                     return -EINVAL;
 591                 }
 592                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 593             }
 594             else
 595             {
 596                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 597                 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 598             }
 599             insns[7] = (kprobe_opcode_t) (p->addr + 1);
 600             DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 601             DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 602                     p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 603                     insns[5], insns[6], insns[7], insns[8]);
 604             memcpy (p->ainsn.insn, insns, sizeof(insns));
 605             flush_icache_range((long unsigned)p->ainsn.insn, (long unsigned)(p->ainsn.insn) + sizeof(insns));
 606 #ifdef BOARD_tegra
 607             flush_cache_all();
 608 #endif
 609         }
 610     }
 611     else
 612     {
 613         free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 614         printk("arch_prepare_kprobe: instruction 0x%lx not instrumentation, addr=0x%p\n", insn[0], p->addr);
 615     }
 616
 617     return ret;
 618 }
 619
 620 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 621 {
 622         kprobe_opcode_t insn;
 623         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 624
 625         insn = bpi >> 2;
 626         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 627         if (abs (insn & 0xffffff) > 0xffffff)
 628         {
 629                 DBPRINTF ("ERROR: kprobe address out of range\n");
 630                 BUG ();
 631         }
 632         insn = insn & 0xffffff;
 633         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 634         DBPRINTF ("insn=%lX\n", insn);
 635         return (unsigned int) insn;
 636 }
 637
 638
 639 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 640 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 641
 642 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 643 {
 644         int ret = 0;
 645         kprobe_opcode_t insn[MAX_INSN_SIZE];
 646
 647         if ((unsigned long) p->addr & 0x01)
 648         {
 649                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 650                 return -EINVAL;
 651         }
 652         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 653                 panic ("Failed to read memory %p!\n", p->addr);
 654         p->opcode = insn[0];
 655         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 656         if (!p->ainsn.insn_arm) {
 657                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 658                 return -ENOMEM;
 659         }
 660         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 661         if (ret) {
 662                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 663                 return -EFAULT;
 664         }
 665         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 666         if (!p->ainsn.insn_thumb) {
 667                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 668                 return -ENOMEM;
 669         }
 670         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 671         if (ret) {
 672                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 673                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 674                 return -EFAULT;
 675         }
 676         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
 677                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both) addr=%p, inst=%x\n",
 678                         __FILE__, __LINE__, p->addr, p->opcode);
 679                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
 680                         panic ("Failed to write memory %p!\n", p->addr);
 681                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 682                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 683                 return -EFAULT;
 684         }
 685         return ret;
 686 }
 687
 688 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 689 {
 690         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
 691         return 0;
 692 }
 693
 694 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 695 {
 696         if (p->ss_addr) {
 697                 regs->ARM_pc = (unsigned long)p->ss_addr;
 698                 p->ss_addr = NULL;
 699         } else {
 700                 regs->ARM_pc = (unsigned long)p->ainsn.insn;
 701         }
 702 }
 703
 704 void save_previous_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p_run)
 705 {
 706         if (p_run == NULL) {
 707                 panic("arm_save_previous_kprobe: p_run == NULL\n");
 708         }
 709
 710         if (kcb->prev_kprobe.kp != NULL) {
 711                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 712         }
 713
 714         kcb->prev_kprobe.kp = p_run;
 715         kcb->prev_kprobe.status = kcb->kprobe_status;
 716 }
 717
 718 void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 719 {
 720         set_current_kprobe(kcb->prev_kprobe.kp, NULL, NULL);
 721         kcb->kprobe_status = kcb->prev_kprobe.status;
 722         kcb->prev_kprobe.kp = NULL;
 723         kcb->prev_kprobe.status = 0;
 724 }
 725
 726 void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 727 {
 728         __get_cpu_var(current_kprobe) = p;
 729         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 730 }
 731
 732 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 733 {
 734         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 735         int uregs, pc_dep;
 736         kprobe_opcode_t insn[MAX_INSN_SIZE];
 737         struct arch_specific_insn ainsn;
 738
 739         p->safe_arm = -1;
 740         if ((unsigned long) p->addr & 0x01)
 741         {
 742                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 743                 return -EINVAL;
 744         }
 745         insn[0] = p->opcode;
 746         ainsn.insn_arm = insn;
 747         if (!arch_check_insn_arm(&ainsn))
 748         {
 749                 p->safe_arm = 0;
 750         }
 751         uregs = pc_dep = 0;
 752         // Rn, Rm ,Rd
 753         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 754                         ARM_INSN_MATCH (SRO, insn[0]))
 755         {
 756                 uregs = 0xb;
 757                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 758                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 759                 {
 760                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 761                         pc_dep = 1;
 762                 }
 763         }
 764         // Rn ,Rd
 765         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 766                         ARM_INSN_MATCH (SIO, insn[0]))
 767         {
 768                 uregs = 0x3;
 769                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 770                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 771                 {
 772                         pc_dep = 1;
 773                         DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 774                 }
 775         }
 776         // Rn, Rm, Rs
 777         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 778         {
 779                 uregs = 0xd;
 780                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 781                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 782                 {
 783                         pc_dep = 1;
 784                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 785                 }
 786         }
 787         // register list
 788         else if (ARM_INSN_MATCH (SM, insn[0]))
 789         {
 790                 uregs = 0x10;
 791                 if (ARM_INSN_REG_MR (insn[0], 15))
 792                 {
 793                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 794                         pc_dep = 1;
 795                 }
 796         }
 797         // check instructions that can write result to SP andu uses PC
 798         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 799         {
 800                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 801                 p->safe_arm = -1;
 802                 // TODO: move free to later phase
 803                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 804                 //ret = -EFAULT;
 805         }
 806         if (unlikely(uregs && pc_dep))
 807         {
 808                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 809                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 810                 {
 811                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 812                                 __FILE__, __LINE__, insn[0]);
 813                         p->safe_arm = -1;
 814                         // TODO: move free to later phase
 815                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 816                         //return -EINVAL;
 817                 }
 818                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 819                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 820         }
 821         else
 822         {
 823                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 824                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 825         }
 826         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 827         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 828
 829         // B
 830         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
 831         {
 832                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 833                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 834                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 835                 insns[7] = get_addr_b(p->opcode, p->addr);
 836         }
 837
 838         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 839                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 840                         insns[5], insns[6], insns[7], insns[8]);
 841         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 842         {
 843                 panic("failed to write memory %p!\n", p->ainsn.insn);
 844                 // Mr_Nobody: we have to panic, really??...
 845                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 846                 //return -EINVAL;
 847         }
 848         return 0;
 849 }
 850
 851 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 852 {
 853         int uregs, pc_dep;
 854         unsigned int addr;
 855         kprobe_opcode_t insn[MAX_INSN_SIZE];
 856         struct arch_specific_insn ainsn;
 857         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 858
 859         p->safe_thumb = -1;
 860         if ((unsigned long) p->addr & 0x01)
 861         {
 862                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 863                 return -EINVAL;
 864         }
 865         insn[0] = p->opcode;
 866         ainsn.insn_thumb = insn;
 867         if (!arch_check_insn_thumb(&ainsn))
 868         {
 869                 p->safe_thumb = 0;
 870         }
 871         uregs = 0;
 872         pc_dep = 0;
 873         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 874         {
 875                 uregs = 0x0700;         // 8-10
 876                 pc_dep = 1;
 877         }
 878         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 879         {
 880                 // MOV Rd, PC
 881                 uregs = 0x07;
 882                 pc_dep = 1;
 883         }
 884         else if THUMB2_INSN_MATCH (ADR, insn[0])
 885         {
 886                 uregs = 0x0f00;         // Rd 8-11
 887                 pc_dep = 1;
 888         }
 889         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 890                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 891                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 892                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 893                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 894                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 895                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 896                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 897                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 898                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 899         {
 900                 uregs = 0xf000;         // Rt 12-15
 901                 pc_dep = 1;
 902         }
 903         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 904         {
 905                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 906                 pc_dep = 1;
 907         }
 908         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 909         {
 910                 uregs = 0xf;
 911                 pc_dep = 1;
 912         }
 913         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 914         {
 915                 uregs = 0xf000; // Rd 12-15
 916                 pc_dep = 1;
 917         }
 918         else if (THUMB2_INSN_MATCH(STRD, insn[0]) && ((THUMB2_INSN_REG_RN(insn[0]) == 15) || (THUMB2_INSN_REG_RT(insn[0]) == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 919         {
 920                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 921                 pc_dep = 1;
 922         }
 923         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 924         {
 925                 uregs = 0x0f00; // Rd 8-11
 926                 pc_dep = 1;
 927         }
 928         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 929         {
 930                 uregs = 0x0f00;
 931                 pc_dep = 1;
 932         }
 933         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 934         {
 935                 uregs = 0x0f00; // Rd 8-11
 936                 pc_dep = 1;
 937         }
 938         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 939         {
 940                 uregs = 0x0f00; // Rd 8-11
 941                 pc_dep = 1;
 942         }
 943         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 944         {
 945                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 946                 pc_dep = 1;
 947         }
 948         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 949                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 950         {
 951                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 952                 pc_dep = 1;
 953         }
 954         if (unlikely(uregs && pc_dep))
 955         {
 956                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 957                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 958                 {
 959                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 960                                 __FILE__, __LINE__, insn[0]);
 961                         p->safe_thumb = -1;
 962                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 963                         //return -EINVAL;
 964                 }
 965                 addr = ((unsigned int)p->addr) + 4;
 966                 *((unsigned short*)insns + 13) = 0xdeff;
 967                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 968                 *((unsigned short*)insns + 15) = addr >> 16;
 969                 if (!isThumb2(insn[0]))
 970                 {
 971                         addr = ((unsigned int)p->addr) + 2;
 972                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 973                         *((unsigned short*)insns + 17) = addr >> 16;
 974                 }
 975                 else {
 976                         addr = ((unsigned int)p->addr) + 4;
 977                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 978                         *((unsigned short*)insns + 17) = addr >> 16;
 979                 }
 980         }
 981         else {
 982                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
 983                 *((unsigned short*)insns + 13) = 0xdeff;
 984                 if (!isThumb2(insn[0]))
 985                 {
 986                         addr = ((unsigned int)p->addr) + 2;
 987                         *((unsigned short*)insns + 2) = insn[0];
 988                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 989                         *((unsigned short*)insns + 17) = addr >> 16;
 990                 }
 991                 else {
 992                         addr = ((unsigned int)p->addr) + 4;
 993                         insns[1] = insn[0];
 994                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
 995                         *((unsigned short*)insns + 17) = addr >> 16;
 996                 }
 997         }
 998         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
 999         {
1000                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
1001                 // Mr_Nobody: we have to panic, really??...
1002                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1003                 //return -EINVAL;
1004         }
1005         return 0;
1006 }
1007
1008 static int check_validity_insn(struct kprobe *p, struct pt_regs *regs, struct task_struct *task)
1009 {
1010         struct kprobe *kp;
1011
1012         if (unlikely(thumb_mode(regs))) {
1013                 if (p->safe_thumb != -1) {
1014                         p->ainsn.insn = p->ainsn.insn_thumb;
1015                         list_for_each_entry_rcu(kp, &p->list, list) {
1016                                 kp->ainsn.insn = p->ainsn.insn_thumb;
1017                         }
1018                 } else {
1019                         printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1020                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1021                         // Test case when we do our actions on already running application
1022                         arch_disarm_uprobe(p, task);
1023                         return -1;
1024                 }
1025         } else {
1026                 if (p->safe_arm != -1) {
1027                         p->ainsn.insn = p->ainsn.insn_arm;
1028                         list_for_each_entry_rcu(kp, &p->list, list) {
1029                                 kp->ainsn.insn = p->ainsn.insn_arm;
1030                         }
1031                 } else {
1032                         printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1033                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1034                         // Test case when we do our actions on already running application
1035                         arch_disarm_uprobe(p, task);
1036                         return -1;
1037                 }
1038         }
1039
1040         return 0;
1041 }
1042
1043 static int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
1044 {
1045         int ret;
1046         unsigned long flags;
1047         local_irq_save(flags);
1048         ret = kprobe_handler(regs);
1049         local_irq_restore(flags);
1050         return ret;
1051 }
1052
1053 int kprobe_handler(struct pt_regs *regs)
1054 {
1055         int err_out = 0;
1056         char *msg_out = NULL;
1057         unsigned long user_m = user_mode(regs);
1058         pid_t tgid = (user_m) ? current->tgid : 0;
1059         kprobe_opcode_t *addr = (kprobe_opcode_t *) (regs->ARM_pc);
1060
1061         struct kprobe *p = NULL, *p_run = NULL;
1062         int ret = 0, retprobe = 0, reenter = 0;
1063         kprobe_opcode_t *ssaddr = 0;
1064         struct kprobe_ctlblk *kcb;
1065
1066 #ifdef SUPRESS_BUG_MESSAGES
1067         int swap_oops_in_progress;
1068         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1069         swap_oops_in_progress = oops_in_progress;
1070         oops_in_progress = 1;
1071 #endif
1072 #ifdef OVERHEAD_DEBUG
1073         struct timeval swap_tv1;
1074         struct timeval swap_tv2;
1075 #define USEC_IN_SEC_NUM                         1000000
1076         do_gettimeofday(&swap_tv1);
1077 #endif
1078         preempt_disable();
1079
1080         p = get_kprobe(addr, tgid);
1081
1082         if (user_m && p && (check_validity_insn(p, regs, current) != 0)) {
1083                 goto no_kprobe_live;
1084         }
1085
1086         /* We're in an interrupt, but this is clear and BUG()-safe. */
1087         kcb = get_kprobe_ctlblk ();
1088
1089         /* Check we're not actually recursing */
1090         // TODO: event is not saving in trace
1091         p_run = kprobe_running();
1092         if (p_run)
1093         {
1094                 DBPRINTF("lock???");
1095                 if (p)
1096                 {
1097                         if (!tgid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)) {
1098                                 save_previous_kprobe(kcb, p_run);
1099                                 kcb->kprobe_status = KPROBE_REENTER;
1100                                 reenter = 1;
1101                         } else {
1102                                 /* We have reentered the kprobe_handler(), since
1103                                  * another probe was hit while within the handler.
1104                                  * We here save the original kprobes variables and
1105                                  * just single step on the instruction of the new probe
1106                                  * without calling any user handlers.
1107                                  */
1108                                 kprobes_inc_nmissed_count (p);
1109                                 prepare_singlestep (p, regs);
1110
1111                                 err_out = 0;
1112                                 goto out;
1113                         }
1114                 } else {
1115                         if(tgid) { //we can reenter probe upon uretprobe exception
1116                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1117                                 // UNDEF_INSTRUCTION from user space
1118
1119                                 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1120                                 if (p) {
1121                                         save_previous_kprobe(kcb, p_run);
1122                                         kcb->kprobe_status = KPROBE_REENTER;
1123                                         reenter = 1;
1124                                         retprobe = 1;
1125                                         DBPRINTF ("uretprobe %p\n", addr);
1126                                 }
1127                         }
1128                         if(!p) {
1129                                 p = p_run;
1130                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1131                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1132                                   DBPRINTF("kprobe_running !!! goto ss");
1133                                   goto ss_probe;
1134                                   } */
1135                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1136                                 if (tgid)
1137                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1138                                 else
1139                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1140                                 if (addr == ssaddr) {
1141                                         regs->ARM_pc = (unsigned long) (p->addr + 1);
1142                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->ARM_pc);
1143                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1144                                                 restore_previous_kprobe(kcb);
1145                                         } else {
1146                                                 reset_current_kprobe();
1147                                         }
1148                                 }
1149                                 DBPRINTF ("kprobe_running !!! goto no");
1150                                 ret = 1;
1151                                 /* If it's not ours, can't be delete race, (we hold lock). */
1152                                 DBPRINTF ("no_kprobe");
1153                                 goto no_kprobe;
1154                         }
1155                 }
1156         }
1157
1158         if (!p) {
1159                 if (tgid) {
1160                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1161                         // UNDEF_INSTRUCTION from user space
1162
1163                         p = get_kprobe_by_insn_slot(addr, tgid, regs);
1164                         if (!p) {
1165                                 /* Not one of ours: let kernel handle it */
1166                                 DBPRINTF ("no_kprobe");
1167                                 goto no_kprobe;
1168                         }
1169                         retprobe = 1;
1170                         DBPRINTF ("uretprobe %p\n", addr);
1171                 } else {
1172                         /* Not one of ours: let kernel handle it */
1173                         DBPRINTF ("no_kprobe");
1174                         goto no_kprobe;
1175                 }
1176         }
1177         // restore opcode for thumb app
1178         if (user_mode( regs ) && thumb_mode( regs )) {
1179                 if (!isThumb2(p->opcode)) {
1180                         unsigned long tmp = p->opcode >> 16;
1181                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1182
1183                         // "2*sizeof(kprobe_opcode_t)" - strange. Should be "sizeof(kprobe_opcode_t)", need to test
1184                         flush_icache_range((unsigned int) p->addr, ((unsigned int)p->addr) + (2 * sizeof(kprobe_opcode_t)));
1185                 }
1186         }
1187         set_current_kprobe(p, NULL, NULL);
1188         if(!reenter)
1189                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1190         if (retprobe) {         //(einsn == UNDEF_INSTRUCTION)
1191                 ret = trampoline_probe_handler (p, regs);
1192         } else if (p->pre_handler) {
1193                 ret = p->pre_handler (p, regs);
1194                 if(p->pre_handler != trampoline_probe_handler) {
1195                         reset_current_kprobe();
1196                 }
1197         }
1198
1199         if (ret) {
1200                 /* handler has already set things up, so skip ss setup */
1201                 err_out = 0;
1202                 goto out;
1203         }
1204
1205 no_kprobe:
1206         msg_out = "no_kprobe\n";
1207         err_out = 1;            // return with death
1208         goto out;
1209
1210 no_kprobe_live:
1211         msg_out = "no_kprobe live\n";
1212         err_out = 0;            // ok - life is life
1213         goto out;
1214
1215 out:
1216         preempt_enable_no_resched();
1217 #ifdef OVERHEAD_DEBUG
1218         do_gettimeofday(&swap_tv2);
1219         swap_sum_hit++;
1220         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1221                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1222 #endif
1223 #ifdef SUPRESS_BUG_MESSAGES
1224         oops_in_progress = swap_oops_in_progress;
1225 #endif
1226
1227         if(msg_out) {
1228                 printk(msg_out);
1229         }
1230
1231         return err_out;
1232 }
1233
1234 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1235 {
1236         struct jprobe *jp = container_of (p, struct jprobe, kp);
1237         kprobe_pre_entry_handler_t pre_entry;
1238         entry_point_t entry;
1239
1240 # ifdef REENTER
1241 //      p = kprobe_running(regs);
1242 # endif
1243
1244         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1245         entry = (entry_point_t) jp->entry;
1246         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1247         //if(!entry)
1248         //      DIE("entry NULL", regs)
1249         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1250
1251         //call handler for all kernel probes and user space ones which belong to current tgid
1252         if (!p->tgid || (p->tgid == current->tgid))
1253         {
1254                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1255                     patch_suspended_all_task_ret_addr(sched_rp);
1256                 }
1257                 if (pre_entry)
1258                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1259                 if (entry){
1260                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1261                 }
1262                 else {
1263                         if (p->tgid)
1264                                 dbi_arch_uprobe_return ();
1265                         else
1266                                 dbi_jprobe_return ();
1267                 }
1268         }
1269         else if (p->tgid)
1270                 dbi_arch_uprobe_return ();
1271
1272         prepare_singlestep (p, regs);
1273
1274         return 1;
1275 }
1276
1277 void dbi_jprobe_return (void)
1278 {
1279 }
1280
1281 void dbi_arch_uprobe_return (void)
1282 {
1283 }
1284
1285 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1286 {
1287 # ifndef REENTER
1288         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1289         kprobe_opcode_t insns[2];
1290
1291         if (p->pid)
1292         {
1293                 insns[0] = BREAKPOINT_INSTRUCTION;
1294                 insns[1] = p->opcode;
1295                 //p->opcode = *p->addr;
1296                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1297                 {
1298                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1299                         return -1;
1300                 }
1301                 //*p->addr = BREAKPOINT_INSTRUCTION;
1302                 //*(p->addr+1) = p->opcode;
1303                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1304                 {
1305                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1306                         return -1;
1307                 }
1308         }
1309         else
1310         {
1311                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1312                 *(p->addr + 1) = p->opcode;
1313                 p->opcode = *p->addr;
1314                 *p->addr = BREAKPOINT_INSTRUCTION;
1315
1316                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1317         }
1318
1319         reset_current_kprobe();
1320
1321 #endif //REENTER
1322
1323         return 0;
1324 }
1325
1326
1327 void arch_arm_kprobe (struct kprobe *p)
1328 {
1329         *p->addr = BREAKPOINT_INSTRUCTION;
1330         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1331 }
1332
1333 void arch_disarm_kprobe (struct kprobe *p)
1334 {
1335         *p->addr = p->opcode;
1336         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1337 }
1338
1339
1340 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1341 {
1342         struct kretprobe_instance *ri = NULL;
1343         struct hlist_head *head;
1344         struct hlist_node *node, *tmp;
1345         unsigned long flags, orig_ret_address = 0;
1346         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1347
1348         struct kretprobe *crp = NULL;
1349         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1350
1351         DBPRINTF ("start");
1352
1353         if (p && p->tgid){
1354                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1355                 if (!thumb_mode( regs ))
1356                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1357                 else
1358                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1359         }
1360
1361         spin_lock_irqsave (&kretprobe_lock, flags);
1362
1363         /*
1364          * We are using different hash keys (current and mm) for finding kernel
1365          * space and user space probes.  Kernel space probes can change mm field in
1366          * task_struct.  User space probes can be shared between threads of one
1367          * process so they have different current but same mm.
1368          */
1369         if (p && p->tgid) {
1370                 head = kretprobe_inst_table_head(current->mm);
1371         } else {
1372                 head = kretprobe_inst_table_head(current);
1373         }
1374
1375         /*
1376          * It is possible to have multiple instances associated with a given
1377          * task either because an multiple functions in the call path
1378          * have a return probe installed on them, and/or more then one
1379          * return probe was registered for a target function.
1380          *
1381          * We can handle this because:
1382          *     - instances are always inserted at the head of the list
1383          *     - when multiple return probes are registered for the same
1384          *       function, the first instance's ret_addr will point to the
1385          *       real return address, and all the rest will point to
1386          *       kretprobe_trampoline
1387          */
1388         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1389         {
1390                 if (ri->task != current)
1391                         /* another task is sharing our hash bucket */
1392                         continue;
1393                 if (ri->rp && ri->rp->handler){
1394                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1395                 }
1396
1397                 orig_ret_address = (unsigned long) ri->ret_addr;
1398                 recycle_rp_inst (ri);
1399                 if (orig_ret_address != trampoline_address)
1400                         /*
1401                          * This is the real return address. Any other
1402                          * instances associated with this task are for
1403                          * other calls deeper on the call stack
1404                          */
1405                         break;
1406         }
1407         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1408         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1409         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1410         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1411         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1412         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1413         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1414         //}
1415         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1416                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1417
1418         regs->uregs[14] = orig_ret_address;
1419         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1420         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1421
1422         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1423         {
1424                 regs->uregs[15] = orig_ret_address;
1425         }else{
1426                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1427                 else regs->uregs[15] += 2;
1428         }
1429
1430         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1431
1432         if(p){ // ARM, MIPS, X86 user space
1433                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1434                 {
1435                         regs->ARM_cpsr &= 0xFFFFFFDF;
1436                 }else{
1437                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1438                         {
1439                                 regs->ARM_cpsr |= 0x20;
1440                         }
1441                 }
1442
1443                 //TODO: test - enter function, delete us retprobe, exit function
1444                 // for user space retprobes only - deferred deletion
1445
1446                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1447                 {
1448                         // if we are not at the end of the list and current retprobe should be disarmed
1449                         if (node && ri->rp2)
1450                         {
1451                                 struct hlist_node *current_node = node;
1452                                 crp = ri->rp2;
1453                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1454                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1455                                   DIE(die_msg, regs); */
1456                                 // look for other instances for the same retprobe
1457                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1458                                 {
1459                                         /*
1460                                          * Trying to find another retprobe instance associated with
1461                                          * the same retprobe.
1462                                          */
1463                                         if (ri->rp2 == crp && node != current_node)
1464                                                 break;
1465                                 }
1466
1467                                 if (!node)
1468                                 {
1469                                         // if there are no more instances for this retprobe
1470                                         // delete retprobe
1471                                         struct kprobe *is_p = &crp->kp;
1472                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1473                                         /*
1474                                           If there is no any retprobe instances of this retprobe
1475                                           we can free the resources related to the probe.
1476                                          */
1477                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1478                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1479                                         }
1480                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1481                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1482                                         }
1483                                         unregister_uprobe (&crp->kp, current, 1);
1484                                         kfree (crp);
1485                                 }
1486                                 hlist_del(current_node);
1487                         }
1488                 }
1489
1490                 if (kcb->kprobe_status == KPROBE_REENTER) {
1491                         restore_previous_kprobe(kcb);
1492                 } else {
1493                         reset_current_kprobe();
1494                 }
1495         }
1496
1497         spin_unlock_irqrestore (&kretprobe_lock, flags);
1498
1499         /*
1500          * By returning a non-zero value, we are telling
1501          * kprobe_handler() that we don't want the post_handler
1502          * to run (and have re-enabled preemption)
1503          */
1504
1505         return 1;
1506 }
1507
1508 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1509 {
1510         struct kretprobe_instance *ri;
1511
1512         DBPRINTF ("start\n");
1513         //TODO: test - remove retprobe after func entry but before its exit
1514         if ((ri = get_free_rp_inst (rp)) != NULL)
1515         {
1516                 ri->rp = rp;
1517                 ri->rp2 = NULL;
1518                 ri->task = current;
1519                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1520
1521                 if (rp->kp.tgid)
1522                         if (!thumb_mode( regs ))
1523                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1524                         else
1525                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1526
1527                 else    /* Replace the return addr with trampoline addr */
1528                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1529
1530 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1531                 add_rp_inst (ri);
1532         }
1533         else {
1534                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1535                 rp->nmissed++;
1536         }
1537 }
1538
1539
1540 int asm_init_module_dependencies()
1541 {
1542         //No module dependencies
1543         return 0;
1544 }
1545
1546
1547 void (* do_kpro)(struct undef_hook *);
1548 void (* undo_kpro)(struct undef_hook *);
1549
1550 // kernel probes hook
1551 struct undef_hook undef_ho_k = {
1552     .instr_mask = 0xffffffff,
1553     .instr_val  = BREAKPOINT_INSTRUCTION,
1554     .cpsr_mask  = MODE_MASK,
1555     .cpsr_val   = SVC_MODE,
1556     .fn         = kprobe_trap_handler
1557 };
1558
1559 // userspace probes hook (arm)
1560 struct undef_hook undef_ho_u = {
1561     .instr_mask = 0xffffffff,
1562     .instr_val  = BREAKPOINT_INSTRUCTION,
1563     .cpsr_mask  = MODE_MASK,
1564     .cpsr_val   = USR_MODE,
1565     .fn         = kprobe_trap_handler
1566 };
1567
1568 // userspace probes hook (thumb)
1569 struct undef_hook undef_ho_u_t = {
1570     .instr_mask = 0xffffffff,
1571     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1572     .cpsr_mask  = MODE_MASK,
1573     .cpsr_val   = USR_MODE,
1574     .fn         = kprobe_trap_handler
1575 };
1576
1577 int __init arch_init_kprobes (void)
1578 {
1579         unsigned int do_bp_handler = 0;
1580         int ret = 0;
1581
1582         if (arch_init_module_dependencies())
1583         {
1584                 DBPRINTF ("Unable to init module dependencies\n");
1585                 return -1;
1586         }
1587
1588         do_bp_handler = swap_ksyms("do_undefinstr");
1589         if (do_bp_handler == 0) {
1590                 DBPRINTF("no do_undefinstr symbol found!");
1591                 return -1;
1592         }
1593         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1594         // Register hooks (kprobe_handler)
1595         do_kpro = swap_ksyms("register_undef_hook");
1596         if (do_kpro == 0) {
1597                 printk("no register_undef_hook symbol found!\n");
1598                 return -1;
1599         }
1600
1601         // Unregister hooks (kprobe_handler)
1602         undo_kpro = swap_ksyms("unregister_undef_hook");
1603         if (undo_kpro == 0) {
1604                 printk("no unregister_undef_hook symbol found!\n");
1605                 return -1;
1606         }
1607
1608         do_kpro(&undef_ho_k);
1609         do_kpro(&undef_ho_u);
1610         do_kpro(&undef_ho_u_t);
1611         if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1612                 //dbi_unregister_jprobe(&do_exit_p, 0);
1613                 return ret;
1614         }
1615         return ret;
1616 }
1617
1618 void __exit dbi_arch_exit_kprobes (void)
1619 {
1620         undo_kpro(&undef_ho_u_t);
1621         undo_kpro(&undef_ho_u);
1622         undo_kpro(&undef_ho_k);
1623 }
1624
1625 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1626 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);