kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  26  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  28  *              kprobe_handler() now called via undefined instruction hooks
  29  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/mm.h>
  34
  35 #include "dbi_kprobes.h"
  36 #include "../dbi_kprobes.h"
  37
  38 #include "../../dbi_kdebug.h"
  39 #include "../../dbi_insn_slots.h"
  40 #include "../../dbi_kprobes_deps.h"
  41 #include "../../dbi_uprobes.h"
  42
  43 #include <asm/cacheflush.h>
  44
  45 #ifdef OVERHEAD_DEBUG
  46 #include <linux/time.h>
  47 #endif
  48
  49 #include <asm/traps.h>
  50 #include <asm/ptrace.h>
  51 #include <linux/list.h>
  52 #include <linux/hash.h>
  53
  54 #define SUPRESS_BUG_MESSAGES
  55
  56 extern unsigned int *sched_addr;
  57 extern unsigned int *fork_addr;
  58
  59 extern struct kprobe * per_cpu__current_kprobe;
  60 extern spinlock_t kretprobe_lock;
  61 extern struct kretprobe *sched_rp;
  62
  63 extern struct hlist_head kprobe_insn_pages;
  64 extern struct hlist_head uprobe_insn_pages;
  65
  66 extern unsigned long (*kallsyms_search) (const char *name);
  67
  68 extern struct kprobe_ctlblk *get_kprobe_ctlblk (void);
  69 extern struct kprobe * current_kprobe;
  70
  71 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  72
  73 static struct kprobe *kprobe_running(struct pt_regs *regs)
  74 {
  75         if (user_mode(regs)) {
  76                 return 0;
  77         }
  78
  79         return (__get_cpu_var(current_kprobe));
  80 }
  81
  82 static void reset_current_kprobe(struct pt_regs *regs)
  83 {
  84         if (user_mode(regs)) {
  85                 return;
  86         }
  87
  88         __get_cpu_var(current_kprobe) = NULL;
  89 }
  90
  91 #ifdef OVERHEAD_DEBUG
  92 unsigned long swap_sum_time = 0;
  93 unsigned long swap_sum_hit = 0;
  94 EXPORT_SYMBOL_GPL (swap_sum_time);
  95 EXPORT_SYMBOL_GPL (swap_sum_hit);
  96 #endif
  97
  98 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
  99 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
 100
 101 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t addr)
 102 {
 103         // real position less then PC by 8
 104         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
 105 }
 106
 107 unsigned int arr_traps_template[] = {
 108                 0xe1a0c00d,    // mov          ip, sp
 109                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
 110                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
 111                 0x00000000,    // b
 112                 0xe3500000,    // cmp          r0, #0  ; 0x0
 113                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
 114                 0x00000000,    // nop
 115                 0xffffffff     // end
 116 };
 117
 118
 119 struct kprobe trampoline_p =
 120 {
 121         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
 122         .pre_handler = trampoline_probe_handler
 123 };
 124
 125 // is instruction Thumb2 and NOT a branch, etc...
 126 int isThumb2(kprobe_opcode_t insn)
 127 {
 128         if((    (insn & 0xf800) == 0xe800 ||
 129                 (insn & 0xf800) == 0xf000 ||
 130                 (insn & 0xf800) == 0xf800)) return 1;
 131         return 0;
 132 }
 133
 134
 135 int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 136 {
 137         int i;
 138
 139         if (uregs & 0x10)
 140         {
 141                 int reg_mask = 0x1;
 142                 //search in reg list
 143                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 144                 {
 145                         if (!(insn & reg_mask))
 146                                 break;
 147                 }
 148         }
 149         else
 150         {
 151                 for (i = 0; i < 13; i++)
 152                 {
 153                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 154                                 continue;
 155                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 156                                 continue;
 157                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 158                                 continue;
 159                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 160                                 continue;
 161                         break;
 162                 }
 163         }
 164         if (i == 13)
 165         {
 166                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 167                 return -EINVAL;
 168         }
 169         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 170
 171         // set register to save
 172         ARM_INSN_REG_SET_RD (insns[0], i);
 173         // set register to load address to
 174         ARM_INSN_REG_SET_RD (insns[1], i);
 175         // set instruction to execute and patch it
 176         if (uregs & 0x10)
 177         {
 178                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 179                 ARM_INSN_REG_SET_MR (insn, i);
 180         }
 181         else
 182         {
 183                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 184                         ARM_INSN_REG_SET_RN (insn, i);
 185                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 186                         ARM_INSN_REG_SET_RD (insn, i);
 187                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 188                         ARM_INSN_REG_SET_RS (insn, i);
 189                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 190                         ARM_INSN_REG_SET_RM (insn, i);
 191         }
 192         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 193         // set register to restore
 194         ARM_INSN_REG_SET_RD (insns[3], i);
 195         return 0;
 196 }
 197
 198
 199
 200 int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 201 {
 202         unsigned char mreg = 0;
 203         unsigned char reg = 0;
 204
 205
 206         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 207         {
 208                 reg = ((insn & 0xffff) & uregs) >> 8;
 209         }else{
 210                 if (THUMB_INSN_MATCH (MOV3, insn))
 211                 {
 212                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 213                                 reg = (insn & 0xffff) & uregs;
 214                         else
 215                                 return 0;
 216                 }else{
 217                         if (THUMB2_INSN_MATCH (ADR, insn))
 218                         {
 219                                 reg = ((insn >> 16) & uregs) >> 8;
 220                                 if (reg == 15) return 0;
 221                         }else{
 222                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 223                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 224                                     THUMB2_INSN_MATCH (LDRWL, insn))
 225                                 {
 226                                         reg = ((insn >> 16) & uregs) >> 12;
 227                                         if (reg == 15) return 0;
 228                                 }else{
 229 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 230                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 231                                         {
 232                                                 reg = ((insn >> 16) & uregs) >> 12;
 233                                         }else{
 234                                                 if (THUMB2_INSN_MATCH (DP, insn))
 235                                                 {
 236                                                         reg = ((insn >> 16) & uregs) >> 12;
 237                                                         if (reg == 15) return 0;
 238                                                 }else{
 239                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 240                                                         {
 241                                                                 reg = ((insn >> 12) & uregs) >> 8;
 242                                                                 if (reg == 15) return 0;
 243                                                         }else{
 244                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 245                                                                 {
 246                                                                         reg = ((insn >> 12) & uregs) >> 8;
 247                                                                         if (reg == 15) return 0;
 248                                                                 }else{
 249                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 250                                                                         {
 251                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 252                                                                                 if (reg == 15) return 0;
 253                                                                         }else{
 254                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 255                                                                                 {
 256                                                                                         reg = 15;
 257                                                                                 }else{
 258                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 259                                                                                         {
 260                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 261                                                                                         }
 262                                                                                 }
 263                                                                         }
 264                                                                 }
 265                                                         }
 266                                                 }
 267                                         }
 268                                 }
 269                         }
 270                 }
 271         }
 272
 273         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 274                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 275                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 276         {
 277                 reg = THUMB2_INSN_REG_RT(insn);
 278         }
 279
 280         if (reg == 6 || reg == 7)
 281         {
 282                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 283                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 284                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 285                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 286                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 287                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 288                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 289                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 290         }
 291
 292
 293         if (THUMB_INSN_MATCH (APC, insn))
 294         {
 295 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 296                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 297         }else{
 298                 if (THUMB_INSN_MATCH (LRO3, insn))
 299                 {
 300 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 301                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 302                 }else{
 303                         if (THUMB_INSN_MATCH (MOV3, insn))
 304                         {
 305 //                              MOV Rd, PC -> MOV Rd, SP
 306                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 307                         }else{
 308                                 if (THUMB2_INSN_MATCH (ADR, insn))
 309                                 {
 310 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 311                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 312                                 }else{
 313                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 314                                             THUMB2_INSN_MATCH (LDRHW, insn))
 315                                         {
 316 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 317 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 318 //                                              !!! imm_12 vs. imm_8 !!!
 319 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 320                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 321                                         }else{
 322                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 323                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 324                                                     THUMB2_INSN_MATCH (LDREX, insn))
 325                                                 {
 326 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 327                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 328                                                 }else{
 329                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 330                                                         {
 331                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 332                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 333                                                                 {
 334                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 335                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 336                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 337                                                                         {
 338 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 339                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 340                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 341                                                                                 {
 342                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 343                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 344                                                                                         {
 345                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 346                                                                                                 {
 347                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 348                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 349                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 350                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 351                                                                                                 {
 352                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 353                                                                                                 }
 354                                                                                         }
 355                                                                                 }
 356                                                                         }
 357                                                                 }
 358                                                         }
 359                                                 }
 360                                         }
 361                                 }
 362                         }
 363                 }
 364         }
 365
 366         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 367         {
 368                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 369         }else{
 370                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 371                 {
 372                         if (THUMB2_INSN_REG_RN(insn) == 15)
 373                         {
 374                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 375                         }else{
 376                                 insns[2] = insn;
 377                         }
 378                 }else{
 379                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 380                         {
 381                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 382                                 {
 383                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 384                                 }else{
 385                                         insns[2] = insn;
 386                                 }
 387                         }
 388                 }
 389         }
 390
 391 //       STRx PC, xxx
 392         if ((reg == 15) && THUMB2_INSN_MATCH (STRW, insn)   || \
 393                            THUMB2_INSN_MATCH (STRBW, insn)  || \
 394                            THUMB2_INSN_MATCH (STRD, insn)   || \
 395                            THUMB2_INSN_MATCH (STRHT, insn)  || \
 396                            THUMB2_INSN_MATCH (STRT, insn)   || \
 397                            THUMB2_INSN_MATCH (STRHW1, insn) || \
 398                            THUMB2_INSN_MATCH (STRHW, insn) )
 399         {
 400                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 401         }
 402
 403
 404
 405         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 406         {
 407                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 408         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 409                 {
 410                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 411                         {
 412                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 413                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 414                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 415                 }
 416         }
 417
 418         return 0;
 419 }
 420
 421
 422
 423 int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 424 {
 425         int ret = 0;
 426         kprobe_opcode_t *insn;
 427
 428         // check instructions that can change PC by nature
 429         if (
 430 //              ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 431                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 432                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 433                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 434                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 435                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 436                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 437                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 438                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 439         {
 440                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 441                 ret = -EFAULT;
 442         }
 443 #ifndef CONFIG_CPU_V7
 444         // check instructions that can write result to PC
 445         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 446                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 447                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 448                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 449                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 450                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 451         {
 452                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 453                 ret = -EFAULT;
 454         }
 455 #endif // CONFIG_CPU_V7
 456         // check special instruction loads store multiple registers
 457         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 458                         // store pc or load to pc
 459                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 460                          // store/load with pc update
 461                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 462         {
 463                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 464                 ret = -EFAULT;
 465         }
 466         return ret;
 467 }
 468
 469 int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 470 {
 471         int ret = 0;
 472
 473         // check instructions that can change PC
 474         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 475                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 476                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 477                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
 478                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 479                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 480                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 481                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 482                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
 483                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
 484                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
 485                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 486                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 487                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 488                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 489                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 490                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 491                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 492                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 493                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 494                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 495                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 496                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 497                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 498                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 499                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 500                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 501                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 502 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 503                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 504                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 505                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 506                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 507                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 508                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 509                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 510                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 511 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 512                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 513         {
 514                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 515                 ret = -EFAULT;
 516         }
 517
 518         return ret;
 519 }
 520
 521 int arch_prepare_kretprobe (struct kretprobe *p)
 522 {
 523         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 524         return 0;
 525 }
 526
 527 int arch_prepare_kprobe (struct kprobe *p)
 528 {
 529         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 530         int uregs, pc_dep, ret = 0;
 531     kprobe_opcode_t insn[MAX_INSN_SIZE];
 532     struct arch_specific_insn ainsn;
 533
 534     /* insn: must be on special executable page on i386. */
 535     p->ainsn.insn = get_insn_slot (NULL, 0);
 536     if (!p->ainsn.insn)
 537         return -ENOMEM;
 538
 539     memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 540     ainsn.insn_arm = ainsn.insn = insn;
 541     ret = arch_check_insn_arm (&ainsn);
 542     if (!ret)
 543     {
 544         p->opcode = *p->addr;
 545         p->ainsn.boostable = 1;
 546         uregs = pc_dep = 0;
 547
 548         // Rn, Rm ,Rd
 549         if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 550            ARM_INSN_MATCH (SRO, insn[0]))
 551         {
 552             uregs = 0xb;
 553             if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 554                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
 555             {
 556                 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 557                 pc_dep = 1;
 558             }
 559         }
 560         // Rn ,Rd
 561         else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 562                 ARM_INSN_MATCH (SIO, insn[0]))
 563         {
 564             uregs = 0x3;
 565             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 566                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 567             {
 568                 pc_dep = 1;
 569                 DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
 570             }
 571         }
 572         // Rn, Rm, Rs
 573         else if(ARM_INSN_MATCH (DPRS, insn[0]))
 574         {
 575             uregs = 0xd;
 576             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 577                 (ARM_INSN_REG_RS (insn[0]) == 15))
 578             {
 579                 pc_dep = 1;
 580                 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 581             }
 582         }
 583         // register list
 584         else if(ARM_INSN_MATCH (SM, insn[0]))
 585         {
 586             uregs = 0x10;
 587             if (ARM_INSN_REG_MR (insn[0], 15))
 588             {
 589                 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 590                 pc_dep = 1;
 591             }
 592         }
 593         // check instructions that can write result to SP andu uses PC
 594         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 595         {
 596             free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 597             ret = -EFAULT;
 598         }
 599         else
 600         {
 601             if (uregs && pc_dep)
 602             {
 603                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 604                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 605                 {
 606                     DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 607                     free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 608                     return -EINVAL;
 609                 }
 610                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 611             }
 612             else
 613             {
 614                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 615                 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 616             }
 617             insns[7] = (kprobe_opcode_t) (p->addr + 1);
 618             DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 619             DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 620                     p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 621                     insns[5], insns[6], insns[7], insns[8]);
 622             memcpy (p->ainsn.insn, insns, sizeof(insns));
 623             flush_icache_range(p->ainsn.insn, p->ainsn.insn + sizeof(insns));
 624 #ifdef BOARD_tegra
 625             flush_cache_all();
 626 #endif
 627         }
 628     }
 629     else
 630     {
 631         free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 632         printk("arch_prepare_kprobe: instruction 0x%x not instrumentation, addr=0x%p\n", insn[0], p->addr);
 633     }
 634
 635     return ret;
 636 }
 637
 638 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 639 {
 640         kprobe_opcode_t insn;
 641         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 642
 643         insn = bpi >> 2;
 644         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 645         if (abs (insn & 0xffffff) > 0xffffff)
 646         {
 647                 DBPRINTF ("ERROR: kprobe address out of range\n");
 648                 BUG ();
 649         }
 650         insn = insn & 0xffffff;
 651         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 652         DBPRINTF ("insn=%lX\n", insn);
 653         return (unsigned int) insn;
 654 }
 655
 656
 657 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 658 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 659
 660 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 661 {
 662         int ret = 0;
 663         kprobe_opcode_t insn[MAX_INSN_SIZE];
 664
 665         if ((unsigned long) p->addr & 0x01)
 666         {
 667                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 668                 return -EINVAL;
 669         }
 670         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 671                 panic ("Failed to read memory %p!\n", p->addr);
 672         p->opcode = insn[0];
 673         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 674         if (!p->ainsn.insn_arm) {
 675                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 676                 return -ENOMEM;
 677         }
 678         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 679         if (ret) {
 680                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 681                 return -EFAULT;
 682         }
 683         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 684         if (!p->ainsn.insn_thumb) {
 685                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 686                 return -ENOMEM;
 687         }
 688         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 689         if (ret) {
 690                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 691                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 692                 return -EFAULT;
 693         }
 694         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
 695                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both)\n", __FILE__, __LINE__);
 696                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
 697                         panic ("Failed to write memory %p!\n", p->addr);
 698                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 699                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 700                 return -EFAULT;
 701         }
 702         p->ainsn.boostable = 1;
 703         return ret;
 704 }
 705
 706 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 707 {
 708         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
 709         return 0;
 710 }
 711
 712 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 713 {
 714         if(p->ss_addr)
 715         {
 716                 regs->uregs[15] = (unsigned long) p->ss_addr;
 717                 p->ss_addr = NULL;
 718         }
 719         else
 720                 regs->uregs[15] = (unsigned long) p->ainsn.insn;
 721 }
 722
 723 static void arm_save_previous_kprobe(struct kprobe_ctlblk *kcb, struct pt_regs *regs, struct kprobe *p_run)
 724 {
 725         if (p_run == NULL) {
 726                 panic("arm_save_previous_kprobe: p_run == NULL\n");
 727         }
 728
 729         if (kcb->prev_kprobe.kp != NULL) {
 730                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 731         }
 732
 733         kcb->prev_kprobe.kp = p_run;
 734         kcb->prev_kprobe.status = kcb->kprobe_status;
 735 }
 736
 737 static void arm_restore_previous_kprobe(struct kprobe_ctlblk *kcb, struct pt_regs *regs)
 738 {
 739         set_current_kprobe(kcb->prev_kprobe.kp, regs, NULL);
 740         kcb->kprobe_status = kcb->prev_kprobe.status;
 741         kcb->prev_kprobe.kp = NULL;
 742         kcb->prev_kprobe.status = 0;
 743 }
 744
 745 void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 746 {
 747         if (user_mode(regs)) {
 748                 return;
 749         }
 750
 751         __get_cpu_var(current_kprobe) = p;
 752         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 753 }
 754
 755 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 756 {
 757         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 758         int uregs, pc_dep;
 759         kprobe_opcode_t insn[MAX_INSN_SIZE];
 760         struct arch_specific_insn ainsn;
 761
 762         p->safe_arm = -1;
 763         if ((unsigned long) p->addr & 0x01)
 764         {
 765                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 766                 return -EINVAL;
 767         }
 768         insn[0] = p->opcode;
 769         ainsn.insn_arm = insn;
 770         if (!arch_check_insn_arm(&ainsn))
 771         {
 772                 p->safe_arm = 0;
 773         }
 774         uregs = pc_dep = 0;
 775         // Rn, Rm ,Rd
 776         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 777                         ARM_INSN_MATCH (SRO, insn[0]))
 778         {
 779                 uregs = 0xb;
 780                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 781                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 782                 {
 783                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 784                         pc_dep = 1;
 785                 }
 786         }
 787         // Rn ,Rd
 788         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 789                         ARM_INSN_MATCH (SIO, insn[0]))
 790         {
 791                 uregs = 0x3;
 792                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 793                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 794                 {
 795                         pc_dep = 1;
 796                         DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
 797                 }
 798         }
 799         // Rn, Rm, Rs
 800         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 801         {
 802                 uregs = 0xd;
 803                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 804                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 805                 {
 806                         pc_dep = 1;
 807                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 808                 }
 809         }
 810         // register list
 811         else if (ARM_INSN_MATCH (SM, insn[0]))
 812         {
 813                 uregs = 0x10;
 814                 if (ARM_INSN_REG_MR (insn[0], 15))
 815                 {
 816                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 817                         pc_dep = 1;
 818                 }
 819         }
 820         // check instructions that can write result to SP andu uses PC
 821         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 822         {
 823                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 824                 p->safe_arm = -1;
 825                 // TODO: move free to later phase
 826                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 827                 //ret = -EFAULT;
 828         }
 829         if (unlikely(uregs && pc_dep))
 830         {
 831                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 832                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 833                 {
 834                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 835                                 insn[0], __FILE__, __LINE__);
 836                         p->safe_arm = -1;
 837                         // TODO: move free to later phase
 838                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 839                         //return -EINVAL;
 840                 }
 841                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 842                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 843         }
 844         else
 845         {
 846                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 847                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 848         }
 849         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 850         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 851
 852         // B
 853         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
 854         {
 855                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 856                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 857                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 858                 insns[7] = get_addr_b(p->opcode, p->addr);
 859         }
 860
 861         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 862                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 863                         insns[5], insns[6], insns[7], insns[8]);
 864         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 865         {
 866                 panic("failed to write memory %p!\n", p->ainsn.insn);
 867                 // Mr_Nobody: we have to panic, really??...
 868                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 869                 //return -EINVAL;
 870         }
 871         return 0;
 872 }
 873
 874 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 875 {
 876         int uregs, pc_dep;
 877         unsigned int addr;
 878         kprobe_opcode_t insn[MAX_INSN_SIZE];
 879         struct arch_specific_insn ainsn;
 880         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 881
 882         p->safe_thumb = -1;
 883         if ((unsigned long) p->addr & 0x01)
 884         {
 885                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 886                 return -EINVAL;
 887         }
 888         insn[0] = p->opcode;
 889         ainsn.insn_thumb = insn;
 890         if (!arch_check_insn_thumb(&ainsn))
 891         {
 892                 p->safe_thumb = 0;
 893         }
 894         uregs = 0;
 895         pc_dep = 0;
 896         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 897         {
 898                 uregs = 0x0700;         // 8-10
 899                 pc_dep = 1;
 900         }
 901         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 902         {
 903                 // MOV Rd, PC
 904                 uregs = 0x07;
 905                 pc_dep = 1;
 906         }
 907         else if THUMB2_INSN_MATCH (ADR, insn[0])
 908         {
 909                 uregs = 0x0f00;         // Rd 8-11
 910                 pc_dep = 1;
 911         }
 912         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 913                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 914                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 915                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 916                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 917                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 918                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 919                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 920                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 921                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 922         {
 923                 uregs = 0xf000;         // Rt 12-15
 924                 pc_dep = 1;
 925         }
 926         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 927         {
 928                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 929                 pc_dep = 1;
 930         }
 931         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 932         {
 933                 uregs = 0xf;
 934                 pc_dep = 1;
 935         }
 936         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 937         {
 938                 uregs = 0xf000; // Rd 12-15
 939                 pc_dep = 1;
 940         }
 941         else if (THUMB2_INSN_MATCH (STRD, insn[0]) && (THUMB2_INSN_REG_RN(insn[0] == 15) || THUMB2_INSN_REG_RT(insn[0] == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 942         {
 943                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 944                 pc_dep = 1;
 945         }
 946         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 947         {
 948                 uregs = 0x0f00; // Rd 8-11
 949                 pc_dep = 1;
 950         }
 951         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 952         {
 953                 uregs = 0x0f00;
 954                 pc_dep = 1;
 955         }
 956         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 957         {
 958                 uregs = 0x0f00; // Rd 8-11
 959                 pc_dep = 1;
 960         }
 961         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 962         {
 963                 uregs = 0x0f00; // Rd 8-11
 964                 pc_dep = 1;
 965         }
 966         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 967         {
 968                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 969                 pc_dep = 1;
 970         }
 971         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 972                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 973         {
 974                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 975                 pc_dep = 1;
 976         }
 977         if (unlikely(uregs && pc_dep))
 978         {
 979                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 980                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 981                 {
 982                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 983                                 insn[0], __FILE__, __LINE__);
 984                         p->safe_thumb = -1;
 985                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 986                         //return -EINVAL;
 987                 }
 988                 addr = ((unsigned int)p->addr) + 4;
 989                 *((unsigned short*)insns + 13) = 0xdeff;
 990                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 991                 *((unsigned short*)insns + 15) = addr >> 16;
 992                 if (!isThumb2(insn[0]))
 993                 {
 994                         addr = ((unsigned int)p->addr) + 2;
 995                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 996                         *((unsigned short*)insns + 17) = addr >> 16;
 997                 }
 998                 else {
 999                         addr = ((unsigned int)p->addr) + 4;
1000                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
1001                         *((unsigned short*)insns + 17) = addr >> 16;
1002                 }
1003         }
1004         else {
1005                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
1006                 *((unsigned short*)insns + 13) = 0xdeff;
1007                 if (!isThumb2(insn[0]))
1008                 {
1009                         addr = ((unsigned int)p->addr) + 2;
1010                         *((unsigned short*)insns + 2) = insn[0];
1011                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
1012                         *((unsigned short*)insns + 17) = addr >> 16;
1013                 }
1014                 else {
1015                         addr = ((unsigned int)p->addr) + 4;
1016                         insns[1] = insn[0];
1017                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
1018                         *((unsigned short*)insns + 17) = addr >> 16;
1019                 }
1020         }
1021         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
1022         {
1023                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
1024                 // Mr_Nobody: we have to panic, really??...
1025                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1026                 //return -EINVAL;
1027         }
1028         return 0;
1029 }
1030
1031
1032 int kprobe_handler (struct pt_regs *regs)
1033 {
1034         struct kprobe *p = NULL, *p_run = NULL;
1035         int ret = 0, pid = 0, retprobe = 0, reenter = 0;
1036         kprobe_opcode_t *addr = NULL, *ssaddr = 0;
1037         struct kprobe_ctlblk *kcb;
1038         int i = 0;
1039 #ifdef OVERHEAD_DEBUG
1040         struct timeval swap_tv1;
1041         struct timeval swap_tv2;
1042 #endif
1043 #ifdef SUPRESS_BUG_MESSAGES
1044         int swap_oops_in_progress;
1045 #endif
1046         struct hlist_head *head;
1047         struct hlist_node *node;
1048         struct kprobe *pop, *retVal = NULL;
1049         struct kprobe *kp;
1050
1051 #ifdef SUPRESS_BUG_MESSAGES
1052         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1053         swap_oops_in_progress = oops_in_progress;
1054         oops_in_progress = 1;
1055 #endif
1056 #ifdef OVERHEAD_DEBUG
1057 #define USEC_IN_SEC_NUM                         1000000
1058         do_gettimeofday(&swap_tv1);
1059 #endif
1060         preempt_disable();
1061         addr = (kprobe_opcode_t *) (regs->uregs[15]);
1062         if (user_mode(regs))
1063         {
1064                 head = &kprobe_table[hash_ptr (addr, KPROBE_HASH_BITS)];
1065                 hlist_for_each_entry_rcu (pop, node, head, hlist) {
1066                         /*
1067                          * Searching occurred probe by
1068                          * instruction address and task_struct
1069                          */
1070                         if (pop->addr == addr) {
1071                                 if (pop->tgid == current->tgid) {
1072                                     retVal = pop;
1073                                     break;
1074                                 }
1075                         }
1076                 }
1077         }
1078         if (retVal) {
1079                 if (unlikely(thumb_mode(regs))) {
1080                         if (pop->safe_thumb != -1) {
1081                                 pop->ainsn.insn = pop->ainsn.insn_thumb;
1082                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1083                                         kp->ainsn.insn = pop->ainsn.insn_thumb;
1084                                 }
1085                         }
1086                         else {
1087                                 printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1088                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->opcode, pop->addr);
1089                                 // Test case when we do our actions on already running application
1090                                 arch_disarm_uprobe (pop, current);
1091                                 goto no_kprobe_live;
1092                         }
1093                 }
1094                 else {
1095                         if (pop->safe_arm != -1) {
1096                                 pop->ainsn.insn = pop->ainsn.insn_arm;
1097                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1098                                         kp->ainsn.insn = pop->ainsn.insn_arm;
1099                                 }
1100                         }
1101                         else {
1102                                 printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1103                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->opcode, pop->addr );
1104                                 // Test case when we do our actions on already running application
1105                                 arch_disarm_uprobe (pop, current);
1106                                 goto no_kprobe_live;
1107                         }
1108                 }
1109         }
1110         /* We're in an interrupt, but this is clear and BUG()-safe. */
1111         kcb = get_kprobe_ctlblk ();
1112         if (user_mode (regs))
1113         {
1114                 //DBPRINTF("exception[%lu] from user mode %s/%u addr %p (%lx).", nCount, current->comm, current->pid, addr, regs->uregs[14]);
1115                 pid = current->tgid;
1116         }
1117         /* Check we're not actually recursing */
1118         // TODO: event is not saving in trace
1119         p_run = kprobe_running(regs);
1120         if (p_run)
1121         {
1122                 DBPRINTF ("lock???");
1123                 p = get_kprobe (addr, pid, current);
1124                 if (p)
1125                 {
1126                         if(!pid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)){
1127                                 arm_save_previous_kprobe(kcb, regs, p_run);
1128                                 kcb->kprobe_status = KPROBE_REENTER;
1129                                 reenter = 1;
1130                         }
1131                         else {
1132                                 /* We have reentered the kprobe_handler(), since
1133                                  * another probe was hit while within the handler.
1134                                  * We here save the original kprobes variables and
1135                                  * just single step on the instruction of the new probe
1136                                  * without calling any user handlers.
1137                                  */
1138                                 if(!p->ainsn.boostable){
1139                                         arm_save_previous_kprobe(kcb, regs, p_run);
1140                                         set_current_kprobe(p, regs, kcb);
1141                                 }
1142                                 kprobes_inc_nmissed_count (p);
1143                                 prepare_singlestep (p, regs);
1144                                 if(!p->ainsn.boostable)
1145                                         kcb->kprobe_status = KPROBE_REENTER;
1146                                 preempt_enable_no_resched ();
1147 #ifdef OVERHEAD_DEBUG
1148                                 do_gettimeofday(&swap_tv2);
1149                                 swap_sum_hit++;
1150                                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1151                                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1152 #endif
1153 #ifdef SUPRESS_BUG_MESSAGES
1154                                 oops_in_progress = swap_oops_in_progress;
1155 #endif
1156                                 return 0;
1157                         }
1158                 }
1159                 else
1160                 {
1161                         if(pid) { //we can reenter probe upon uretprobe exception
1162                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1163                                 // UNDEF_INSTRUCTION from user space
1164
1165                                 if (!thumb_mode ( regs ))
1166                                         p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1167                                 else
1168                                         p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1169
1170                                 if (p) {
1171                                         arm_save_previous_kprobe(kcb, regs, p_run);
1172                                         kcb->kprobe_status = KPROBE_REENTER;
1173                                         reenter = 1;
1174                                         retprobe = 1;
1175                                         DBPRINTF ("uretprobe %p\n", addr);
1176                                 }
1177                         }
1178                         if(!p) {
1179                                 p = p_run;
1180                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1181                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1182                                   DBPRINTF("kprobe_running !!! goto ss");
1183                                   goto ss_probe;
1184                                   } */
1185                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1186                                 if(pid)
1187                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1188                                 else
1189                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1190                                 if (addr == ssaddr)
1191                                 {
1192                                         regs->uregs[15] = (unsigned long) (p->addr + 1);
1193                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->uregs[15]);
1194                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1195                                                 arm_restore_previous_kprobe(kcb, regs);
1196                                         } else {
1197                                                 reset_current_kprobe(regs);
1198                                         }
1199                                 }
1200                                 DBPRINTF ("kprobe_running !!! goto no");
1201                                 ret = 1;
1202                                 /* If it's not ours, can't be delete race, (we hold lock). */
1203                                 DBPRINTF ("no_kprobe");
1204                                 goto no_kprobe;
1205                         }
1206                 }
1207         }
1208         if (!p)
1209         {
1210                 p = get_kprobe (addr, pid, current);
1211         }
1212         if (!p)
1213         {
1214                 if(pid) {
1215                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1216                         // UNDEF_INSTRUCTION from user space
1217
1218                         if (!thumb_mode ( regs ))
1219                                 p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1220                         else
1221                                 p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1222
1223                         if (!p) {
1224                                 /* Not one of ours: let kernel handle it */
1225                                 DBPRINTF ("no_kprobe");
1226                                 goto no_kprobe;
1227                         }
1228                         retprobe = 1;
1229                         DBPRINTF ("uretprobe %p\n", addr);
1230                 }
1231                 else {
1232                         /* Not one of ours: let kernel handle it */
1233                         DBPRINTF ("no_kprobe");
1234                         goto no_kprobe;
1235                 }
1236         }
1237         // restore opcode for thumb app
1238         if (user_mode( regs ) && thumb_mode( regs ))
1239         {
1240                 if (!isThumb2(p->opcode))
1241                 {
1242                         unsigned long tmp = p->opcode >> 16;
1243                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1244                 }else{
1245                         unsigned long tmp = p->opcode;
1246                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr), &tmp, 4);
1247                 }
1248                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1249         }
1250         set_current_kprobe(p, regs, kcb);
1251         if(!reenter)
1252                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1253         if (retprobe)           //(einsn == UNDEF_INSTRUCTION)
1254                 ret = trampoline_probe_handler (p, regs);
1255         else if (p->pre_handler)
1256         {
1257                 ret = p->pre_handler (p, regs);
1258                 if(!p->ainsn.boostable)
1259                         kcb->kprobe_status = KPROBE_HIT_SS;
1260                 else if(p->pre_handler != trampoline_probe_handler) {
1261 #ifdef SUPRESS_BUG_MESSAGES
1262                         preempt_disable();
1263 #endif
1264                         reset_current_kprobe(regs);
1265 #ifdef SUPRESS_BUG_MESSAGES
1266                         preempt_enable_no_resched();
1267 #endif
1268                 }
1269         }
1270         if (ret)
1271         {
1272                 DBPRINTF ("p->pre_handler 1");
1273                 /* handler has already set things up, so skip ss setup */
1274 #ifdef OVERHEAD_DEBUG
1275                 do_gettimeofday(&swap_tv2);
1276                 swap_sum_hit++;
1277                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1278                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1279 #endif
1280 #ifdef SUPRESS_BUG_MESSAGES
1281                 oops_in_progress = swap_oops_in_progress;
1282 #endif
1283                 return 0;
1284         }
1285         DBPRINTF ("p->pre_handler 0");
1286
1287 no_kprobe:
1288         preempt_enable_no_resched ();
1289 #ifdef OVERHEAD_DEBUG
1290         do_gettimeofday(&swap_tv2);
1291         swap_sum_hit++;
1292         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1293                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1294 #endif
1295 #ifdef SUPRESS_BUG_MESSAGES
1296         oops_in_progress = swap_oops_in_progress;
1297 #endif
1298         printk("no_kprobe\n");
1299         return 1;               // return with death
1300 no_kprobe_live:
1301         preempt_enable_no_resched ();
1302 #ifdef OVERHEAD_DEBUG
1303         do_gettimeofday(&swap_tv2);
1304         swap_sum_hit++;
1305         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1306                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1307 #endif
1308 #ifdef SUPRESS_BUG_MESSAGES
1309         oops_in_progress = swap_oops_in_progress;
1310 #endif
1311         printk("no_kprobe live\n");
1312         return 0;               // ok - life is life
1313 }
1314
1315 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1316 {
1317         struct jprobe *jp = container_of (p, struct jprobe, kp);
1318         kprobe_pre_entry_handler_t pre_entry;
1319         entry_point_t entry;
1320
1321 # ifdef REENTER
1322 //      p = kprobe_running(regs);
1323 # endif
1324
1325         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1326         entry = (entry_point_t) jp->entry;
1327         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1328         //if(!entry)
1329         //      DIE("entry NULL", regs)
1330         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1331
1332         //call handler for all kernel probes and user space ones which belong to current tgid
1333         if (!p->tgid || (p->tgid == current->tgid))
1334         {
1335                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1336                     patch_suspended_all_task_ret_addr(sched_rp);
1337                 }
1338                 if (pre_entry)
1339                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1340                 if (entry){
1341                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1342                 }
1343                 else {
1344                         if (p->tgid)
1345                                 dbi_arch_uprobe_return ();
1346                         else
1347                                 dbi_jprobe_return ();
1348                 }
1349         }
1350         else if (p->tgid)
1351                 dbi_arch_uprobe_return ();
1352
1353         prepare_singlestep (p, regs);
1354
1355         return 1;
1356 }
1357
1358 void dbi_jprobe_return (void)
1359 {
1360         preempt_enable_no_resched();
1361 }
1362
1363 void dbi_arch_uprobe_return (void)
1364 {
1365         preempt_enable_no_resched();
1366 }
1367
1368 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1369 {
1370 # ifndef REENTER
1371         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1372         kprobe_opcode_t insns[2];
1373
1374         if (p->pid)
1375         {
1376                 insns[0] = BREAKPOINT_INSTRUCTION;
1377                 insns[1] = p->opcode;
1378                 //p->opcode = *p->addr;
1379                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1380                 {
1381                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1382                         return -1;
1383                 }
1384                 //*p->addr = BREAKPOINT_INSTRUCTION;
1385                 //*(p->addr+1) = p->opcode;
1386                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1387                 {
1388                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1389                         return -1;
1390                 }
1391         }
1392         else
1393         {
1394                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1395                 *(p->addr + 1) = p->opcode;
1396                 p->opcode = *p->addr;
1397                 *p->addr = BREAKPOINT_INSTRUCTION;
1398
1399                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1400         }
1401
1402         reset_current_kprobe(regs);
1403
1404 #endif //REENTER
1405
1406         return 0;
1407 }
1408
1409
1410 void arch_arm_kprobe (struct kprobe *p)
1411 {
1412         *p->addr = BREAKPOINT_INSTRUCTION;
1413         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1414 }
1415
1416 void arch_disarm_kprobe (struct kprobe *p)
1417 {
1418         *p->addr = p->opcode;
1419         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1420 }
1421
1422
1423 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1424 {
1425         struct kretprobe_instance *ri = NULL;
1426         struct hlist_head *head, empty_rp;
1427         struct hlist_node *node, *tmp;
1428         unsigned long flags, orig_ret_address = 0;
1429         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1430
1431         struct kretprobe *crp = NULL;
1432         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1433
1434         DBPRINTF ("start");
1435
1436         if (p && p->tgid){
1437                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1438                 if (!thumb_mode( regs ))
1439                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1440                 else
1441                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1442         }
1443
1444         INIT_HLIST_HEAD (&empty_rp);
1445         spin_lock_irqsave (&kretprobe_lock, flags);
1446
1447         /*
1448          * We are using different hash keys (current and mm) for finding kernel
1449          * space and user space probes.  Kernel space probes can change mm field in
1450          * task_struct.  User space probes can be shared between threads of one
1451          * process so they have different current but same mm.
1452          */
1453         if (p && p->tgid) {
1454                 head = kretprobe_inst_table_head(current->mm);
1455         } else {
1456                 head = kretprobe_inst_table_head(current);
1457         }
1458
1459         /*
1460          * It is possible to have multiple instances associated with a given
1461          * task either because an multiple functions in the call path
1462          * have a return probe installed on them, and/or more then one
1463          * return probe was registered for a target function.
1464          *
1465          * We can handle this because:
1466          *     - instances are always inserted at the head of the list
1467          *     - when multiple return probes are registered for the same
1468          *       function, the first instance's ret_addr will point to the
1469          *       real return address, and all the rest will point to
1470          *       kretprobe_trampoline
1471          */
1472         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1473         {
1474                 if (ri->task != current)
1475                         /* another task is sharing our hash bucket */
1476                         continue;
1477                 if (ri->rp && ri->rp->handler){
1478                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1479                 }
1480
1481                 orig_ret_address = (unsigned long) ri->ret_addr;
1482                 recycle_rp_inst (ri);
1483                 if (orig_ret_address != trampoline_address)
1484                         /*
1485                          * This is the real return address. Any other
1486                          * instances associated with this task are for
1487                          * other calls deeper on the call stack
1488                          */
1489                         break;
1490         }
1491         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1492         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1493         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1494         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1495         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1496         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1497         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1498         //}
1499         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1500                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1501
1502         regs->uregs[14] = orig_ret_address;
1503         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1504         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1505
1506         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1507         {
1508                 regs->uregs[15] = orig_ret_address;
1509         }else{
1510                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1511                 else regs->uregs[15] += 2;
1512         }
1513
1514         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1515
1516         if(p){ // ARM, MIPS, X86 user space
1517                 if (kcb->kprobe_status == KPROBE_REENTER)
1518                         arm_restore_previous_kprobe(kcb, regs);
1519                 else
1520                         reset_current_kprobe(regs);
1521
1522                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1523                 {
1524                         regs->ARM_cpsr &= 0xFFFFFFDF;
1525                 }else{
1526                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1527                         {
1528                                 regs->ARM_cpsr |= 0x20;
1529                         }
1530                 }
1531
1532                 //TODO: test - enter function, delete us retprobe, exit function
1533                 // for user space retprobes only - deferred deletion
1534
1535                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1536                 {
1537                         // if we are not at the end of the list and current retprobe should be disarmed
1538                         if (node && ri->rp2)
1539                         {
1540                                 struct hlist_node *current_node = node;
1541                                 crp = ri->rp2;
1542                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1543                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1544                                   DIE(die_msg, regs); */
1545                                 // look for other instances for the same retprobe
1546                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1547                                 {
1548                                         /*
1549                                          * Trying to find another retprobe instance associated with
1550                                          * the same retprobe.
1551                                          */
1552                                         if (ri->rp2 == crp && node != current_node)
1553                                                 break;
1554                                 }
1555
1556                                 if (!node)
1557                                 {       // if there are no more instances for this retprobe
1558                                         // delete retprobe
1559                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1560                                         /*
1561                                           If there is no any retprobe instances of this retprobe
1562                                           we can free the resources related to the probe.
1563                                          */
1564                                         struct kprobe *is_p = &crp->kp;
1565                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1566                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1567                                         }
1568                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1569                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1570                                         }
1571                                         unregister_uprobe (&crp->kp, current, 1);
1572                                         kfree (crp);
1573                                 }
1574                                 hlist_del(current_node);
1575                         }
1576                 }
1577         }
1578
1579         hlist_for_each_entry_safe (ri, node, tmp, &empty_rp, hlist)
1580         {
1581                 hlist_del (&ri->hlist);
1582                 kfree (ri);
1583         }
1584         spin_unlock_irqrestore (&kretprobe_lock, flags);
1585
1586         preempt_enable_no_resched ();
1587         /*
1588          * By returning a non-zero value, we are telling
1589          * kprobe_handler() that we don't want the post_handler
1590          * to run (and have re-enabled preemption)
1591          */
1592
1593         return 1;
1594 }
1595
1596 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1597 {
1598         struct kretprobe_instance *ri;
1599
1600         DBPRINTF ("start\n");
1601         //TODO: test - remove retprobe after func entry but before its exit
1602         if ((ri = get_free_rp_inst (rp)) != NULL)
1603         {
1604                 ri->rp = rp;
1605                 ri->rp2 = NULL;
1606                 ri->task = current;
1607                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1608
1609                 if (rp->kp.tgid)
1610                         if (!thumb_mode( regs ))
1611                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1612                         else
1613                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1614
1615                 else    /* Replace the return addr with trampoline addr */
1616                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1617
1618 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1619                 add_rp_inst (ri);
1620         }
1621         else {
1622                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1623                 rp->nmissed++;
1624         }
1625 }
1626
1627
1628 int asm_init_module_dependencies()
1629 {
1630         //No module dependencies
1631         return 0;
1632 }
1633
1634
1635 void (* do_kpro)(struct undef_hook *);
1636 void (* undo_kpro)(struct undef_hook *);
1637
1638 // kernel probes hook
1639 struct undef_hook undef_ho_k = {
1640     .instr_mask = 0xffffffff,
1641     .instr_val  = BREAKPOINT_INSTRUCTION,
1642     .cpsr_mask  = MODE_MASK,
1643     .cpsr_val   = SVC_MODE,
1644     .fn         = kprobe_handler,
1645 };
1646
1647 // userspace probes hook (arm)
1648 struct undef_hook undef_ho_u = {
1649     .instr_mask = 0xffffffff,
1650     .instr_val  = BREAKPOINT_INSTRUCTION,
1651     .cpsr_mask  = MODE_MASK,
1652     .cpsr_val   = USR_MODE,
1653     .fn         = kprobe_handler,
1654 };
1655
1656 // userspace probes hook (thumb)
1657 struct undef_hook undef_ho_u_t = {
1658     .instr_mask = 0xffffffff,
1659     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1660     .cpsr_mask  = MODE_MASK,
1661     .cpsr_val   = USR_MODE,
1662     .fn         = kprobe_handler,
1663 };
1664
1665 int __init arch_init_kprobes (void)
1666 {
1667         unsigned int do_bp_handler = 0;
1668         int ret = 0;
1669
1670         if (arch_init_module_dependencies())
1671         {
1672                 DBPRINTF ("Unable to init module dependencies\n");
1673                 return -1;
1674         }
1675
1676         do_bp_handler = (unsigned int) kallsyms_search ("do_undefinstr");
1677         if (do_bp_handler == 0) {
1678                 DBPRINTF("no do_undefinstr symbol found!");
1679                 return -1;
1680         }
1681         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1682         // Register hooks (kprobe_handler)
1683         do_kpro = kallsyms_search ("register_undef_hook");
1684         if (do_kpro == 0) {
1685                 printk("no register_undef_hook symbol found!\n");
1686                 return -1;
1687         }
1688         do_kpro(&undef_ho_k);
1689         do_kpro(&undef_ho_u);
1690         do_kpro(&undef_ho_u_t);
1691         if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1692                 //dbi_unregister_jprobe(&do_exit_p, 0);
1693                 return ret;
1694         }
1695         return ret;
1696 }
1697
1698 void __exit dbi_arch_exit_kprobes (void)
1699 {
1700         // Unregister hooks (kprobe_handler)
1701         undo_kpro = kallsyms_search ("unregister_undef_hook");
1702         if (undo_kpro == 0) {
1703                 printk("no unregister_undef_hook symbol found!\n");
1704                 return -1;
1705         }
1706         undo_kpro(&undef_ho_u_t);
1707         undo_kpro(&undef_ho_u);
1708         undo_kpro(&undef_ho_k);
1709 }
1710
1711 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1712 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);