kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  *
  26  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  28  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  29  *              kprobe_handler() now called via undefined instruction hooks
  30  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  31  */
  32
  33 #include <linux/module.h>
  34 #include <linux/mm.h>
  35
  36 #include "dbi_kprobes.h"
  37 #include "../dbi_kprobes.h"
  38
  39 #include "../../dbi_kdebug.h"
  40 #include "../../dbi_insn_slots.h"
  41 #include "../../dbi_kprobes_deps.h"
  42 #include "../../dbi_uprobes.h"
  43
  44 #include <asm/cacheflush.h>
  45
  46 #ifdef OVERHEAD_DEBUG
  47 #include <linux/time.h>
  48 #endif
  49
  50 #include <asm/traps.h>
  51 #include <asm/ptrace.h>
  52 #include <linux/list.h>
  53 #include <linux/hash.h>
  54
  55 #define SUPRESS_BUG_MESSAGES
  56
  57 extern unsigned int *sched_addr;
  58 extern unsigned int *fork_addr;
  59
  60 extern struct kprobe * per_cpu__current_kprobe;
  61 extern spinlock_t kretprobe_lock;
  62 extern struct kretprobe *sched_rp;
  63
  64 extern struct hlist_head kprobe_insn_pages;
  65 extern struct hlist_head uprobe_insn_pages;
  66
  67 extern unsigned long (*kallsyms_search) (const char *name);
  68
  69 extern struct kprobe *kprobe_running (void);
  70 extern struct kprobe_ctlblk *get_kprobe_ctlblk (void);
  71 extern void reset_current_kprobe (void);
  72 extern struct kprobe * current_kprobe;
  73
  74 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  75
  76 #ifdef OVERHEAD_DEBUG
  77 unsigned long swap_sum_time = 0;
  78 unsigned long swap_sum_hit = 0;
  79 EXPORT_SYMBOL_GPL (swap_sum_time);
  80 EXPORT_SYMBOL_GPL (swap_sum_hit);
  81 #endif
  82
  83 unsigned int arr_traps_template[] = {
  84                 0xe1a0c00d,    // mov          ip, sp
  85                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
  86                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
  87                 0x00000000,    // b
  88                 0xe3500000,    // cmp          r0, #0  ; 0x0
  89                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
  90                 0x00000000,    // nop
  91                 0xffffffff     // end
  92 };
  93
  94
  95 struct kprobe trampoline_p =
  96 {
  97         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
  98         .pre_handler = trampoline_probe_handler
  99 };
 100
 101 // is instruction Thumb2 and NOT a branch, etc...
 102 int isThumb2(kprobe_opcode_t insn)
 103 {
 104         if((    (insn & 0xf800) == 0xe800 ||
 105                 (insn & 0xf800) == 0xf000 ||
 106                 (insn & 0xf800) == 0xf800)) return 1;
 107         return 0;
 108 }
 109
 110
 111 int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 112 {
 113         int i;
 114
 115         if (uregs & 0x10)
 116         {
 117                 int reg_mask = 0x1;
 118                 //search in reg list
 119                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 120                 {
 121                         if (!(insn & reg_mask))
 122                                 break;
 123                 }
 124         }
 125         else
 126         {
 127                 for (i = 0; i < 13; i++)
 128                 {
 129                         //              DBPRINTF("prep_pc_dep_insn_execbuf: check R%d/%d, changing regs %x in %x",
 130                         //                              i, ARM_INSN_REG_RN(insn), uregs, insn);
 131                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 132                                 continue;
 133                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 134                                 continue;
 135                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 136                                 continue;
 137                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 138                                 continue;
 139                         break;
 140                 }
 141         }
 142         if (i == 13)
 143         {
 144                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 145                 return -EINVAL;
 146         }
 147         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 148
 149         // set register to save
 150         ARM_INSN_REG_SET_RD (insns[0], i);
 151         // set register to load address to
 152         ARM_INSN_REG_SET_RD (insns[1], i);
 153         // set instruction to execute and patch it
 154         if (uregs & 0x10)
 155         {
 156                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 157                 ARM_INSN_REG_SET_MR (insn, i);
 158         }
 159         else
 160         {
 161                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 162                         ARM_INSN_REG_SET_RN (insn, i);
 163                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 164                         ARM_INSN_REG_SET_RD (insn, i);
 165                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 166                         ARM_INSN_REG_SET_RS (insn, i);
 167                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 168                         ARM_INSN_REG_SET_RM (insn, i);
 169         }
 170         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 171         // set register to restore
 172         ARM_INSN_REG_SET_RD (insns[3], i);
 173         return 0;
 174 }
 175
 176
 177
 178 int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 179 {
 180         unsigned char mreg = 0;
 181         unsigned char reg = 0;
 182
 183
 184         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 185         {
 186                 reg = ((insn & 0xffff) & uregs) >> 8;
 187         }else{
 188                 if (THUMB_INSN_MATCH (MOV3, insn))
 189                 {
 190                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 191                                 reg = (insn & 0xffff) & uregs;
 192                         else
 193                                 return 0;
 194                 }else{
 195                         if (THUMB2_INSN_MATCH (ADR, insn))
 196                         {
 197                                 reg = ((insn >> 16) & uregs) >> 8;
 198                                 if (reg == 15) return 0;
 199                         }else{
 200                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 201                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 202                                     THUMB2_INSN_MATCH (LDRWL, insn))
 203                                 {
 204                                         reg = ((insn >> 16) & uregs) >> 12;
 205                                         if (reg == 15) return 0;
 206                                 }else{
 207 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 208                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 209                                         {
 210                                                 reg = ((insn >> 16) & uregs) >> 12;
 211                                         }else{
 212                                                 if (THUMB2_INSN_MATCH (DP, insn))
 213                                                 {
 214                                                         reg = ((insn >> 16) & uregs) >> 12;
 215                                                         if (reg == 15) return 0;
 216                                                 }else{
 217                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 218                                                         {
 219                                                                 reg = ((insn >> 12) & uregs) >> 8;
 220                                                                 if (reg == 15) return 0;
 221                                                         }else{
 222                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 223                                                                 {
 224                                                                         reg = ((insn >> 12) & uregs) >> 8;
 225                                                                         if (reg == 15) return 0;
 226                                                                 }else{
 227                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 228                                                                         {
 229                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 230                                                                                 if (reg == 15) return 0;
 231                                                                         }else{
 232                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 233                                                                                 {
 234                                                                                         reg = 15;
 235                                                                                 }else{
 236                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 237                                                                                         {
 238                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 239                                                                                         }
 240                                                                                 }
 241                                                                         }
 242                                                                 }
 243                                                         }
 244                                                 }
 245                                         }
 246                                 }
 247                         }
 248                 }
 249         }
 250
 251         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 252                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 253                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 254         {
 255                 reg = THUMB2_INSN_REG_RT(insn);
 256         }
 257
 258         if (reg == 6 || reg == 7)
 259         {
 260                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 261                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 262                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 263                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 264                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 265                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 266                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 267                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 268         }
 269
 270
 271         if (THUMB_INSN_MATCH (APC, insn))
 272         {
 273 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 274                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 275         }else{
 276                 if (THUMB_INSN_MATCH (LRO3, insn))
 277                 {
 278 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 279                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 280                 }else{
 281                         if (THUMB_INSN_MATCH (MOV3, insn))
 282                         {
 283 //                              MOV Rd, PC -> MOV Rd, SP
 284                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 285                         }else{
 286                                 if (THUMB2_INSN_MATCH (ADR, insn))
 287                                 {
 288 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 289                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 290                                 }else{
 291                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 292                                             THUMB2_INSN_MATCH (LDRHW, insn))
 293                                         {
 294 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 295 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 296 //                                              !!! imm_12 vs. imm_8 !!!
 297 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 298                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 299                                         }else{
 300                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 301                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 302                                                     THUMB2_INSN_MATCH (LDREX, insn))
 303                                                 {
 304 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 305                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 306                                                 }else{
 307                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 308                                                         {
 309                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 310                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 311                                                                 {
 312                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 313                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 314                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 315                                                                         {
 316 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 317                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 318                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 319                                                                                 {
 320                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 321                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 322                                                                                         {
 323                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 324                                                                                                 {
 325                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 326                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 327                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 328                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 329                                                                                                 {
 330                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 331                                                                                                 }
 332                                                                                         }
 333                                                                                 }
 334                                                                         }
 335                                                                 }
 336                                                         }
 337                                                 }
 338                                         }
 339                                 }
 340                         }
 341                 }
 342         }
 343
 344         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 345         {
 346                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 347         }else{
 348                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 349                 {
 350                         if (THUMB2_INSN_REG_RN(insn) == 15)
 351                         {
 352                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 353                         }else{
 354                                 insns[2] = insn;
 355                         }
 356                 }else{
 357                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 358                         {
 359                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 360                                 {
 361                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 362                                 }else{
 363                                         insns[2] = insn;
 364                                 }
 365                         }
 366                 }
 367         }
 368
 369 //       STRx PC, xxx
 370         if ((reg == 15) && THUMB2_INSN_MATCH (STRW, insn)   || \
 371                            THUMB2_INSN_MATCH (STRBW, insn)  || \
 372                            THUMB2_INSN_MATCH (STRD, insn)   || \
 373                            THUMB2_INSN_MATCH (STRHT, insn)  || \
 374                            THUMB2_INSN_MATCH (STRT, insn)   || \
 375                            THUMB2_INSN_MATCH (STRHW1, insn) || \
 376                            THUMB2_INSN_MATCH (STRHW, insn) )
 377         {
 378                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 379         }
 380
 381
 382
 383         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 384         {
 385                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 386         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 387                 {
 388                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 389                         {
 390                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 391                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 392                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 393                 }
 394         }
 395
 396         return 0;
 397 }
 398
 399
 400
 401 int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 402 {
 403         int ret = 0;
 404         kprobe_opcode_t *insn;
 405
 406         // check instructions that can change PC by nature
 407         if (    ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 408                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 409                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 410                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 411                 ARM_INSN_MATCH (B, ainsn->insn_arm[0]) ||
 412                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 413                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 414                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 415                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 416                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 417         {
 418                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 419                 ret = -EFAULT;
 420         }
 421 #ifndef CONFIG_CPU_V7
 422         // check instructions that can write result to PC
 423         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 424                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 425                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 426                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 427                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 428                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 429         {
 430                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 431                 ret = -EFAULT;
 432         }
 433 #endif // CONFIG_CPU_V7
 434         // check special instruction loads store multiple registers
 435         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 436                         // store pc or load to pc
 437                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 438                          // store/load with pc update
 439                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 440         {
 441                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 442                 ret = -EFAULT;
 443         }
 444         return ret;
 445 }
 446
 447 int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 448 {
 449         int ret = 0;
 450
 451         // check instructions that can change PC
 452         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 453                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 454                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 455                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
 456                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 457                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 458                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 459                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 460                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
 461                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
 462                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
 463                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 464                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 465                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 466                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 467                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 468                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 469                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 470                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 471                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 472                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 473                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 474                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 475                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 476                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 477                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 478                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 479                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 480 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 481                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 482                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 483                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 484                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 485                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 486                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 487                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 488                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 489 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 490                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 491         {
 492                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 493                 ret = -EFAULT;
 494         }
 495
 496         return ret;
 497 }
 498
 499 int arch_prepare_kretprobe (struct kretprobe *p)
 500 {
 501         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 502         return 0;
 503 }
 504
 505 int arch_prepare_kprobe (struct kprobe *p)
 506 {
 507         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 508         int uregs, pc_dep;
 509         int ret = 0;
 510
 511         if (!ret)
 512         {
 513                 kprobe_opcode_t insn[MAX_INSN_SIZE];
 514                 struct arch_specific_insn ainsn;
 515                 /* insn: must be on special executable page on i386. */
 516                 p->ainsn.insn = get_insn_slot (NULL, 0);
 517                 if (!p->ainsn.insn)
 518                         return -ENOMEM;
 519                 memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 520                 ainsn.insn_arm = ainsn.insn = insn;
 521                 ret = arch_check_insn_arm (&ainsn);
 522                 if (!ret)
 523                 {
 524                         p->opcode = *p->addr;
 525
 526                         p->ainsn.boostable = 1;
 527                         uregs = pc_dep = 0;
 528                         // Rn, Rm ,Rd
 529                         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 530                                         ARM_INSN_MATCH (SRO, insn[0]))
 531                         {
 532
 533                                 uregs = 0xb;
 534                                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 535                                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 536                                 {
 537
 538                                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 539                                         pc_dep = 1;
 540                                 }
 541                         }
 542                         // Rn ,Rd
 543                         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 544                                         ARM_INSN_MATCH (SIO, insn[0]))
 545                         {
 546
 547                                 uregs = 0x3;
 548                                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 549                                                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 550                                 {
 551
 552                                         pc_dep = 1;
 553                                         DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
 554                                 }
 555                         }
 556                         // Rn, Rm, Rs
 557                         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 558                         {
 559
 560                                 uregs = 0xd;
 561                                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 562                                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 563                                 {
 564
 565                                         pc_dep = 1;
 566                                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 567                                 }
 568                         }
 569                         // register list
 570                         else if (ARM_INSN_MATCH (SM, insn[0]))
 571                         {
 572
 573                                 uregs = 0x10;
 574                                 if (ARM_INSN_REG_MR (insn[0], 15))
 575                                 {
 576
 577                                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 578                                         pc_dep = 1;
 579                                 }
 580                         }
 581                         // check instructions that can write result to SP andu uses PC
 582                         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 583                         {
 584                                 static int count;
 585                                 count++;
 586                                 //printk ("insn writes result to SP and uses PC: %lx/%d\n", ainsn.insn[0], count);
 587                                 free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 588                                 ret = -EFAULT;
 589                         }
 590                         else {
 591                                 if (uregs && pc_dep)
 592                                 {
 593                                         memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 594                                         if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 595                                         {
 596                                                 DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 597                                                 free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 598                                                 return -EINVAL;
 599                                         }
 600                                         //insns[KPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 601                                         insns[6] = (kprobe_opcode_t) (p->addr + 2);
 602                                 }
 603                                 else
 604                                 {
 605                                         memcpy (insns, gen_insn_execbuf, sizeof (insns));
 606                                         insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 607                                 }
 608                                 //insns[KPROBES_TRAMP_RET_BREAK_IDX] = UNDEF_INSTRUCTION;
 609                                 insns[7] = (kprobe_opcode_t) (p->addr + 1);
 610                                 DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 611                                 DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 612                                                 p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 613                                                 insns[5], insns[6], insns[7], insns[8]);
 614                                 memcpy (p->ainsn.insn, insns, sizeof(insns));
 615                                 flush_icache_range(p->ainsn.insn, p->ainsn.insn + sizeof(insns));
 616 #ifdef BOARD_tegra
 617                                 flush_cache_all();
 618 #endif
 619                         }
 620                 }
 621                 else
 622                 {
 623                         free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 624                 }
 625         }
 626         return ret;
 627 }
 628
 629 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 630 {
 631         kprobe_opcode_t insn;
 632         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 633
 634         insn = bpi >> 2;
 635         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 636         if (abs (insn & 0xffffff) > 0xffffff)
 637         {
 638                 DBPRINTF ("ERROR: kprobe address out of range\n");
 639                 BUG ();
 640         }
 641         insn = insn & 0xffffff;
 642         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 643         DBPRINTF ("insn=%lX\n", insn);
 644         return (unsigned int) insn;
 645 }
 646
 647
 648 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 649 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 650
 651 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 652 {
 653         int ret = 0;
 654         kprobe_opcode_t insn[MAX_INSN_SIZE];
 655
 656         if ((unsigned long) p->addr & 0x01)
 657         {
 658                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 659                 return -EINVAL;
 660         }
 661         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 662                 panic ("Failed to read memory %p!\n", p->addr);
 663         p->opcode = insn[0];
 664         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 665         if (!p->ainsn.insn_arm) {
 666                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 667                 return -ENOMEM;
 668         }
 669         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 670         if (ret) {
 671                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 672                 return -EFAULT;
 673         }
 674         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 675         if (!p->ainsn.insn_thumb) {
 676                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 677                 return -ENOMEM;
 678         }
 679         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 680         if (ret) {
 681                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 682                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 683                 return -EFAULT;
 684         }
 685         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
 686                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both)\n", __FILE__, __LINE__);
 687                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
 688                         panic ("Failed to write memory %p!\n", p->addr);
 689                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 690                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 691                 return -EFAULT;
 692         }
 693         p->ainsn.boostable = 1;
 694         return ret;
 695 }
 696
 697 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 698 {
 699         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
 700         return 0;
 701 }
 702
 703 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 704 {
 705         if(p->ss_addr)
 706         {
 707                 regs->uregs[15] = (unsigned long) p->ss_addr;
 708                 p->ss_addr = NULL;
 709         }
 710         else
 711                 regs->uregs[15] = (unsigned long) p->ainsn.insn;
 712 }
 713
 714 void save_previous_kprobe (struct kprobe_ctlblk *kcb, struct kprobe *cur_p)
 715 {
 716         if (kcb->prev_kprobe.kp != NULL)
 717         {
 718                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 719         }
 720
 721         kcb->prev_kprobe.kp = kprobe_running ();
 722         kcb->prev_kprobe.status = kcb->kprobe_status;
 723 }
 724
 725 void restore_previous_kprobe (struct kprobe_ctlblk *kcb)
 726 {
 727         __get_cpu_var (current_kprobe) = kcb->prev_kprobe.kp;
 728         kcb->kprobe_status = kcb->prev_kprobe.status;
 729         kcb->prev_kprobe.kp = NULL;
 730         kcb->prev_kprobe.status = 0;
 731 }
 732
 733 void set_current_kprobe (struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 734 {
 735         __get_cpu_var (current_kprobe) = p;
 736         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 737 }
 738
 739 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 740 {
 741         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 742         int uregs, pc_dep;
 743         kprobe_opcode_t insn[MAX_INSN_SIZE];
 744         struct arch_specific_insn ainsn;
 745
 746         p->safe_arm = -1;
 747         if ((unsigned long) p->addr & 0x01)
 748         {
 749                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 750                 return -EINVAL;
 751         }
 752         insn[0] = p->opcode;
 753         ainsn.insn_arm = insn;
 754         if (!arch_check_insn_arm(&ainsn))
 755         {
 756                 p->safe_arm = 0;
 757         }
 758         uregs = pc_dep = 0;
 759         // Rn, Rm ,Rd
 760         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 761                         ARM_INSN_MATCH (SRO, insn[0]))
 762         {
 763                 uregs = 0xb;
 764                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 765                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 766                 {
 767                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 768                         pc_dep = 1;
 769                 }
 770         }
 771         // Rn ,Rd
 772         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 773                         ARM_INSN_MATCH (SIO, insn[0]))
 774         {
 775                 uregs = 0x3;
 776                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 777                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 778                 {
 779                         pc_dep = 1;
 780                         DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
 781                 }
 782         }
 783         // Rn, Rm, Rs
 784         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 785         {
 786                 uregs = 0xd;
 787                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 788                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 789                 {
 790                         pc_dep = 1;
 791                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 792                 }
 793         }
 794         // register list
 795         else if (ARM_INSN_MATCH (SM, insn[0]))
 796         {
 797                 uregs = 0x10;
 798                 if (ARM_INSN_REG_MR (insn[0], 15))
 799                 {
 800                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 801                         pc_dep = 1;
 802                 }
 803         }
 804         // check instructions that can write result to SP andu uses PC
 805         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 806         {
 807                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 808                 p->safe_arm = -1;
 809                 // TODO: move free to later phase
 810                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 811                 //ret = -EFAULT;
 812         }
 813         if (unlikely(uregs && pc_dep))
 814         {
 815                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 816                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 817                 {
 818                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 819                                 insn[0], __FILE__, __LINE__);
 820                         p->safe_arm = -1;
 821                         // TODO: move free to later phase
 822                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 823                         //return -EINVAL;
 824                 }
 825                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 826                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 827         }
 828         else
 829         {
 830                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 831                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 832         }
 833         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 834         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 835         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 836                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 837                         insns[5], insns[6], insns[7], insns[8]);
 838         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 839         {
 840                 panic("failed to write memory %p!\n", p->ainsn.insn);
 841                 // Mr_Nobody: we have to panic, really??...
 842                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 843                 //return -EINVAL;
 844         }
 845         return 0;
 846 }
 847
 848 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 849 {
 850         int uregs, pc_dep;
 851         unsigned int addr;
 852         kprobe_opcode_t insn[MAX_INSN_SIZE];
 853         struct arch_specific_insn ainsn;
 854         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 855
 856         p->safe_thumb = -1;
 857         if ((unsigned long) p->addr & 0x01)
 858         {
 859                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 860                 return -EINVAL;
 861         }
 862         insn[0] = p->opcode;
 863         ainsn.insn_thumb = insn;
 864         if (!arch_check_insn_thumb(&ainsn))
 865         {
 866                 p->safe_thumb = 0;
 867         }
 868         uregs = 0;
 869         pc_dep = 0;
 870         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 871         {
 872                 uregs = 0x0700;         // 8-10
 873                 pc_dep = 1;
 874         }
 875         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 876         {
 877                 // MOV Rd, PC
 878                 uregs = 0x07;
 879                 pc_dep = 1;
 880         }
 881         else if THUMB2_INSN_MATCH (ADR, insn[0])
 882         {
 883                 uregs = 0x0f00;         // Rd 8-11
 884                 pc_dep = 1;
 885         }
 886         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 887                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 888                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 889                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 890                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 891                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 892                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 893                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 894                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 895                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 896         {
 897                 uregs = 0xf000;         // Rt 12-15
 898                 pc_dep = 1;
 899         }
 900         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 901         {
 902                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 903                 pc_dep = 1;
 904         }
 905         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 906         {
 907                 uregs = 0xf;
 908                 pc_dep = 1;
 909         }
 910         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 911         {
 912                 uregs = 0xf000; // Rd 12-15
 913                 pc_dep = 1;
 914         }
 915         else if (THUMB2_INSN_MATCH (STRD, insn[0]) && (THUMB2_INSN_REG_RN(insn[0] == 15) || THUMB2_INSN_REG_RT(insn[0] == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 916         {
 917                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 918                 pc_dep = 1;
 919         }
 920         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 921         {
 922                 uregs = 0x0f00; // Rd 8-11
 923                 pc_dep = 1;
 924         }
 925         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 926         {
 927                 uregs = 0x0f00;
 928                 pc_dep = 1;
 929         }
 930         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 931         {
 932                 uregs = 0x0f00; // Rd 8-11
 933                 pc_dep = 1;
 934         }
 935         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 936         {
 937                 uregs = 0x0f00; // Rd 8-11
 938                 pc_dep = 1;
 939         }
 940         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 941         {
 942                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 943                 pc_dep = 1;
 944         }
 945         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 946                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 947         {
 948                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 949                 pc_dep = 1;
 950         }
 951         if (unlikely(uregs && pc_dep))
 952         {
 953                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 954                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 955                 {
 956                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 957                                 insn[0], __FILE__, __LINE__);
 958                         p->safe_thumb = -1;
 959                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 960                         //return -EINVAL;
 961                 }
 962                 addr = ((unsigned int)p->addr) + 4;
 963                 *((unsigned short*)insns + 13) = 0xdeff;
 964                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 965                 *((unsigned short*)insns + 15) = addr >> 16;
 966                 if (!isThumb2(insn[0]))
 967                 {
 968                         addr = ((unsigned int)p->addr) + 2;
 969                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 970                         *((unsigned short*)insns + 17) = addr >> 16;
 971                 }
 972                 else {
 973                         addr = ((unsigned int)p->addr) + 4;
 974                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 975                         *((unsigned short*)insns + 17) = addr >> 16;
 976                 }
 977         }
 978         else {
 979                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
 980                 *((unsigned short*)insns + 13) = 0xdeff;
 981                 if (!isThumb2(insn[0]))
 982                 {
 983                         addr = ((unsigned int)p->addr) + 2;
 984                         *((unsigned short*)insns + 2) = insn[0];
 985                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 986                         *((unsigned short*)insns + 17) = addr >> 16;
 987                 }
 988                 else {
 989                         addr = ((unsigned int)p->addr) + 4;
 990                         insns[1] = insn[0];
 991                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 992                         *((unsigned short*)insns + 17) = addr >> 16;
 993                 }
 994         }
 995         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
 996         {
 997                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
 998                 // Mr_Nobody: we have to panic, really??...
 999                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1000                 //return -EINVAL;
1001         }
1002         return 0;
1003 }
1004
1005
1006 int kprobe_handler (struct pt_regs *regs)
1007 {
1008         struct kprobe *p = 0;
1009         int ret = 0, pid = 0, retprobe = 0, reenter = 0;
1010         kprobe_opcode_t *addr = NULL, *ssaddr = 0;
1011         struct kprobe_ctlblk *kcb;
1012         int i = 0;
1013 #ifdef OVERHEAD_DEBUG
1014         struct timeval swap_tv1;
1015         struct timeval swap_tv2;
1016 #endif
1017 #ifdef SUPRESS_BUG_MESSAGES
1018         int swap_oops_in_progress;
1019 #endif
1020         struct hlist_head *head;
1021         struct hlist_node *node;
1022         struct kprobe *pop, *retVal = NULL;
1023         struct kprobe *kp;
1024
1025 #ifdef SUPRESS_BUG_MESSAGES
1026         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1027         swap_oops_in_progress = oops_in_progress;
1028         oops_in_progress = 1;
1029 #endif
1030 #ifdef OVERHEAD_DEBUG
1031 #define USEC_IN_SEC_NUM                         1000000
1032         do_gettimeofday(&swap_tv1);
1033 #endif
1034         preempt_disable();
1035         addr = (kprobe_opcode_t *) (regs->uregs[15]);
1036         if (user_mode(regs))
1037         {
1038                 head = &kprobe_table[hash_ptr (addr, KPROBE_HASH_BITS)];
1039                 hlist_for_each_entry_rcu (pop, node, head, hlist) {
1040                         /*
1041                          * Searching occurred probe by
1042                          * instruction address and task_struct
1043                          */
1044                         if (pop->addr == addr) {
1045                                 if (pop->tgid == current->tgid) {
1046                                     retVal = pop;
1047                                     break;
1048                                 }
1049                         }
1050                 }
1051         }
1052         if (retVal) {
1053                 if (unlikely(thumb_mode(regs))) {
1054                         if (pop->safe_thumb != -1) {
1055                                 pop->ainsn.insn = pop->ainsn.insn_thumb;
1056                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1057                                         kp->ainsn.insn = pop->ainsn.insn_thumb;
1058                                 }
1059                         }
1060                         else {
1061                                 printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1062                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->addr, pop->opcode);
1063                                 // Test case when we do our actions on already running application
1064                                 arch_disarm_uprobe (pop, current);
1065                                 // up on one instruction
1066                                 regs->uregs[15] -= 2;
1067                                 goto no_kprobe_live;
1068                         }
1069                 }
1070                 else {
1071                         if (pop->safe_arm != -1) {
1072                                 pop->ainsn.insn = pop->ainsn.insn_arm;
1073                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1074                                         kp->ainsn.insn = pop->ainsn.insn_arm;
1075                                 }
1076                         }
1077                         else {
1078                                 printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1079                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->addr, pop->opcode);
1080                                 // Test case when we do our actions on already running application
1081                                 arch_disarm_uprobe (pop, current);
1082                                 // up on one instruction
1083                                 regs->uregs[15] -= 4;
1084                                 goto no_kprobe_live;
1085                         }
1086                 }
1087         }
1088         /* We're in an interrupt, but this is clear and BUG()-safe. */
1089         kcb = get_kprobe_ctlblk ();
1090         if (user_mode (regs))
1091         {
1092                 //DBPRINTF("exception[%lu] from user mode %s/%u addr %p (%lx).", nCount, current->comm, current->pid, addr, regs->uregs[14]);
1093                 pid = current->tgid;
1094         }
1095         /* Check we're not actually recursing */
1096         if (kprobe_running ())
1097         {
1098                 DBPRINTF ("lock???");
1099                 p = get_kprobe (addr, pid, current);
1100                 if (p)
1101                 {
1102                         if(!pid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)){
1103                                 save_previous_kprobe (kcb, p);
1104                                 kcb->kprobe_status = KPROBE_REENTER;
1105                                 reenter = 1;
1106                         }
1107                         else {
1108                                 /* We have reentered the kprobe_handler(), since
1109                                  * another probe was hit while within the handler.
1110                                  * We here save the original kprobes variables and
1111                                  * just single step on the instruction of the new probe
1112                                  * without calling any user handlers.
1113                                  */
1114                                 if(!p->ainsn.boostable){
1115                                         save_previous_kprobe (kcb, p);
1116                                         set_current_kprobe (p, regs, kcb);
1117                                 }
1118                                 kprobes_inc_nmissed_count (p);
1119                                 prepare_singlestep (p, regs);
1120                                 if(!p->ainsn.boostable)
1121                                         kcb->kprobe_status = KPROBE_REENTER;
1122                                 preempt_enable_no_resched ();
1123 #ifdef OVERHEAD_DEBUG
1124                                 do_gettimeofday(&swap_tv2);
1125                                 swap_sum_hit++;
1126                                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1127                                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1128 #endif
1129 #ifdef SUPRESS_BUG_MESSAGES
1130                                 oops_in_progress = swap_oops_in_progress;
1131 #endif
1132                                 return 0;
1133                         }
1134                 }
1135                 else
1136                 {
1137                         if(pid) { //we can reenter probe upon uretprobe exception
1138                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1139                                 // UNDEF_INSTRUCTION from user space
1140
1141                                 if (!thumb_mode ( regs ))
1142                                         p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1143                                 else
1144                                         p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1145
1146                                 if (p) {
1147                                         save_previous_kprobe (kcb, p);
1148                                         kcb->kprobe_status = KPROBE_REENTER;
1149                                         reenter = 1;
1150                                         retprobe = 1;
1151                                         DBPRINTF ("uretprobe %p\n", addr);
1152                                 }
1153                         }
1154                         if(!p) {
1155                                 p = __get_cpu_var (current_kprobe);
1156                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1157                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1158                                   DBPRINTF("kprobe_running !!! goto ss");
1159                                   goto ss_probe;
1160                                   } */
1161                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1162                                 if(pid)
1163                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1164                                 else
1165                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1166                                 if (addr == ssaddr)
1167                                 {
1168                                         regs->uregs[15] = (unsigned long) (p->addr + 1);
1169                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->uregs[15]);
1170                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1171                                                 restore_previous_kprobe (kcb);
1172                                         }
1173                                         else {
1174                                                 reset_current_kprobe ();
1175                                         }
1176                                 }
1177                                 DBPRINTF ("kprobe_running !!! goto no");
1178                                 ret = 1;
1179                                 /* If it's not ours, can't be delete race, (we hold lock). */
1180                                 DBPRINTF ("no_kprobe");
1181                                 goto no_kprobe;
1182                         }
1183                 }
1184         }
1185         if (!p)
1186         {
1187                 p = get_kprobe (addr, pid, current);
1188         }
1189         if (!p)
1190         {
1191                 if(pid) {
1192                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1193                         // UNDEF_INSTRUCTION from user space
1194
1195                         if (!thumb_mode ( regs ))
1196                                 p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1197                         else
1198                                 p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1199
1200                         if (!p) {
1201                                 /* Not one of ours: let kernel handle it */
1202                                 DBPRINTF ("no_kprobe");
1203                                 goto no_kprobe;
1204                         }
1205                         retprobe = 1;
1206                         DBPRINTF ("uretprobe %p\n", addr);
1207                 }
1208                 else {
1209                         /* Not one of ours: let kernel handle it */
1210                         DBPRINTF ("no_kprobe");
1211                         goto no_kprobe;
1212                 }
1213         }
1214         // restore opcode for thumb app
1215         if (user_mode( regs ) && thumb_mode( regs ))
1216         {
1217                 if (!isThumb2(p->opcode))
1218                 {
1219                         unsigned long tmp = p->opcode >> 16;
1220                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1221                 }else{
1222                         unsigned long tmp = p->opcode;
1223                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr), &tmp, 4);
1224                 }
1225                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1226         }
1227         set_current_kprobe (p, regs, kcb);
1228         if(!reenter)
1229                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1230         if (retprobe)           //(einsn == UNDEF_INSTRUCTION)
1231                 ret = trampoline_probe_handler (p, regs);
1232         else if (p->pre_handler)
1233         {
1234                 ret = p->pre_handler (p, regs);
1235                 if(!p->ainsn.boostable)
1236                         kcb->kprobe_status = KPROBE_HIT_SS;
1237                 else if(p->pre_handler != trampoline_probe_handler) {
1238 #ifdef SUPRESS_BUG_MESSAGES
1239                         preempt_disable();
1240 #endif
1241                         reset_current_kprobe();
1242 #ifdef SUPRESS_BUG_MESSAGES
1243                         preempt_enable_no_resched();
1244 #endif
1245                 }
1246         }
1247         if (ret)
1248         {
1249                 DBPRINTF ("p->pre_handler 1");
1250                 /* handler has already set things up, so skip ss setup */
1251 #ifdef OVERHEAD_DEBUG
1252                 do_gettimeofday(&swap_tv2);
1253                 swap_sum_hit++;
1254                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1255                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1256 #endif
1257 #ifdef SUPRESS_BUG_MESSAGES
1258                 oops_in_progress = swap_oops_in_progress;
1259 #endif
1260                 return 0;
1261         }
1262         DBPRINTF ("p->pre_handler 0");
1263
1264 no_kprobe:
1265         preempt_enable_no_resched ();
1266 #ifdef OVERHEAD_DEBUG
1267         do_gettimeofday(&swap_tv2);
1268         swap_sum_hit++;
1269         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1270                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1271 #endif
1272 #ifdef SUPRESS_BUG_MESSAGES
1273         oops_in_progress = swap_oops_in_progress;
1274 #endif
1275         printk("no_kprobe\n");
1276         return 1;               // return with death
1277 no_kprobe_live:
1278         preempt_enable_no_resched ();
1279 #ifdef OVERHEAD_DEBUG
1280         do_gettimeofday(&swap_tv2);
1281         swap_sum_hit++;
1282         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1283                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1284 #endif
1285 #ifdef SUPRESS_BUG_MESSAGES
1286         oops_in_progress = swap_oops_in_progress;
1287 #endif
1288         printk("no_kprobe live\n");
1289         return 0;               // ok - life is life
1290 }
1291
1292 void patch_suspended_task_ret_addr(struct task_struct *p, struct kretprobe *rp)
1293 {
1294         struct kretprobe_instance *ri = NULL;
1295         struct hlist_node *node, *tmp;
1296         struct hlist_head *head;
1297         unsigned long flags;
1298         int found = 0;
1299
1300         spin_lock_irqsave (&kretprobe_lock, flags);
1301         head = kretprobe_inst_table_head (p);
1302         hlist_for_each_entry_safe (ri, node, tmp, head, hlist){
1303                 if ((ri->rp == rp) && (p == ri->task)){
1304                         found = 1;
1305                         break;
1306                 }
1307         }
1308         spin_unlock_irqrestore (&kretprobe_lock, flags);
1309
1310 #ifndef task_thread_info
1311 #define task_thread_info(task) (task)->thread_info
1312 #endif // task_thread_info
1313
1314         if (found){
1315                 // update PC
1316                 if(thread_saved_pc(p) != (unsigned long)&kretprobe_trampoline){
1317                         ri->ret_addr = (kprobe_opcode_t *)thread_saved_pc(p);
1318                         task_thread_info(p)->cpu_context.pc = (unsigned long) &kretprobe_trampoline;
1319                 }
1320                 return;
1321         }
1322
1323         spin_lock_irqsave (&kretprobe_lock, flags);
1324         if ((ri = get_free_rp_inst(rp)) != NULL)
1325         {
1326                 ri->rp = rp;
1327                 ri->rp2 = NULL;
1328                 ri->task = p;
1329                 ri->ret_addr = (kprobe_opcode_t *)thread_saved_pc(p);
1330                 task_thread_info(p)->cpu_context.pc = (unsigned long) &kretprobe_trampoline;
1331                 add_rp_inst (ri);
1332                 //              printk("change2 saved pc %p->%p for %d/%d/%p\n", ri->ret_addr, &kretprobe_trampoline, p->tgid, p->pid, p);
1333         }
1334         else{
1335                 printk("no ri for %d\n", p->pid);
1336                 BUG();
1337         }
1338         spin_unlock_irqrestore (&kretprobe_lock, flags);
1339 }
1340
1341 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1342 {
1343         struct jprobe *jp = container_of (p, struct jprobe, kp);
1344         kprobe_pre_entry_handler_t pre_entry;
1345         entry_point_t entry;
1346
1347 # ifdef REENTER
1348         p = __get_cpu_var (current_kprobe);
1349 # endif
1350
1351         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1352         entry = (entry_point_t) jp->entry;
1353         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1354         //if(!entry)
1355         //      DIE("entry NULL", regs)
1356         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1357
1358         //call handler for all kernel probes and user space ones which belong to current tgid
1359         if (!p->tgid || (p->tgid == current->tgid))
1360         {
1361                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp){
1362                         struct task_struct *p, *g;
1363                         rcu_read_lock();
1364                         //swapper task
1365                         if(current != &init_task)
1366                                 patch_suspended_task_ret_addr(&init_task, sched_rp);
1367                         // other tasks
1368                         do_each_thread(g, p){
1369                                 if(p == current)
1370                                         continue;
1371                                 patch_suspended_task_ret_addr(p, sched_rp);
1372                         } while_each_thread(g, p);
1373                         rcu_read_unlock();
1374                 }
1375                 if (pre_entry)
1376                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1377                 if (entry){
1378                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1379                 }
1380                 else {
1381                         if (p->tgid)
1382                                 dbi_arch_uprobe_return ();
1383                         else
1384                                 dbi_jprobe_return ();
1385                 }
1386         }
1387         else if (p->tgid)
1388                 dbi_arch_uprobe_return ();
1389
1390         prepare_singlestep (p, regs);
1391
1392         return 1;
1393 }
1394
1395 void dbi_jprobe_return (void)
1396 {
1397         preempt_enable_no_resched();
1398 }
1399
1400 void dbi_arch_uprobe_return (void)
1401 {
1402         preempt_enable_no_resched();
1403 }
1404
1405 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1406 {
1407 # ifndef REENTER
1408         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1409         kprobe_opcode_t insns[2];
1410
1411         if (p->pid)
1412         {
1413                 insns[0] = BREAKPOINT_INSTRUCTION;
1414                 insns[1] = p->opcode;
1415                 //p->opcode = *p->addr;
1416                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1417                 {
1418                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1419                         return -1;
1420                 }
1421                 //*p->addr = BREAKPOINT_INSTRUCTION;
1422                 //*(p->addr+1) = p->opcode;
1423                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1424                 {
1425                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1426                         return -1;
1427                 }
1428         }
1429         else
1430         {
1431                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1432                 *(p->addr + 1) = p->opcode;
1433                 p->opcode = *p->addr;
1434                 *p->addr = BREAKPOINT_INSTRUCTION;
1435
1436                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1437         }
1438
1439         reset_current_kprobe ();
1440
1441 #endif //REENTER
1442
1443         return 0;
1444 }
1445
1446
1447 void arch_arm_kprobe (struct kprobe *p)
1448 {
1449         *p->addr = BREAKPOINT_INSTRUCTION;
1450         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1451 }
1452
1453 void arch_disarm_kprobe (struct kprobe *p)
1454 {
1455         *p->addr = p->opcode;
1456         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1457 }
1458
1459
1460 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1461 {
1462         struct kretprobe_instance *ri = NULL;
1463         struct hlist_head *head, empty_rp;
1464         struct hlist_node *node, *tmp;
1465         unsigned long flags, orig_ret_address = 0;
1466         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1467
1468         struct kretprobe *crp = NULL;
1469         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1470
1471         DBPRINTF ("start");
1472
1473         if (p && p->tgid){
1474                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1475                 if (!thumb_mode( regs ))
1476                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1477                 else
1478                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1479         }
1480
1481         INIT_HLIST_HEAD (&empty_rp);
1482         spin_lock_irqsave (&kretprobe_lock, flags);
1483
1484         /*
1485          * We are using different hash keys (current and mm) for finding kernel
1486          * space and user space probes.  Kernel space probes can change mm field in
1487          * task_struct.  User space probes can be shared between threads of one
1488          * process so they have different current but same mm.
1489          */
1490         if (p && p->tgid) {
1491                 head = kretprobe_inst_table_head(current->mm);
1492         } else {
1493                 head = kretprobe_inst_table_head(current);
1494         }
1495
1496         /*
1497          * It is possible to have multiple instances associated with a given
1498          * task either because an multiple functions in the call path
1499          * have a return probe installed on them, and/or more then one
1500          * return probe was registered for a target function.
1501          *
1502          * We can handle this because:
1503          *     - instances are always inserted at the head of the list
1504          *     - when multiple return probes are registered for the same
1505          *       function, the first instance's ret_addr will point to the
1506          *       real return address, and all the rest will point to
1507          *       kretprobe_trampoline
1508          */
1509         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1510         {
1511                 if (ri->task != current)
1512                         /* another task is sharing our hash bucket */
1513                         continue;
1514                 if (ri->rp && ri->rp->handler){
1515                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1516                 }
1517
1518                 orig_ret_address = (unsigned long) ri->ret_addr;
1519                 recycle_rp_inst (ri, &empty_rp);
1520                 if (orig_ret_address != trampoline_address)
1521                         /*
1522                          * This is the real return address. Any other
1523                          * instances associated with this task are for
1524                          * other calls deeper on the call stack
1525                          */
1526                         break;
1527         }
1528         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1529         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1530         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1531         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1532         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1533         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1534         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1535         //}
1536         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1537                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1538
1539         regs->uregs[14] = orig_ret_address;
1540         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1541         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1542
1543         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1544         {
1545                 regs->uregs[15] = orig_ret_address;
1546         }else{
1547                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1548                 else regs->uregs[15] += 2;
1549         }
1550
1551         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1552
1553         if(p){ // ARM, MIPS, X86 user space
1554                 if (kcb->kprobe_status == KPROBE_REENTER)
1555                         restore_previous_kprobe (kcb);
1556                 else
1557                         reset_current_kprobe ();
1558
1559                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1560                 {
1561                         regs->ARM_cpsr &= 0xFFFFFFDF;
1562                 }else{
1563                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1564                         {
1565                                 regs->ARM_cpsr |= 0x20;
1566                         }
1567                 }
1568
1569                 //TODO: test - enter function, delete us retprobe, exit function
1570                 // for user space retprobes only - deferred deletion
1571
1572                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1573                 {
1574                         // if we are not at the end of the list and current retprobe should be disarmed
1575                         if (node && ri->rp2)
1576                         {
1577                                 struct hlist_node *current_node = node;
1578                                 crp = ri->rp2;
1579                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1580                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1581                                   DIE(die_msg, regs); */
1582                                 // look for other instances for the same retprobe
1583                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1584                                 {
1585                                         /*
1586                                          * Trying to find another retprobe instance associated with
1587                                          * the same retprobe.
1588                                          */
1589                                         if (ri->rp2 == crp && node != current_node)
1590                                                 break;
1591                                 }
1592
1593                                 if (!node)
1594                                 {       // if there are no more instances for this retprobe
1595                                         // delete retprobe
1596                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1597                                         /*
1598                                           If there is no any retprobe instances of this retprobe
1599                                           we can free the resources related to the probe.
1600                                          */
1601                                         struct kprobe *is_p = &crp->kp;
1602                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1603                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1604                                         }
1605                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1606                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1607                                         }
1608                                         unregister_uprobe (&crp->kp, current, 1);
1609                                         kfree (crp);
1610                                 }
1611                                 hlist_del(current_node);
1612                         }
1613                 }
1614         }
1615
1616         hlist_for_each_entry_safe (ri, node, tmp, &empty_rp, hlist)
1617         {
1618                 hlist_del (&ri->hlist);
1619                 kfree (ri);
1620         }
1621         spin_unlock_irqrestore (&kretprobe_lock, flags);
1622
1623         preempt_enable_no_resched ();
1624         /*
1625          * By returning a non-zero value, we are telling
1626          * kprobe_handler() that we don't want the post_handler
1627          * to run (and have re-enabled preemption)
1628          */
1629
1630         return 1;
1631 }
1632
1633 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1634 {
1635         struct kretprobe_instance *ri;
1636
1637         DBPRINTF ("start\n");
1638         //TODO: test - remove retprobe after func entry but before its exit
1639         if ((ri = get_free_rp_inst (rp)) != NULL)
1640         {
1641                 ri->rp = rp;
1642                 ri->rp2 = NULL;
1643                 ri->task = current;
1644                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1645
1646                 if (rp->kp.tgid)
1647                         if (!thumb_mode( regs ))
1648                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1649                         else
1650                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1651
1652                 else    /* Replace the return addr with trampoline addr */
1653                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1654
1655 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1656                 add_rp_inst (ri);
1657         }
1658         else {
1659                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1660                 rp->nmissed++;
1661         }
1662 }
1663
1664
1665 int asm_init_module_dependencies()
1666 {
1667         //No module dependencies
1668         return 0;
1669 }
1670
1671 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38)
1672 typedef unsigned long (* in_gate_area_fp_t)(unsigned long);
1673 in_gate_area_fp_t in_gate_area_fp;
1674 #endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38) */
1675
1676 void (* do_kpro)(struct undef_hook *);
1677 void (* undo_kpro)(struct undef_hook *);
1678
1679 // kernel probes hook
1680 struct undef_hook undef_ho_k = {
1681     .instr_mask = 0xffffffff,
1682     .instr_val  = BREAKPOINT_INSTRUCTION,
1683     .cpsr_mask  = MODE_MASK,
1684     .cpsr_val   = SVC_MODE,
1685     .fn         = kprobe_handler,
1686 };
1687
1688 // userspace probes hook (arm)
1689 struct undef_hook undef_ho_u = {
1690     .instr_mask = 0xffffffff,
1691     .instr_val  = BREAKPOINT_INSTRUCTION,
1692     .cpsr_mask  = MODE_MASK,
1693     .cpsr_val   = USR_MODE,
1694     .fn         = kprobe_handler,
1695 };
1696
1697 // userspace probes hook (thumb)
1698 struct undef_hook undef_ho_u_t = {
1699     .instr_mask = 0xffffffff,
1700     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1701     .cpsr_mask  = MODE_MASK,
1702     .cpsr_val   = USR_MODE,
1703     .fn         = kprobe_handler,
1704 };
1705
1706 int __init arch_init_kprobes (void)
1707 {
1708         unsigned int do_bp_handler = 0;
1709         int ret = 0;
1710
1711         if (arch_init_module_dependencies())
1712         {
1713                 DBPRINTF ("Unable to init module dependencies\n");
1714                 return -1;
1715         }
1716
1717 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38)
1718         in_gate_area_fp = (in_gate_area_fp_t)kallsyms_search("in_gate_area_no_mm");
1719         if (!in_gate_area_fp) {
1720                 DBPRINTF("no in_gate_area symbol found!");
1721                 return -1;
1722         }
1723 #endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38) */
1724
1725         do_bp_handler = (unsigned int) kallsyms_search ("do_undefinstr");
1726         if (do_bp_handler == 0) {
1727                 DBPRINTF("no do_undefinstr symbol found!");
1728                 return -1;
1729         }
1730         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1731         // Register hooks (kprobe_handler)
1732         do_kpro = kallsyms_search ("register_undef_hook");
1733         if (do_kpro == 0) {
1734                 printk("no register_undef_hook symbol found!\n");
1735                 return -1;
1736         }
1737         do_kpro(&undef_ho_k);
1738         do_kpro(&undef_ho_u);
1739         do_kpro(&undef_ho_u_t);
1740         if ((ret = dbi_register_kprobe (&trampoline_p, 0)) != 0) {
1741                 //dbi_unregister_jprobe(&do_exit_p, 0);
1742                 return ret;
1743         }
1744         return ret;
1745 }
1746
1747 void __exit dbi_arch_exit_kprobes (void)
1748 {
1749         // Unregister hooks (kprobe_handler)
1750         undo_kpro = kallsyms_search ("unregister_undef_hook");
1751         if (undo_kpro == 0) {
1752                 printk("no unregister_undef_hook symbol found!\n");
1753                 return -1;
1754         }
1755         undo_kpro(&undef_ho_u_t);
1756         undo_kpro(&undef_ho_u);
1757         undo_kpro(&undef_ho_k);
1758 }
1759
1760 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1761 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);