kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  26  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  28  *              kprobe_handler() now called via undefined instruction hooks
  29  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/mm.h>
  34
  35 #include "dbi_kprobes.h"
  36 #include "../dbi_kprobes.h"
  37
  38 #include "../../dbi_kdebug.h"
  39 #include "../../dbi_insn_slots.h"
  40 #include "../../dbi_kprobes_deps.h"
  41 #include "../../dbi_uprobes.h"
  42
  43 #include <asm/cacheflush.h>
  44
  45 #ifdef OVERHEAD_DEBUG
  46 #include <linux/time.h>
  47 #endif
  48
  49 #include <asm/traps.h>
  50 #include <asm/ptrace.h>
  51 #include <linux/list.h>
  52 #include <linux/hash.h>
  53
  54 #define SUPRESS_BUG_MESSAGES
  55
  56 extern unsigned int *sched_addr;
  57 extern unsigned int *fork_addr;
  58
  59 extern struct kprobe * per_cpu__current_kprobe;
  60 extern spinlock_t kretprobe_lock;
  61 extern struct kretprobe *sched_rp;
  62
  63 extern struct hlist_head kprobe_insn_pages;
  64 extern struct hlist_head uprobe_insn_pages;
  65
  66 extern unsigned long (*kallsyms_search) (const char *name);
  67
  68 extern struct kprobe *kprobe_running (void);
  69 extern struct kprobe_ctlblk *get_kprobe_ctlblk (void);
  70 extern void reset_current_kprobe (void);
  71 extern struct kprobe * current_kprobe;
  72
  73 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  74
  75 #ifdef OVERHEAD_DEBUG
  76 unsigned long swap_sum_time = 0;
  77 unsigned long swap_sum_hit = 0;
  78 EXPORT_SYMBOL_GPL (swap_sum_time);
  79 EXPORT_SYMBOL_GPL (swap_sum_hit);
  80 #endif
  81
  82 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
  83 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
  84
  85 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t addr)
  86 {
  87         // real position less then PC by 8
  88         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
  89 }
  90
  91 unsigned int arr_traps_template[] = {
  92                 0xe1a0c00d,    // mov          ip, sp
  93                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
  94                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
  95                 0x00000000,    // b
  96                 0xe3500000,    // cmp          r0, #0  ; 0x0
  97                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
  98                 0x00000000,    // nop
  99                 0xffffffff     // end
 100 };
 101
 102
 103 struct kprobe trampoline_p =
 104 {
 105         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
 106         .pre_handler = trampoline_probe_handler
 107 };
 108
 109 // is instruction Thumb2 and NOT a branch, etc...
 110 int isThumb2(kprobe_opcode_t insn)
 111 {
 112         if((    (insn & 0xf800) == 0xe800 ||
 113                 (insn & 0xf800) == 0xf000 ||
 114                 (insn & 0xf800) == 0xf800)) return 1;
 115         return 0;
 116 }
 117
 118
 119 int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 120 {
 121         int i;
 122
 123         if (uregs & 0x10)
 124         {
 125                 int reg_mask = 0x1;
 126                 //search in reg list
 127                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 128                 {
 129                         if (!(insn & reg_mask))
 130                                 break;
 131                 }
 132         }
 133         else
 134         {
 135                 for (i = 0; i < 13; i++)
 136                 {
 137                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 138                                 continue;
 139                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 140                                 continue;
 141                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 142                                 continue;
 143                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 144                                 continue;
 145                         break;
 146                 }
 147         }
 148         if (i == 13)
 149         {
 150                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 151                 return -EINVAL;
 152         }
 153         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 154
 155         // set register to save
 156         ARM_INSN_REG_SET_RD (insns[0], i);
 157         // set register to load address to
 158         ARM_INSN_REG_SET_RD (insns[1], i);
 159         // set instruction to execute and patch it
 160         if (uregs & 0x10)
 161         {
 162                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 163                 ARM_INSN_REG_SET_MR (insn, i);
 164         }
 165         else
 166         {
 167                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 168                         ARM_INSN_REG_SET_RN (insn, i);
 169                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 170                         ARM_INSN_REG_SET_RD (insn, i);
 171                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 172                         ARM_INSN_REG_SET_RS (insn, i);
 173                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 174                         ARM_INSN_REG_SET_RM (insn, i);
 175         }
 176         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 177         // set register to restore
 178         ARM_INSN_REG_SET_RD (insns[3], i);
 179         return 0;
 180 }
 181
 182
 183
 184 int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 185 {
 186         unsigned char mreg = 0;
 187         unsigned char reg = 0;
 188
 189
 190         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 191         {
 192                 reg = ((insn & 0xffff) & uregs) >> 8;
 193         }else{
 194                 if (THUMB_INSN_MATCH (MOV3, insn))
 195                 {
 196                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 197                                 reg = (insn & 0xffff) & uregs;
 198                         else
 199                                 return 0;
 200                 }else{
 201                         if (THUMB2_INSN_MATCH (ADR, insn))
 202                         {
 203                                 reg = ((insn >> 16) & uregs) >> 8;
 204                                 if (reg == 15) return 0;
 205                         }else{
 206                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 207                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 208                                     THUMB2_INSN_MATCH (LDRWL, insn))
 209                                 {
 210                                         reg = ((insn >> 16) & uregs) >> 12;
 211                                         if (reg == 15) return 0;
 212                                 }else{
 213 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 214                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 215                                         {
 216                                                 reg = ((insn >> 16) & uregs) >> 12;
 217                                         }else{
 218                                                 if (THUMB2_INSN_MATCH (DP, insn))
 219                                                 {
 220                                                         reg = ((insn >> 16) & uregs) >> 12;
 221                                                         if (reg == 15) return 0;
 222                                                 }else{
 223                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 224                                                         {
 225                                                                 reg = ((insn >> 12) & uregs) >> 8;
 226                                                                 if (reg == 15) return 0;
 227                                                         }else{
 228                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 229                                                                 {
 230                                                                         reg = ((insn >> 12) & uregs) >> 8;
 231                                                                         if (reg == 15) return 0;
 232                                                                 }else{
 233                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 234                                                                         {
 235                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 236                                                                                 if (reg == 15) return 0;
 237                                                                         }else{
 238                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 239                                                                                 {
 240                                                                                         reg = 15;
 241                                                                                 }else{
 242                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 243                                                                                         {
 244                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 245                                                                                         }
 246                                                                                 }
 247                                                                         }
 248                                                                 }
 249                                                         }
 250                                                 }
 251                                         }
 252                                 }
 253                         }
 254                 }
 255         }
 256
 257         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 258                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 259                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 260         {
 261                 reg = THUMB2_INSN_REG_RT(insn);
 262         }
 263
 264         if (reg == 6 || reg == 7)
 265         {
 266                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 267                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 268                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 269                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 270                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 271                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 272                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 273                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 274         }
 275
 276
 277         if (THUMB_INSN_MATCH (APC, insn))
 278         {
 279 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 280                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 281         }else{
 282                 if (THUMB_INSN_MATCH (LRO3, insn))
 283                 {
 284 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 285                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 286                 }else{
 287                         if (THUMB_INSN_MATCH (MOV3, insn))
 288                         {
 289 //                              MOV Rd, PC -> MOV Rd, SP
 290                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 291                         }else{
 292                                 if (THUMB2_INSN_MATCH (ADR, insn))
 293                                 {
 294 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 295                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 296                                 }else{
 297                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 298                                             THUMB2_INSN_MATCH (LDRHW, insn))
 299                                         {
 300 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 301 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 302 //                                              !!! imm_12 vs. imm_8 !!!
 303 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 304                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 305                                         }else{
 306                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 307                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 308                                                     THUMB2_INSN_MATCH (LDREX, insn))
 309                                                 {
 310 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 311                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 312                                                 }else{
 313                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 314                                                         {
 315                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 316                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 317                                                                 {
 318                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 319                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 320                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 321                                                                         {
 322 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 323                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 324                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 325                                                                                 {
 326                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 327                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 328                                                                                         {
 329                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 330                                                                                                 {
 331                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 332                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 333                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 334                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 335                                                                                                 {
 336                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 337                                                                                                 }
 338                                                                                         }
 339                                                                                 }
 340                                                                         }
 341                                                                 }
 342                                                         }
 343                                                 }
 344                                         }
 345                                 }
 346                         }
 347                 }
 348         }
 349
 350         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 351         {
 352                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 353         }else{
 354                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 355                 {
 356                         if (THUMB2_INSN_REG_RN(insn) == 15)
 357                         {
 358                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 359                         }else{
 360                                 insns[2] = insn;
 361                         }
 362                 }else{
 363                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 364                         {
 365                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 366                                 {
 367                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 368                                 }else{
 369                                         insns[2] = insn;
 370                                 }
 371                         }
 372                 }
 373         }
 374
 375 //       STRx PC, xxx
 376         if ((reg == 15) && THUMB2_INSN_MATCH (STRW, insn)   || \
 377                            THUMB2_INSN_MATCH (STRBW, insn)  || \
 378                            THUMB2_INSN_MATCH (STRD, insn)   || \
 379                            THUMB2_INSN_MATCH (STRHT, insn)  || \
 380                            THUMB2_INSN_MATCH (STRT, insn)   || \
 381                            THUMB2_INSN_MATCH (STRHW1, insn) || \
 382                            THUMB2_INSN_MATCH (STRHW, insn) )
 383         {
 384                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 385         }
 386
 387
 388
 389         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 390         {
 391                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 392         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 393                 {
 394                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 395                         {
 396                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 397                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 398                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 399                 }
 400         }
 401
 402         return 0;
 403 }
 404
 405
 406
 407 int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 408 {
 409         int ret = 0;
 410         kprobe_opcode_t *insn;
 411
 412         // check instructions that can change PC by nature
 413         if (    ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 414                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 415                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 416                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 417                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 418                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 419                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 420                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 421                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 422         {
 423                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 424                 ret = -EFAULT;
 425         }
 426 #ifndef CONFIG_CPU_V7
 427         // check instructions that can write result to PC
 428         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 429                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 430                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 431                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 432                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 433                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 434         {
 435                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 436                 ret = -EFAULT;
 437         }
 438 #endif // CONFIG_CPU_V7
 439         // check special instruction loads store multiple registers
 440         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 441                         // store pc or load to pc
 442                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 443                          // store/load with pc update
 444                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 445         {
 446                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 447                 ret = -EFAULT;
 448         }
 449         return ret;
 450 }
 451
 452 int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 453 {
 454         int ret = 0;
 455
 456         // check instructions that can change PC
 457         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 458                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 459                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 460                 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
 461                 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 462                 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 463                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 464                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 465                 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
 466                 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
 467                 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
 468                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 469                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 470                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 471                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 472                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 473                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 474                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 475                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 476                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 477                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 478                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 479                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 480                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 481                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 482                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 483                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 484                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 485 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 486                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 487                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 488                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 489                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 490                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 491                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 492                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 493                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 494 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 495                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 496         {
 497                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 498                 ret = -EFAULT;
 499         }
 500
 501         return ret;
 502 }
 503
 504 int arch_prepare_kretprobe (struct kretprobe *p)
 505 {
 506         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 507         return 0;
 508 }
 509
 510 int arch_prepare_kprobe (struct kprobe *p)
 511 {
 512         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 513         int uregs, pc_dep, ret = 0;
 514     kprobe_opcode_t insn[MAX_INSN_SIZE];
 515     struct arch_specific_insn ainsn;
 516
 517     /* insn: must be on special executable page on i386. */
 518     p->ainsn.insn = get_insn_slot (NULL, 0);
 519     if (!p->ainsn.insn)
 520         return -ENOMEM;
 521
 522     memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 523     ainsn.insn_arm = ainsn.insn = insn;
 524     ret = arch_check_insn_arm (&ainsn);
 525     if (!ret)
 526     {
 527         p->opcode = *p->addr;
 528         p->ainsn.boostable = 1;
 529         uregs = pc_dep = 0;
 530
 531         // Rn, Rm ,Rd
 532         if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 533            ARM_INSN_MATCH (SRO, insn[0]))
 534         {
 535             uregs = 0xb;
 536             if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 537                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
 538             {
 539                 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 540                 pc_dep = 1;
 541             }
 542         }
 543         // Rn ,Rd
 544         else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 545                 ARM_INSN_MATCH (SIO, insn[0]))
 546         {
 547             uregs = 0x3;
 548             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 549                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 550             {
 551                 pc_dep = 1;
 552                 DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
 553             }
 554         }
 555         // Rn, Rm, Rs
 556         else if(ARM_INSN_MATCH (DPRS, insn[0]))
 557         {
 558             uregs = 0xd;
 559             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 560                 (ARM_INSN_REG_RS (insn[0]) == 15))
 561             {
 562                 pc_dep = 1;
 563                 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 564             }
 565         }
 566         // register list
 567         else if(ARM_INSN_MATCH (SM, insn[0]))
 568         {
 569             uregs = 0x10;
 570             if (ARM_INSN_REG_MR (insn[0], 15))
 571             {
 572                 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 573                 pc_dep = 1;
 574             }
 575         }
 576         // check instructions that can write result to SP andu uses PC
 577         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 578         {
 579             free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 580             ret = -EFAULT;
 581         }
 582         else
 583         {
 584             if (uregs && pc_dep)
 585             {
 586                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 587                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 588                 {
 589                     DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 590                     free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 591                     return -EINVAL;
 592                 }
 593                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 594             }
 595             else
 596             {
 597                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 598                 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 599             }
 600             insns[7] = (kprobe_opcode_t) (p->addr + 1);
 601             DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 602             DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 603                     p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 604                     insns[5], insns[6], insns[7], insns[8]);
 605             memcpy (p->ainsn.insn, insns, sizeof(insns));
 606             flush_icache_range(p->ainsn.insn, p->ainsn.insn + sizeof(insns));
 607 #ifdef BOARD_tegra
 608             flush_cache_all();
 609 #endif
 610         }
 611     }
 612     else
 613     {
 614         free_insn_slot (&kprobe_insn_pages, NULL, p->ainsn.insn, 0);
 615     }
 616
 617         return ret;
 618 }
 619
 620 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 621 {
 622         kprobe_opcode_t insn;
 623         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 624
 625         insn = bpi >> 2;
 626         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 627         if (abs (insn & 0xffffff) > 0xffffff)
 628         {
 629                 DBPRINTF ("ERROR: kprobe address out of range\n");
 630                 BUG ();
 631         }
 632         insn = insn & 0xffffff;
 633         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 634         DBPRINTF ("insn=%lX\n", insn);
 635         return (unsigned int) insn;
 636 }
 637
 638
 639 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 640 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 641
 642 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 643 {
 644         int ret = 0;
 645         kprobe_opcode_t insn[MAX_INSN_SIZE];
 646
 647         if ((unsigned long) p->addr & 0x01)
 648         {
 649                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 650                 return -EINVAL;
 651         }
 652         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 653                 panic ("Failed to read memory %p!\n", p->addr);
 654         p->opcode = insn[0];
 655         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 656         if (!p->ainsn.insn_arm) {
 657                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 658                 return -ENOMEM;
 659         }
 660         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 661         if (ret) {
 662                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 663                 return -EFAULT;
 664         }
 665         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 666         if (!p->ainsn.insn_thumb) {
 667                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 668                 return -ENOMEM;
 669         }
 670         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 671         if (ret) {
 672                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 673                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 674                 return -EFAULT;
 675         }
 676         if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
 677                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both)\n", __FILE__, __LINE__);
 678                 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
 679                         panic ("Failed to write memory %p!\n", p->addr);
 680                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 681                 free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 682                 return -EFAULT;
 683         }
 684         p->ainsn.boostable = 1;
 685         return ret;
 686 }
 687
 688 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 689 {
 690         DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
 691         return 0;
 692 }
 693
 694 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 695 {
 696         if(p->ss_addr)
 697         {
 698                 regs->uregs[15] = (unsigned long) p->ss_addr;
 699                 p->ss_addr = NULL;
 700         }
 701         else
 702                 regs->uregs[15] = (unsigned long) p->ainsn.insn;
 703 }
 704
 705 void save_previous_kprobe (struct kprobe_ctlblk *kcb, struct kprobe *cur_p)
 706 {
 707         if (kcb->prev_kprobe.kp != NULL)
 708         {
 709                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 710         }
 711
 712         kcb->prev_kprobe.kp = kprobe_running ();
 713         kcb->prev_kprobe.status = kcb->kprobe_status;
 714 }
 715
 716 void restore_previous_kprobe (struct kprobe_ctlblk *kcb)
 717 {
 718         __get_cpu_var (current_kprobe) = kcb->prev_kprobe.kp;
 719         kcb->kprobe_status = kcb->prev_kprobe.status;
 720         kcb->prev_kprobe.kp = NULL;
 721         kcb->prev_kprobe.status = 0;
 722 }
 723
 724 void set_current_kprobe (struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 725 {
 726         __get_cpu_var (current_kprobe) = p;
 727         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 728 }
 729
 730 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 731 {
 732         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 733         int uregs, pc_dep;
 734         kprobe_opcode_t insn[MAX_INSN_SIZE];
 735         struct arch_specific_insn ainsn;
 736
 737         p->safe_arm = -1;
 738         if ((unsigned long) p->addr & 0x01)
 739         {
 740                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 741                 return -EINVAL;
 742         }
 743         insn[0] = p->opcode;
 744         ainsn.insn_arm = insn;
 745         if (!arch_check_insn_arm(&ainsn))
 746         {
 747                 p->safe_arm = 0;
 748         }
 749         uregs = pc_dep = 0;
 750         // Rn, Rm ,Rd
 751         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 752                         ARM_INSN_MATCH (SRO, insn[0]))
 753         {
 754                 uregs = 0xb;
 755                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 756                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 757                 {
 758                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 759                         pc_dep = 1;
 760                 }
 761         }
 762         // Rn ,Rd
 763         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 764                         ARM_INSN_MATCH (SIO, insn[0]))
 765         {
 766                 uregs = 0x3;
 767                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 768                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 769                 {
 770                         pc_dep = 1;
 771                         DBPRINTF ("Unboostable insn %lx/%p/%d, DPI/LIO/SIO\n", insn[0], p, p->ainsn.boostable);
 772                 }
 773         }
 774         // Rn, Rm, Rs
 775         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 776         {
 777                 uregs = 0xd;
 778                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 779                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 780                 {
 781                         pc_dep = 1;
 782                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 783                 }
 784         }
 785         // register list
 786         else if (ARM_INSN_MATCH (SM, insn[0]))
 787         {
 788                 uregs = 0x10;
 789                 if (ARM_INSN_REG_MR (insn[0], 15))
 790                 {
 791                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 792                         pc_dep = 1;
 793                 }
 794         }
 795         // check instructions that can write result to SP andu uses PC
 796         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 797         {
 798                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 799                 p->safe_arm = -1;
 800                 // TODO: move free to later phase
 801                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 802                 //ret = -EFAULT;
 803         }
 804         if (unlikely(uregs && pc_dep))
 805         {
 806                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 807                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 808                 {
 809                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 810                                 insn[0], __FILE__, __LINE__);
 811                         p->safe_arm = -1;
 812                         // TODO: move free to later phase
 813                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 814                         //return -EINVAL;
 815                 }
 816                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 817                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 818         }
 819         else
 820         {
 821                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 822                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 823         }
 824         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 825         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 826
 827         // B
 828         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
 829         {
 830                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 831                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 832                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 833                 insns[7] = get_addr_b(p->opcode, p->addr);
 834         }
 835
 836         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 837                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 838                         insns[5], insns[6], insns[7], insns[8]);
 839         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 840         {
 841                 panic("failed to write memory %p!\n", p->ainsn.insn);
 842                 // Mr_Nobody: we have to panic, really??...
 843                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 844                 //return -EINVAL;
 845         }
 846         return 0;
 847 }
 848
 849 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 850 {
 851         int uregs, pc_dep;
 852         unsigned int addr;
 853         kprobe_opcode_t insn[MAX_INSN_SIZE];
 854         struct arch_specific_insn ainsn;
 855         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 856
 857         p->safe_thumb = -1;
 858         if ((unsigned long) p->addr & 0x01)
 859         {
 860                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 861                 return -EINVAL;
 862         }
 863         insn[0] = p->opcode;
 864         ainsn.insn_thumb = insn;
 865         if (!arch_check_insn_thumb(&ainsn))
 866         {
 867                 p->safe_thumb = 0;
 868         }
 869         uregs = 0;
 870         pc_dep = 0;
 871         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 872         {
 873                 uregs = 0x0700;         // 8-10
 874                 pc_dep = 1;
 875         }
 876         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 877         {
 878                 // MOV Rd, PC
 879                 uregs = 0x07;
 880                 pc_dep = 1;
 881         }
 882         else if THUMB2_INSN_MATCH (ADR, insn[0])
 883         {
 884                 uregs = 0x0f00;         // Rd 8-11
 885                 pc_dep = 1;
 886         }
 887         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 888                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 889                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 890                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 891                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 892                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 893                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 894                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 895                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 896                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 897         {
 898                 uregs = 0xf000;         // Rt 12-15
 899                 pc_dep = 1;
 900         }
 901         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 902         {
 903                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 904                 pc_dep = 1;
 905         }
 906         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 907         {
 908                 uregs = 0xf;
 909                 pc_dep = 1;
 910         }
 911         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 912         {
 913                 uregs = 0xf000; // Rd 12-15
 914                 pc_dep = 1;
 915         }
 916         else if (THUMB2_INSN_MATCH (STRD, insn[0]) && (THUMB2_INSN_REG_RN(insn[0] == 15) || THUMB2_INSN_REG_RT(insn[0] == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 917         {
 918                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 919                 pc_dep = 1;
 920         }
 921         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 922         {
 923                 uregs = 0x0f00; // Rd 8-11
 924                 pc_dep = 1;
 925         }
 926         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 927         {
 928                 uregs = 0x0f00;
 929                 pc_dep = 1;
 930         }
 931         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 932         {
 933                 uregs = 0x0f00; // Rd 8-11
 934                 pc_dep = 1;
 935         }
 936         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 937         {
 938                 uregs = 0x0f00; // Rd 8-11
 939                 pc_dep = 1;
 940         }
 941         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 942         {
 943                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 944                 pc_dep = 1;
 945         }
 946         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 947                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 948         {
 949                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 950                 pc_dep = 1;
 951         }
 952         if (unlikely(uregs && pc_dep))
 953         {
 954                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 955                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 956                 {
 957                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 958                                 insn[0], __FILE__, __LINE__);
 959                         p->safe_thumb = -1;
 960                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 961                         //return -EINVAL;
 962                 }
 963                 addr = ((unsigned int)p->addr) + 4;
 964                 *((unsigned short*)insns + 13) = 0xdeff;
 965                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 966                 *((unsigned short*)insns + 15) = addr >> 16;
 967                 if (!isThumb2(insn[0]))
 968                 {
 969                         addr = ((unsigned int)p->addr) + 2;
 970                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 971                         *((unsigned short*)insns + 17) = addr >> 16;
 972                 }
 973                 else {
 974                         addr = ((unsigned int)p->addr) + 4;
 975                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 976                         *((unsigned short*)insns + 17) = addr >> 16;
 977                 }
 978         }
 979         else {
 980                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
 981                 *((unsigned short*)insns + 13) = 0xdeff;
 982                 if (!isThumb2(insn[0]))
 983                 {
 984                         addr = ((unsigned int)p->addr) + 2;
 985                         *((unsigned short*)insns + 2) = insn[0];
 986                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 987                         *((unsigned short*)insns + 17) = addr >> 16;
 988                 }
 989                 else {
 990                         addr = ((unsigned int)p->addr) + 4;
 991                         insns[1] = insn[0];
 992                         *((unsigned short*)insns + 16) = addr & 0x0000ffff | 0x1;
 993                         *((unsigned short*)insns + 17) = addr >> 16;
 994                 }
 995         }
 996         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
 997         {
 998                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
 999                 // Mr_Nobody: we have to panic, really??...
1000                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1001                 //return -EINVAL;
1002         }
1003         return 0;
1004 }
1005
1006
1007 int kprobe_handler (struct pt_regs *regs)
1008 {
1009         struct kprobe *p = 0;
1010         int ret = 0, pid = 0, retprobe = 0, reenter = 0;
1011         kprobe_opcode_t *addr = NULL, *ssaddr = 0;
1012         struct kprobe_ctlblk *kcb;
1013         int i = 0;
1014 #ifdef OVERHEAD_DEBUG
1015         struct timeval swap_tv1;
1016         struct timeval swap_tv2;
1017 #endif
1018 #ifdef SUPRESS_BUG_MESSAGES
1019         int swap_oops_in_progress;
1020 #endif
1021         struct hlist_head *head;
1022         struct hlist_node *node;
1023         struct kprobe *pop, *retVal = NULL;
1024         struct kprobe *kp;
1025
1026 #ifdef SUPRESS_BUG_MESSAGES
1027         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1028         swap_oops_in_progress = oops_in_progress;
1029         oops_in_progress = 1;
1030 #endif
1031 #ifdef OVERHEAD_DEBUG
1032 #define USEC_IN_SEC_NUM                         1000000
1033         do_gettimeofday(&swap_tv1);
1034 #endif
1035         preempt_disable();
1036         addr = (kprobe_opcode_t *) (regs->uregs[15]);
1037         if (user_mode(regs))
1038         {
1039                 head = &kprobe_table[hash_ptr (addr, KPROBE_HASH_BITS)];
1040                 hlist_for_each_entry_rcu (pop, node, head, hlist) {
1041                         /*
1042                          * Searching occurred probe by
1043                          * instruction address and task_struct
1044                          */
1045                         if (pop->addr == addr) {
1046                                 if (pop->tgid == current->tgid) {
1047                                     retVal = pop;
1048                                     break;
1049                                 }
1050                         }
1051                 }
1052         }
1053         if (retVal) {
1054                 if (unlikely(thumb_mode(regs))) {
1055                         if (pop->safe_thumb != -1) {
1056                                 pop->ainsn.insn = pop->ainsn.insn_thumb;
1057                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1058                                         kp->ainsn.insn = pop->ainsn.insn_thumb;
1059                                 }
1060                         }
1061                         else {
1062                                 printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1063                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->opcode, pop->addr);
1064                                 // Test case when we do our actions on already running application
1065                                 arch_disarm_uprobe (pop, current);
1066                                 goto no_kprobe_live;
1067                         }
1068                 }
1069                 else {
1070                         if (pop->safe_arm != -1) {
1071                                 pop->ainsn.insn = pop->ainsn.insn_arm;
1072                                 list_for_each_entry_rcu (kp, &pop->list, list) {
1073                                         kp->ainsn.insn = pop->ainsn.insn_arm;
1074                                 }
1075                         }
1076                         else {
1077                                 printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1078                                         (%0X instruction at %p address)!\n", __FILE__, __LINE__, pop->opcode, pop->addr );
1079                                 // Test case when we do our actions on already running application
1080                                 arch_disarm_uprobe (pop, current);
1081                                 goto no_kprobe_live;
1082                         }
1083                 }
1084         }
1085         /* We're in an interrupt, but this is clear and BUG()-safe. */
1086         kcb = get_kprobe_ctlblk ();
1087         if (user_mode (regs))
1088         {
1089                 //DBPRINTF("exception[%lu] from user mode %s/%u addr %p (%lx).", nCount, current->comm, current->pid, addr, regs->uregs[14]);
1090                 pid = current->tgid;
1091         }
1092         /* Check we're not actually recursing */
1093         if (kprobe_running ())
1094         {
1095                 DBPRINTF ("lock???");
1096                 p = get_kprobe (addr, pid, current);
1097                 if (p)
1098                 {
1099                         if(!pid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)){
1100                                 save_previous_kprobe (kcb, p);
1101                                 kcb->kprobe_status = KPROBE_REENTER;
1102                                 reenter = 1;
1103                         }
1104                         else {
1105                                 /* We have reentered the kprobe_handler(), since
1106                                  * another probe was hit while within the handler.
1107                                  * We here save the original kprobes variables and
1108                                  * just single step on the instruction of the new probe
1109                                  * without calling any user handlers.
1110                                  */
1111                                 if(!p->ainsn.boostable){
1112                                         save_previous_kprobe (kcb, p);
1113                                         set_current_kprobe (p, regs, kcb);
1114                                 }
1115                                 kprobes_inc_nmissed_count (p);
1116                                 prepare_singlestep (p, regs);
1117                                 if(!p->ainsn.boostable)
1118                                         kcb->kprobe_status = KPROBE_REENTER;
1119                                 preempt_enable_no_resched ();
1120 #ifdef OVERHEAD_DEBUG
1121                                 do_gettimeofday(&swap_tv2);
1122                                 swap_sum_hit++;
1123                                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1124                                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1125 #endif
1126 #ifdef SUPRESS_BUG_MESSAGES
1127                                 oops_in_progress = swap_oops_in_progress;
1128 #endif
1129                                 return 0;
1130                         }
1131                 }
1132                 else
1133                 {
1134                         if(pid) { //we can reenter probe upon uretprobe exception
1135                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1136                                 // UNDEF_INSTRUCTION from user space
1137
1138                                 if (!thumb_mode ( regs ))
1139                                         p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1140                                 else
1141                                         p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1142
1143                                 if (p) {
1144                                         save_previous_kprobe (kcb, p);
1145                                         kcb->kprobe_status = KPROBE_REENTER;
1146                                         reenter = 1;
1147                                         retprobe = 1;
1148                                         DBPRINTF ("uretprobe %p\n", addr);
1149                                 }
1150                         }
1151                         if(!p) {
1152                                 p = __get_cpu_var (current_kprobe);
1153                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1154                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1155                                   DBPRINTF("kprobe_running !!! goto ss");
1156                                   goto ss_probe;
1157                                   } */
1158                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1159                                 if(pid)
1160                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1161                                 else
1162                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1163                                 if (addr == ssaddr)
1164                                 {
1165                                         regs->uregs[15] = (unsigned long) (p->addr + 1);
1166                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->uregs[15]);
1167                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1168                                                 restore_previous_kprobe (kcb);
1169                                         }
1170                                         else {
1171                                                 reset_current_kprobe ();
1172                                         }
1173                                 }
1174                                 DBPRINTF ("kprobe_running !!! goto no");
1175                                 ret = 1;
1176                                 /* If it's not ours, can't be delete race, (we hold lock). */
1177                                 DBPRINTF ("no_kprobe");
1178                                 goto no_kprobe;
1179                         }
1180                 }
1181         }
1182         if (!p)
1183         {
1184                 p = get_kprobe (addr, pid, current);
1185         }
1186         if (!p)
1187         {
1188                 if(pid) {
1189                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1190                         // UNDEF_INSTRUCTION from user space
1191
1192                         if (!thumb_mode ( regs ))
1193                                 p = get_kprobe_by_insn_slot_arm (addr-UPROBES_TRAMP_RET_BREAK_IDX, pid, current);
1194                         else
1195                                 p = get_kprobe_by_insn_slot_thumb ((unsigned long)addr - 0x1a, pid, current);
1196
1197                         if (!p) {
1198                                 /* Not one of ours: let kernel handle it */
1199                                 DBPRINTF ("no_kprobe");
1200                                 goto no_kprobe;
1201                         }
1202                         retprobe = 1;
1203                         DBPRINTF ("uretprobe %p\n", addr);
1204                 }
1205                 else {
1206                         /* Not one of ours: let kernel handle it */
1207                         DBPRINTF ("no_kprobe");
1208                         goto no_kprobe;
1209                 }
1210         }
1211         // restore opcode for thumb app
1212         if (user_mode( regs ) && thumb_mode( regs ))
1213         {
1214                 if (!isThumb2(p->opcode))
1215                 {
1216                         unsigned long tmp = p->opcode >> 16;
1217                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1218                 }else{
1219                         unsigned long tmp = p->opcode;
1220                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr), &tmp, 4);
1221                 }
1222                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1223         }
1224         set_current_kprobe (p, regs, kcb);
1225         if(!reenter)
1226                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1227         if (retprobe)           //(einsn == UNDEF_INSTRUCTION)
1228                 ret = trampoline_probe_handler (p, regs);
1229         else if (p->pre_handler)
1230         {
1231                 ret = p->pre_handler (p, regs);
1232                 if(!p->ainsn.boostable)
1233                         kcb->kprobe_status = KPROBE_HIT_SS;
1234                 else if(p->pre_handler != trampoline_probe_handler) {
1235 #ifdef SUPRESS_BUG_MESSAGES
1236                         preempt_disable();
1237 #endif
1238                         reset_current_kprobe();
1239 #ifdef SUPRESS_BUG_MESSAGES
1240                         preempt_enable_no_resched();
1241 #endif
1242                 }
1243         }
1244         if (ret)
1245         {
1246                 DBPRINTF ("p->pre_handler 1");
1247                 /* handler has already set things up, so skip ss setup */
1248 #ifdef OVERHEAD_DEBUG
1249                 do_gettimeofday(&swap_tv2);
1250                 swap_sum_hit++;
1251                 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1252                         (swap_tv2.tv_usec - swap_tv1.tv_usec));
1253 #endif
1254 #ifdef SUPRESS_BUG_MESSAGES
1255                 oops_in_progress = swap_oops_in_progress;
1256 #endif
1257                 return 0;
1258         }
1259         DBPRINTF ("p->pre_handler 0");
1260
1261 no_kprobe:
1262         preempt_enable_no_resched ();
1263 #ifdef OVERHEAD_DEBUG
1264         do_gettimeofday(&swap_tv2);
1265         swap_sum_hit++;
1266         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1267                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1268 #endif
1269 #ifdef SUPRESS_BUG_MESSAGES
1270         oops_in_progress = swap_oops_in_progress;
1271 #endif
1272         printk("no_kprobe\n");
1273         return 1;               // return with death
1274 no_kprobe_live:
1275         preempt_enable_no_resched ();
1276 #ifdef OVERHEAD_DEBUG
1277         do_gettimeofday(&swap_tv2);
1278         swap_sum_hit++;
1279         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1280                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1281 #endif
1282 #ifdef SUPRESS_BUG_MESSAGES
1283         oops_in_progress = swap_oops_in_progress;
1284 #endif
1285         printk("no_kprobe live\n");
1286         return 0;               // ok - life is life
1287 }
1288
1289 void patch_suspended_task_ret_addr(struct task_struct *p, struct kretprobe *rp)
1290 {
1291         struct kretprobe_instance *ri = NULL;
1292         struct hlist_node *node, *tmp;
1293         struct hlist_head *head;
1294         unsigned long flags;
1295         int found = 0;
1296
1297         spin_lock_irqsave (&kretprobe_lock, flags);
1298         head = kretprobe_inst_table_head (p);
1299         hlist_for_each_entry_safe (ri, node, tmp, head, hlist){
1300                 if ((ri->rp == rp) && (p == ri->task)){
1301                         found = 1;
1302                         break;
1303                 }
1304         }
1305         spin_unlock_irqrestore (&kretprobe_lock, flags);
1306
1307 #ifndef task_thread_info
1308 #define task_thread_info(task) (task)->thread_info
1309 #endif // task_thread_info
1310
1311         if (found){
1312                 // update PC
1313                 if(thread_saved_pc(p) != (unsigned long)&kretprobe_trampoline){
1314                         ri->ret_addr = (kprobe_opcode_t *)thread_saved_pc(p);
1315                         task_thread_info(p)->cpu_context.pc = (unsigned long) &kretprobe_trampoline;
1316                 }
1317                 return;
1318         }
1319
1320         spin_lock_irqsave (&kretprobe_lock, flags);
1321         if ((ri = get_free_rp_inst(rp)) != NULL)
1322         {
1323                 ri->rp = rp;
1324                 ri->rp2 = NULL;
1325                 ri->task = p;
1326                 ri->ret_addr = (kprobe_opcode_t *)thread_saved_pc(p);
1327                 task_thread_info(p)->cpu_context.pc = (unsigned long) &kretprobe_trampoline;
1328                 add_rp_inst (ri);
1329                 //              printk("change2 saved pc %p->%p for %d/%d/%p\n", ri->ret_addr, &kretprobe_trampoline, p->tgid, p->pid, p);
1330         }
1331         else{
1332                 printk("no ri for %d\n", p->pid);
1333                 BUG();
1334         }
1335         spin_unlock_irqrestore (&kretprobe_lock, flags);
1336 }
1337
1338 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1339 {
1340         struct jprobe *jp = container_of (p, struct jprobe, kp);
1341         kprobe_pre_entry_handler_t pre_entry;
1342         entry_point_t entry;
1343
1344 # ifdef REENTER
1345         p = __get_cpu_var (current_kprobe);
1346 # endif
1347
1348         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1349         entry = (entry_point_t) jp->entry;
1350         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1351         //if(!entry)
1352         //      DIE("entry NULL", regs)
1353         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1354
1355         //call handler for all kernel probes and user space ones which belong to current tgid
1356         if (!p->tgid || (p->tgid == current->tgid))
1357         {
1358                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp){
1359                         struct task_struct *p, *g;
1360                         rcu_read_lock();
1361                         //swapper task
1362                         if(current != &init_task)
1363                                 patch_suspended_task_ret_addr(&init_task, sched_rp);
1364                         // other tasks
1365                         do_each_thread(g, p){
1366                                 if(p == current)
1367                                         continue;
1368                                 patch_suspended_task_ret_addr(p, sched_rp);
1369                         } while_each_thread(g, p);
1370                         rcu_read_unlock();
1371                 }
1372                 if (pre_entry)
1373                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1374                 if (entry){
1375                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1376                 }
1377                 else {
1378                         if (p->tgid)
1379                                 dbi_arch_uprobe_return ();
1380                         else
1381                                 dbi_jprobe_return ();
1382                 }
1383         }
1384         else if (p->tgid)
1385                 dbi_arch_uprobe_return ();
1386
1387         prepare_singlestep (p, regs);
1388
1389         return 1;
1390 }
1391
1392 void dbi_jprobe_return (void)
1393 {
1394         preempt_enable_no_resched();
1395 }
1396
1397 void dbi_arch_uprobe_return (void)
1398 {
1399         preempt_enable_no_resched();
1400 }
1401
1402 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1403 {
1404 # ifndef REENTER
1405         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1406         kprobe_opcode_t insns[2];
1407
1408         if (p->pid)
1409         {
1410                 insns[0] = BREAKPOINT_INSTRUCTION;
1411                 insns[1] = p->opcode;
1412                 //p->opcode = *p->addr;
1413                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1414                 {
1415                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1416                         return -1;
1417                 }
1418                 //*p->addr = BREAKPOINT_INSTRUCTION;
1419                 //*(p->addr+1) = p->opcode;
1420                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1421                 {
1422                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1423                         return -1;
1424                 }
1425         }
1426         else
1427         {
1428                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1429                 *(p->addr + 1) = p->opcode;
1430                 p->opcode = *p->addr;
1431                 *p->addr = BREAKPOINT_INSTRUCTION;
1432
1433                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1434         }
1435
1436         reset_current_kprobe ();
1437
1438 #endif //REENTER
1439
1440         return 0;
1441 }
1442
1443
1444 void arch_arm_kprobe (struct kprobe *p)
1445 {
1446         *p->addr = BREAKPOINT_INSTRUCTION;
1447         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1448 }
1449
1450 void arch_disarm_kprobe (struct kprobe *p)
1451 {
1452         *p->addr = p->opcode;
1453         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1454 }
1455
1456
1457 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1458 {
1459         struct kretprobe_instance *ri = NULL;
1460         struct hlist_head *head, empty_rp;
1461         struct hlist_node *node, *tmp;
1462         unsigned long flags, orig_ret_address = 0;
1463         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1464
1465         struct kretprobe *crp = NULL;
1466         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1467
1468         DBPRINTF ("start");
1469
1470         if (p && p->tgid){
1471                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1472                 if (!thumb_mode( regs ))
1473                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1474                 else
1475                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1476         }
1477
1478         INIT_HLIST_HEAD (&empty_rp);
1479         spin_lock_irqsave (&kretprobe_lock, flags);
1480
1481         /*
1482          * We are using different hash keys (current and mm) for finding kernel
1483          * space and user space probes.  Kernel space probes can change mm field in
1484          * task_struct.  User space probes can be shared between threads of one
1485          * process so they have different current but same mm.
1486          */
1487         if (p && p->tgid) {
1488                 head = kretprobe_inst_table_head(current->mm);
1489         } else {
1490                 head = kretprobe_inst_table_head(current);
1491         }
1492
1493         /*
1494          * It is possible to have multiple instances associated with a given
1495          * task either because an multiple functions in the call path
1496          * have a return probe installed on them, and/or more then one
1497          * return probe was registered for a target function.
1498          *
1499          * We can handle this because:
1500          *     - instances are always inserted at the head of the list
1501          *     - when multiple return probes are registered for the same
1502          *       function, the first instance's ret_addr will point to the
1503          *       real return address, and all the rest will point to
1504          *       kretprobe_trampoline
1505          */
1506         hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1507         {
1508                 if (ri->task != current)
1509                         /* another task is sharing our hash bucket */
1510                         continue;
1511                 if (ri->rp && ri->rp->handler){
1512                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1513                 }
1514
1515                 orig_ret_address = (unsigned long) ri->ret_addr;
1516                 recycle_rp_inst (ri, &empty_rp);
1517                 if (orig_ret_address != trampoline_address)
1518                         /*
1519                          * This is the real return address. Any other
1520                          * instances associated with this task are for
1521                          * other calls deeper on the call stack
1522                          */
1523                         break;
1524         }
1525         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1526         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1527         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1528         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1529         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1530         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1531         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1532         //}
1533         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1534                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1535
1536         regs->uregs[14] = orig_ret_address;
1537         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1538         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1539
1540         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1541         {
1542                 regs->uregs[15] = orig_ret_address;
1543         }else{
1544                 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1545                 else regs->uregs[15] += 2;
1546         }
1547
1548         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1549
1550         if(p){ // ARM, MIPS, X86 user space
1551                 if (kcb->kprobe_status == KPROBE_REENTER)
1552                         restore_previous_kprobe (kcb);
1553                 else
1554                         reset_current_kprobe ();
1555
1556                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1557                 {
1558                         regs->ARM_cpsr &= 0xFFFFFFDF;
1559                 }else{
1560                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1561                         {
1562                                 regs->ARM_cpsr |= 0x20;
1563                         }
1564                 }
1565
1566                 //TODO: test - enter function, delete us retprobe, exit function
1567                 // for user space retprobes only - deferred deletion
1568
1569                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1570                 {
1571                         // if we are not at the end of the list and current retprobe should be disarmed
1572                         if (node && ri->rp2)
1573                         {
1574                                 struct hlist_node *current_node = node;
1575                                 crp = ri->rp2;
1576                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1577                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1578                                   DIE(die_msg, regs); */
1579                                 // look for other instances for the same retprobe
1580                                 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1581                                 {
1582                                         /*
1583                                          * Trying to find another retprobe instance associated with
1584                                          * the same retprobe.
1585                                          */
1586                                         if (ri->rp2 == crp && node != current_node)
1587                                                 break;
1588                                 }
1589
1590                                 if (!node)
1591                                 {       // if there are no more instances for this retprobe
1592                                         // delete retprobe
1593                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1594                                         /*
1595                                           If there is no any retprobe instances of this retprobe
1596                                           we can free the resources related to the probe.
1597                                          */
1598                                         struct kprobe *is_p = &crp->kp;
1599                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1600                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1601                                         }
1602                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1603                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1604                                         }
1605                                         unregister_uprobe (&crp->kp, current, 1);
1606                                         kfree (crp);
1607                                 }
1608                                 hlist_del(current_node);
1609                         }
1610                 }
1611         }
1612
1613         hlist_for_each_entry_safe (ri, node, tmp, &empty_rp, hlist)
1614         {
1615                 hlist_del (&ri->hlist);
1616                 kfree (ri);
1617         }
1618         spin_unlock_irqrestore (&kretprobe_lock, flags);
1619
1620         preempt_enable_no_resched ();
1621         /*
1622          * By returning a non-zero value, we are telling
1623          * kprobe_handler() that we don't want the post_handler
1624          * to run (and have re-enabled preemption)
1625          */
1626
1627         return 1;
1628 }
1629
1630 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1631 {
1632         struct kretprobe_instance *ri;
1633
1634         DBPRINTF ("start\n");
1635         //TODO: test - remove retprobe after func entry but before its exit
1636         if ((ri = get_free_rp_inst (rp)) != NULL)
1637         {
1638                 ri->rp = rp;
1639                 ri->rp2 = NULL;
1640                 ri->task = current;
1641                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1642
1643                 if (rp->kp.tgid)
1644                         if (!thumb_mode( regs ))
1645                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1646                         else
1647                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1648
1649                 else    /* Replace the return addr with trampoline addr */
1650                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1651
1652 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1653                 add_rp_inst (ri);
1654         }
1655         else {
1656                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1657                 rp->nmissed++;
1658         }
1659 }
1660
1661
1662 int asm_init_module_dependencies()
1663 {
1664         //No module dependencies
1665         return 0;
1666 }
1667
1668 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38)
1669 typedef unsigned long (* in_gate_area_fp_t)(unsigned long);
1670 in_gate_area_fp_t in_gate_area_fp;
1671 #endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38) */
1672
1673 void (* do_kpro)(struct undef_hook *);
1674 void (* undo_kpro)(struct undef_hook *);
1675
1676 // kernel probes hook
1677 struct undef_hook undef_ho_k = {
1678     .instr_mask = 0xffffffff,
1679     .instr_val  = BREAKPOINT_INSTRUCTION,
1680     .cpsr_mask  = MODE_MASK,
1681     .cpsr_val   = SVC_MODE,
1682     .fn         = kprobe_handler,
1683 };
1684
1685 // userspace probes hook (arm)
1686 struct undef_hook undef_ho_u = {
1687     .instr_mask = 0xffffffff,
1688     .instr_val  = BREAKPOINT_INSTRUCTION,
1689     .cpsr_mask  = MODE_MASK,
1690     .cpsr_val   = USR_MODE,
1691     .fn         = kprobe_handler,
1692 };
1693
1694 // userspace probes hook (thumb)
1695 struct undef_hook undef_ho_u_t = {
1696     .instr_mask = 0xffffffff,
1697     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1698     .cpsr_mask  = MODE_MASK,
1699     .cpsr_val   = USR_MODE,
1700     .fn         = kprobe_handler,
1701 };
1702
1703 int __init arch_init_kprobes (void)
1704 {
1705         unsigned int do_bp_handler = 0;
1706         int ret = 0;
1707
1708         if (arch_init_module_dependencies())
1709         {
1710                 DBPRINTF ("Unable to init module dependencies\n");
1711                 return -1;
1712         }
1713
1714 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38)
1715         in_gate_area_fp = (in_gate_area_fp_t)kallsyms_search("in_gate_area_no_mm");
1716         if (!in_gate_area_fp) {
1717                 DBPRINTF("no in_gate_area symbol found!");
1718                 return -1;
1719         }
1720 #endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38) */
1721
1722         do_bp_handler = (unsigned int) kallsyms_search ("do_undefinstr");
1723         if (do_bp_handler == 0) {
1724                 DBPRINTF("no do_undefinstr symbol found!");
1725                 return -1;
1726         }
1727         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1728         // Register hooks (kprobe_handler)
1729         do_kpro = kallsyms_search ("register_undef_hook");
1730         if (do_kpro == 0) {
1731                 printk("no register_undef_hook symbol found!\n");
1732                 return -1;
1733         }
1734         do_kpro(&undef_ho_k);
1735         do_kpro(&undef_ho_u);
1736         do_kpro(&undef_ho_u_t);
1737         if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1738                 //dbi_unregister_jprobe(&do_exit_p, 0);
1739                 return ret;
1740         }
1741         return ret;
1742 }
1743
1744 void __exit dbi_arch_exit_kprobes (void)
1745 {
1746         // Unregister hooks (kprobe_handler)
1747         undo_kpro = kallsyms_search ("unregister_undef_hook");
1748         if (undo_kpro == 0) {
1749                 printk("no unregister_undef_hook symbol found!\n");
1750                 return -1;
1751         }
1752         undo_kpro(&undef_ho_u_t);
1753         undo_kpro(&undef_ho_u);
1754         undo_kpro(&undef_ho_k);
1755 }
1756
1757 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1758 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);