2 * Dynamic Binary Instrumentation Module based on KProbes
3 * modules/kprobe/arch/asm-arm/dbi_kprobes.c
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 * Copyright (C) Samsung Electronics, 2006-2010
21 * 2006-2007 Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
22 * 2008-2009 Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
23 * Probes initial implementation; Support x86.
24 * 2010 Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
25 * 2010-2011 Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
26 * 2012 Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
27 * 2012 Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
28 * kprobe_handler() now called via undefined instruction hooks
29 * 2012 Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
32 #include <linux/module.h>
35 #include "dbi_kprobes.h"
36 #include "../dbi_kprobes.h"
37 #include "../../dbi_kprobes.h"
39 #include "../../dbi_kdebug.h"
40 #include "../../dbi_insn_slots.h"
41 #include "../../dbi_kprobes_deps.h"
42 #include "../../dbi_uprobes.h"
45 #include <asm/cacheflush.h>
47 #ifdef TRAP_OVERHEAD_DEBUG
48 #include <linux/pid.h>
49 #include <linux/signal.h>
53 #include <linux/time.h>
56 #include <asm/traps.h>
57 #include <asm/ptrace.h>
58 #include <linux/list.h>
59 #include <linux/hash.h>
61 #define SUPRESS_BUG_MESSAGES
63 extern struct kprobe * per_cpu__current_kprobe;
64 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
67 unsigned long swap_sum_time = 0;
68 unsigned long swap_sum_hit = 0;
69 EXPORT_SYMBOL_GPL (swap_sum_time);
70 EXPORT_SYMBOL_GPL (swap_sum_hit);
73 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
74 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
76 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t *addr)
78 // real position less then PC by 8
79 return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
82 static unsigned int arr_traps_template[] = {
83 0xe1a0c00d, // mov ip, sp
84 0xe92dd800, // stmdb sp!, {fp, ip, lr, pc}
85 0xe24cb004, // sub fp, ip, #4 ; 0x4
87 0xe3500000, // cmp r0, #0 ; 0x0
88 0xe89da800, // ldmia sp, {fp, sp, pc}
94 static struct kprobe trampoline_p =
96 .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
97 .pre_handler = trampoline_probe_handler
100 // is instruction Thumb2 and NOT a branch, etc...
101 static int isThumb2(kprobe_opcode_t insn)
103 if(( (insn & 0xf800) == 0xe800 ||
104 (insn & 0xf800) == 0xf000 ||
105 (insn & 0xf800) == 0xf800)) return 1;
110 static int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
118 for (i = 0; i < 13; i++, reg_mask <<= 1)
120 if (!(insn & reg_mask))
126 for (i = 0; i < 13; i++)
128 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
130 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
132 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
134 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
141 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
144 DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
146 // set register to save
147 ARM_INSN_REG_SET_RD (insns[0], i);
148 // set register to load address to
149 ARM_INSN_REG_SET_RD (insns[1], i);
150 // set instruction to execute and patch it
153 ARM_INSN_REG_CLEAR_MR (insn, 15);
154 ARM_INSN_REG_SET_MR (insn, i);
158 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
159 ARM_INSN_REG_SET_RN (insn, i);
160 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
161 ARM_INSN_REG_SET_RD (insn, i);
162 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
163 ARM_INSN_REG_SET_RS (insn, i);
164 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
165 ARM_INSN_REG_SET_RM (insn, i);
167 insns[UPROBES_TRAMP_INSN_IDX] = insn;
168 // set register to restore
169 ARM_INSN_REG_SET_RD (insns[3], i);
175 static int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
177 unsigned char mreg = 0;
178 unsigned char reg = 0;
181 if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
183 reg = ((insn & 0xffff) & uregs) >> 8;
185 if (THUMB_INSN_MATCH (MOV3, insn))
187 if (((((unsigned char) insn) & 0xff) >> 3) == 15)
188 reg = (insn & 0xffff) & uregs;
192 if (THUMB2_INSN_MATCH (ADR, insn))
194 reg = ((insn >> 16) & uregs) >> 8;
195 if (reg == 15) return 0;
197 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
198 THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
199 THUMB2_INSN_MATCH (LDRWL, insn))
201 reg = ((insn >> 16) & uregs) >> 12;
202 if (reg == 15) return 0;
204 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
205 if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
207 reg = ((insn >> 16) & uregs) >> 12;
209 if (THUMB2_INSN_MATCH (DP, insn))
211 reg = ((insn >> 16) & uregs) >> 12;
212 if (reg == 15) return 0;
214 if (THUMB2_INSN_MATCH (RSBW, insn))
216 reg = ((insn >> 12) & uregs) >> 8;
217 if (reg == 15) return 0;
219 if (THUMB2_INSN_MATCH (RORW, insn))
221 reg = ((insn >> 12) & uregs) >> 8;
222 if (reg == 15) return 0;
224 if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
226 reg = ((insn >> 12) & uregs) >> 8;
227 if (reg == 15) return 0;
229 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
233 if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
235 reg = THUMB2_INSN_REG_RM(insn);
248 if (( THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
249 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
250 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
252 reg = THUMB2_INSN_REG_RT(insn);
255 if (reg == 6 || reg == 7)
257 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
258 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
259 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
260 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
261 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
262 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
263 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
264 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
268 if (THUMB_INSN_MATCH (APC, insn))
270 // ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
271 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800); // ADD Rd, SP, #immed_8*4
273 if (THUMB_INSN_MATCH (LRO3, insn))
275 // LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
276 *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000); // LDR Rd, [SP, #immed_8*4]
278 if (THUMB_INSN_MATCH (MOV3, insn))
280 // MOV Rd, PC -> MOV Rd, SP
281 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10); // MOV Rd, SP
283 if (THUMB2_INSN_MATCH (ADR, insn))
285 // ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
286 insns[2] = (insn & 0xfffffff0) | 0x0d; // ADDW Rd, SP, #imm
288 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
289 THUMB2_INSN_MATCH (LDRHW, insn))
291 // LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
292 // !!!!!!!!!!!!!!!!!!!!!!!!
293 // !!! imm_12 vs. imm_8 !!!
294 // !!!!!!!!!!!!!!!!!!!!!!!!
295 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d; // LDR.W Rt, [SP, #-<imm_8>]
297 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
298 THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
299 THUMB2_INSN_MATCH (LDREX, insn))
301 // LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
302 insns[2] = (insn & 0xfffffff0) | 0xd; // LDRx.W Rt, [SP, #+<imm_12>]
304 if (THUMB2_INSN_MATCH (MUL, insn))
306 insns[2] = (insn & 0xfff0ffff) | 0x000d0000; // MUL Rd, Rn, SP
307 }else{ if (THUMB2_INSN_MATCH (DP, insn))
309 if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000; // DP Rd, Rn, PC
310 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd; // DP Rd, PC, Rm
311 }else{ if (THUMB2_INSN_MATCH (LDRWL, insn))
313 // LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
314 insns[2] = (insn & 0xfffffff0) | 0xd; // LDRx.W Rt, [SP, #+<imm_12>]
315 }else{ if (THUMB2_INSN_MATCH (RSBW, insn))
317 insns[2] = (insn & 0xfffffff0) | 0xd; // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
318 }else{ if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
320 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
322 insns[2] = (insn & 0xfffdfffd); // ROR.W Rd, PC, PC
323 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000; // ROR.W Rd, Rn, PC
324 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd; // ROR.W Rd, PC, Rm
325 }else{ if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
327 insns[2] = (insn & 0xfff0ffff) | 0xd0000; // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
341 if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
343 insns[2] = (insn & 0xfff0ffff) | 0x000d0000; // STRx.W Rt, [Rn, SP]
345 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
347 if (THUMB2_INSN_REG_RN(insn) == 15)
349 insns[2] = (insn & 0xfffffff0) | 0xd; // STRD/T/HT{.W} Rt, [SP, ...]
354 if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
356 if (THUMB2_INSN_REG_RN(insn) == 15)
358 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d; // STRH.W Rt, [SP, #-<imm_8>]
367 if ((reg == 15) && (THUMB2_INSN_MATCH (STRW, insn) || \
368 THUMB2_INSN_MATCH (STRBW, insn) || \
369 THUMB2_INSN_MATCH (STRD, insn) || \
370 THUMB2_INSN_MATCH (STRHT, insn) || \
371 THUMB2_INSN_MATCH (STRT, insn) || \
372 THUMB2_INSN_MATCH (STRHW1, insn) || \
373 THUMB2_INSN_MATCH (STRHW, insn) ))
375 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
380 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
382 insns[2] = (insn & 0xfffffff0) | 0xd; // TEQ SP, #<const>
383 }else{ if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
385 if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
387 insns[2] = (insn & 0xfffdfffd); // TEQ/TST PC, PC
388 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000; // TEQ/TST Rn, PC
389 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd; // TEQ/TST PC, Rm
398 static int arch_check_insn_arm (struct arch_specific_insn *ainsn)
402 // check instructions that can change PC by nature
404 // ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
405 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
406 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
407 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
408 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
409 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
410 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
411 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
412 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
414 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
417 #ifndef CONFIG_CPU_V7
418 // check instructions that can write result to PC
419 else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
420 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
421 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
422 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
423 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
424 (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
426 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
429 #endif // CONFIG_CPU_V7
430 // check special instruction loads store multiple registers
431 else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
432 // store pc or load to pc
433 (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
434 // store/load with pc update
435 ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
437 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
443 static int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
447 // check instructions that can change PC
448 if ( THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
449 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
450 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
451 THUMB2_INSN_MATCH (BL, ainsn->insn_thumb[0]) ||
452 THUMB_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
453 THUMB_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
454 THUMB_INSN_MATCH (CBZ, ainsn->insn_thumb[0]) ||
455 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
456 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
457 THUMB2_INSN_MATCH (BLX1, ainsn->insn_thumb[0]) ||
458 THUMB_INSN_MATCH (BLX2, ainsn->insn_thumb[0]) ||
459 THUMB_INSN_MATCH (BX, ainsn->insn_thumb[0]) ||
460 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
461 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
462 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
463 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
464 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
465 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
466 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
467 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
468 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
469 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
470 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
471 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
472 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
473 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
474 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
475 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
476 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
477 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
478 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
479 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
480 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
481 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
482 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
483 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
484 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
485 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
486 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
487 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
489 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
496 int arch_prepare_kretprobe (struct kretprobe *p)
498 DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
502 int arch_prepare_kprobe (struct kprobe *p)
504 kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
505 int uregs, pc_dep, ret = 0;
506 kprobe_opcode_t insn[MAX_INSN_SIZE];
507 struct arch_specific_insn ainsn;
509 /* insn: must be on special executable page on i386. */
510 p->ainsn.insn = get_insn_slot (NULL, 0);
514 memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
515 ainsn.insn_arm = ainsn.insn = insn;
516 ret = arch_check_insn_arm (&ainsn);
519 p->opcode = *p->addr;
523 if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
524 ARM_INSN_MATCH (SRO, insn[0]))
527 if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
528 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
530 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
535 else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
536 ARM_INSN_MATCH (SIO, insn[0]))
539 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
540 (ARM_INSN_REG_RD (insn[0]) == 15)))
543 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
547 else if(ARM_INSN_MATCH (DPRS, insn[0]))
550 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
551 (ARM_INSN_REG_RS (insn[0]) == 15))
554 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
558 else if(ARM_INSN_MATCH (SM, insn[0]))
561 if (ARM_INSN_REG_MR (insn[0], 15))
563 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
567 // check instructions that can write result to SP andu uses PC
568 if (pc_dep && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
570 free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
577 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
578 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
580 DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
581 free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
584 insns[6] = (kprobe_opcode_t) (p->addr + 2);
588 memcpy (insns, gen_insn_execbuf, sizeof (insns));
589 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
591 insns[7] = (kprobe_opcode_t) (p->addr + 1);
592 DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
593 DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
594 p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
595 insns[5], insns[6], insns[7], insns[8]);
596 memcpy (p->ainsn.insn, insns, sizeof(insns));
597 flush_icache_range((long unsigned)p->ainsn.insn, (long unsigned)(p->ainsn.insn) + sizeof(insns));
605 free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
606 printk("arch_prepare_kprobe: instruction 0x%lx not instrumentation, addr=0x%p\n", insn[0], p->addr);
612 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
614 kprobe_opcode_t insn;
615 unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
618 DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
619 if (abs (insn & 0xffffff) > 0xffffff)
621 DBPRINTF ("ERROR: kprobe address out of range\n");
624 insn = insn & 0xffffff;
625 insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
626 DBPRINTF ("insn=%lX\n", insn);
627 return (unsigned int) insn;
631 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
632 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
634 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
637 kprobe_opcode_t insn[MAX_INSN_SIZE];
639 if ((unsigned long) p->addr & 0x01)
641 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
644 if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
645 panic ("Failed to read memory task[tgid=%u, comm=%s] %p!\n", task->tgid, task->comm, p->addr);
647 p->ainsn.insn_arm = get_insn_slot(task, atomic);
648 if (!p->ainsn.insn_arm) {
649 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
652 ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
654 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
657 p->ainsn.insn_thumb = get_insn_slot(task, atomic);
658 if (!p->ainsn.insn_thumb) {
659 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
662 ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
664 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
665 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
668 if ((p->safe_arm == -1) && (p->safe_thumb == -1)) {
669 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both) [tgid=%u, addr=%lx, data=%lx]\n",
670 __FILE__, __LINE__, task->tgid, (unsigned long)p->addr, (unsigned long)p->opcode);
671 if (!write_proc_vm_atomic (task, (unsigned long) p->addr, &p->opcode, sizeof (p->opcode)))
672 panic ("Failed to write memory %p!\n", p->addr);
673 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
674 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
680 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
682 DBPRINTF("Warrning: arch_prepare_uretprobe is not implemented\n");
686 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
689 regs->ARM_pc = (unsigned long)p->ss_addr;
692 regs->ARM_pc = (unsigned long)p->ainsn.insn;
696 void save_previous_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p_run)
699 panic("arm_save_previous_kprobe: p_run == NULL\n");
702 if (kcb->prev_kprobe.kp != NULL) {
703 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
706 kcb->prev_kprobe.kp = p_run;
707 kcb->prev_kprobe.status = kcb->kprobe_status;
710 void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
712 set_current_kprobe(kcb->prev_kprobe.kp, NULL, NULL);
713 kcb->kprobe_status = kcb->prev_kprobe.status;
714 kcb->prev_kprobe.kp = NULL;
715 kcb->prev_kprobe.status = 0;
718 void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
720 __get_cpu_var(current_kprobe) = p;
721 DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
724 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
726 kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
728 kprobe_opcode_t insn[MAX_INSN_SIZE];
729 struct arch_specific_insn ainsn;
732 if ((unsigned long) p->addr & 0x01)
734 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
738 ainsn.insn_arm = insn;
739 if (!arch_check_insn_arm(&ainsn))
745 if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
746 ARM_INSN_MATCH (SRO, insn[0]))
749 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
750 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
752 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
757 else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
758 ARM_INSN_MATCH (SIO, insn[0]))
761 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
762 (ARM_INSN_REG_RD (insn[0]) == 15)))
765 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
769 else if (ARM_INSN_MATCH (DPRS, insn[0]))
772 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
773 (ARM_INSN_REG_RS (insn[0]) == 15))
776 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
780 else if (ARM_INSN_MATCH (SM, insn[0]))
783 if (ARM_INSN_REG_MR (insn[0], 15))
785 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
789 // check instructions that can write result to SP andu uses PC
790 if (pc_dep && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
792 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
794 // TODO: move free to later phase
795 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
798 if (unlikely(uregs && pc_dep))
800 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
801 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
803 printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
804 __FILE__, __LINE__, insn[0]);
806 // TODO: move free to later phase
807 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
810 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
811 insns[6] = (kprobe_opcode_t) (p->addr + 2);
815 memcpy (insns, gen_insn_execbuf, sizeof (insns));
816 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
818 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
819 insns[7] = (kprobe_opcode_t) (p->addr + 1);
822 if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
824 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
825 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
826 insns[6] = (kprobe_opcode_t) (p->addr + 2);
827 insns[7] = get_addr_b(p->opcode, p->addr);
830 DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
831 p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
832 insns[5], insns[6], insns[7], insns[8]);
833 if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
835 panic("failed to write memory %p!\n", p->ainsn.insn);
836 // Mr_Nobody: we have to panic, really??...
837 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
843 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
847 kprobe_opcode_t insn[MAX_INSN_SIZE];
848 struct arch_specific_insn ainsn;
849 kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
852 if ((unsigned long) p->addr & 0x01)
854 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
858 ainsn.insn_thumb = insn;
859 if (!arch_check_insn_thumb(&ainsn))
865 if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
867 uregs = 0x0700; // 8-10
870 else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
876 else if THUMB2_INSN_MATCH (ADR, insn[0])
878 uregs = 0x0f00; // Rd 8-11
881 else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0]) ||
882 THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
883 THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
884 THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
885 THUMB2_INSN_MATCH (LDREX, insn[0]) ||
886 ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
887 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
888 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
889 ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
890 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
892 uregs = 0xf000; // Rt 12-15
895 else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
897 uregs = 0xff00; // Rt 12-15, Rt2 8-11
900 else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
905 else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
907 uregs = 0xf000; // Rd 12-15
910 else if (THUMB2_INSN_MATCH(STRD, insn[0]) && ((THUMB2_INSN_REG_RN(insn[0]) == 15) || (THUMB2_INSN_REG_RT(insn[0]) == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
912 uregs = 0xff00; // Rt 12-15, Rt2 8-11
915 else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
917 uregs = 0x0f00; // Rd 8-11
920 else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
925 else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
927 uregs = 0x0f00; // Rd 8-11
930 else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
932 uregs = 0x0f00; // Rd 8-11
935 else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
937 uregs = 0xf0000; //Rn 0-3 (16-19)
940 else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
941 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
943 uregs = 0xf0000; //Rn 0-3 (16-19)
946 if (unlikely(uregs && pc_dep))
948 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
949 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
951 printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
952 __FILE__, __LINE__, insn[0]);
954 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
957 addr = ((unsigned int)p->addr) + 4;
958 *((unsigned short*)insns + 13) = 0xdeff;
959 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
960 *((unsigned short*)insns + 15) = addr >> 16;
961 if (!isThumb2(insn[0]))
963 addr = ((unsigned int)p->addr) + 2;
964 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
965 *((unsigned short*)insns + 17) = addr >> 16;
968 addr = ((unsigned int)p->addr) + 4;
969 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
970 *((unsigned short*)insns + 17) = addr >> 16;
974 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
975 *((unsigned short*)insns + 13) = 0xdeff;
976 if (!isThumb2(insn[0]))
978 addr = ((unsigned int)p->addr) + 2;
979 *((unsigned short*)insns + 2) = insn[0];
980 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
981 *((unsigned short*)insns + 17) = addr >> 16;
984 addr = ((unsigned int)p->addr) + 4;
986 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
987 *((unsigned short*)insns + 17) = addr >> 16;
990 if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
992 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
993 // Mr_Nobody: we have to panic, really??...
994 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1000 static int check_validity_insn(struct kprobe *p, struct pt_regs *regs, struct task_struct *task)
1004 if (unlikely(thumb_mode(regs))) {
1005 if (p->safe_thumb != -1) {
1006 p->ainsn.insn = p->ainsn.insn_thumb;
1007 list_for_each_entry_rcu(kp, &p->list, list) {
1008 kp->ainsn.insn = p->ainsn.insn_thumb;
1011 printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1012 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1013 // Test case when we do our actions on already running application
1014 arch_disarm_uprobe(p, task);
1018 if (p->safe_arm != -1) {
1019 p->ainsn.insn = p->ainsn.insn_arm;
1020 list_for_each_entry_rcu(kp, &p->list, list) {
1021 kp->ainsn.insn = p->ainsn.insn_arm;
1024 printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1025 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1026 // Test case when we do our actions on already running application
1027 arch_disarm_uprobe(p, task);
1035 static int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
1038 unsigned long flags;
1039 local_irq_save(flags);
1040 ret = kprobe_handler(regs);
1041 local_irq_restore(flags);
1045 #ifdef TRAP_OVERHEAD_DEBUG
1046 static unsigned long trap_handler_counter_debug = 0;
1047 #define SAMPLING_COUNTER 100000
1050 int kprobe_handler(struct pt_regs *regs)
1053 char *msg_out = NULL;
1054 unsigned long user_m = user_mode(regs);
1055 pid_t tgid = (user_m) ? current->tgid : 0;
1056 kprobe_opcode_t *addr = (kprobe_opcode_t *) (regs->ARM_pc);
1058 struct kprobe *p = NULL, *p_run = NULL;
1059 int ret = 0, retprobe = 0, reenter = 0;
1060 kprobe_opcode_t *ssaddr = NULL;
1061 struct kprobe_ctlblk *kcb;
1063 #ifdef SUPRESS_BUG_MESSAGES
1064 int swap_oops_in_progress;
1065 // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1066 swap_oops_in_progress = oops_in_progress;
1067 oops_in_progress = 1;
1069 #ifdef TRAP_OVERHEAD_DEBUG
1070 trap_handler_counter_debug++;
1071 if ( trap_handler_counter_debug < SAMPLING_COUNTER ) {
1075 // XXX NOTE - user must care about catching signal via signal handler to avoid hanging!
1076 printk("Trap %ld reached - send SIGUSR1\n", trap_handler_counter_debug);
1077 kill_pid(get_task_pid(current, PIDTYPE_PID), SIGUSR1, 1);
1078 trap_handler_counter_debug = 0;
1083 #ifdef OVERHEAD_DEBUG
1084 struct timeval swap_tv1;
1085 struct timeval swap_tv2;
1086 #define USEC_IN_SEC_NUM 1000000
1087 do_gettimeofday(&swap_tv1);
1091 // printk("### kprobe_handler: task[tgid=%u (%s)] addr=%p\n", tgid, current->comm, addr);
1092 p = get_kprobe(addr, tgid);
1094 if (user_m && p && (check_validity_insn(p, regs, current) != 0)) {
1095 goto no_kprobe_live;
1098 /* We're in an interrupt, but this is clear and BUG()-safe. */
1099 kcb = get_kprobe_ctlblk ();
1101 /* Check we're not actually recursing */
1102 // TODO: event is not saving in trace
1103 p_run = kprobe_running();
1106 DBPRINTF("lock???");
1109 if (!tgid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)) {
1110 save_previous_kprobe(kcb, p_run);
1111 kcb->kprobe_status = KPROBE_REENTER;
1114 /* We have reentered the kprobe_handler(), since
1115 * another probe was hit while within the handler.
1116 * We here save the original kprobes variables and
1117 * just single step on the instruction of the new probe
1118 * without calling any user handlers.
1120 kprobes_inc_nmissed_count (p);
1121 prepare_singlestep (p, regs);
1127 if(tgid) { //we can reenter probe upon uretprobe exception
1128 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1129 // UNDEF_INSTRUCTION from user space
1131 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1133 save_previous_kprobe(kcb, p_run);
1134 kcb->kprobe_status = KPROBE_REENTER;
1137 DBPRINTF ("uretprobe %p\n", addr);
1142 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1143 /*if (p->break_handler && p->break_handler(p, regs)) {
1144 DBPRINTF("kprobe_running !!! goto ss");
1147 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1149 ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1151 ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1152 if (addr == ssaddr) {
1153 regs->ARM_pc = (unsigned long) (p->addr + 1);
1154 DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->ARM_pc);
1155 if (kcb->kprobe_status == KPROBE_REENTER) {
1156 restore_previous_kprobe(kcb);
1158 reset_current_kprobe();
1161 DBPRINTF ("kprobe_running !!! goto no");
1163 /* If it's not ours, can't be delete race, (we hold lock). */
1164 DBPRINTF ("no_kprobe");
1172 DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1173 // UNDEF_INSTRUCTION from user space
1175 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1177 /* Not one of ours: let kernel handle it */
1178 DBPRINTF ("no_kprobe");
1182 DBPRINTF ("uretprobe %p\n", addr);
1184 /* Not one of ours: let kernel handle it */
1185 DBPRINTF ("no_kprobe");
1189 // restore opcode for thumb app
1190 if (user_mode( regs ) && thumb_mode( regs )) {
1191 if (!isThumb2(p->opcode)) {
1192 unsigned long tmp = p->opcode >> 16;
1193 write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1195 // "2*sizeof(kprobe_opcode_t)" - strange. Should be "sizeof(kprobe_opcode_t)", need to test
1196 flush_icache_range((unsigned int) p->addr, ((unsigned int)p->addr) + (2 * sizeof(kprobe_opcode_t)));
1199 set_current_kprobe(p, NULL, NULL);
1201 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1202 if (retprobe) { //(einsn == UNDEF_INSTRUCTION)
1203 ret = trampoline_probe_handler (p, regs);
1204 } else if (p->pre_handler) {
1205 ret = p->pre_handler (p, regs);
1206 if(p->pre_handler != trampoline_probe_handler) {
1207 reset_current_kprobe();
1212 /* handler has already set things up, so skip ss setup */
1218 msg_out = "no_kprobe\n";
1219 err_out = 1; // return with death
1223 msg_out = "no_kprobe live\n";
1224 err_out = 0; // ok - life is life
1228 preempt_enable_no_resched();
1229 #ifdef OVERHEAD_DEBUG
1230 do_gettimeofday(&swap_tv2);
1232 swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) * USEC_IN_SEC_NUM +
1233 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1235 #ifdef SUPRESS_BUG_MESSAGES
1236 oops_in_progress = swap_oops_in_progress;
1246 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1248 struct jprobe *jp = container_of (p, struct jprobe, kp);
1249 kprobe_pre_entry_handler_t pre_entry;
1250 entry_point_t entry;
1253 // p = kprobe_running(regs);
1256 DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1257 entry = (entry_point_t) jp->entry;
1258 pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1260 // DIE("entry NULL", regs)
1261 DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1263 //call handler for all kernel probes and user space ones which belong to current tgid
1264 if (!p->tgid || (p->tgid == current->tgid))
1266 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1267 struct thread_info *tinfo = (struct thread_info *)regs->ARM_r2;
1268 patch_suspended_task(sched_rp, tinfo->task);
1271 p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1273 entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1277 dbi_arch_uprobe_return ();
1279 dbi_jprobe_return ();
1283 dbi_arch_uprobe_return ();
1285 prepare_singlestep (p, regs);
1290 void dbi_jprobe_return (void)
1294 void dbi_arch_uprobe_return (void)
1298 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1301 //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1302 kprobe_opcode_t insns[2];
1306 insns[0] = BREAKPOINT_INSTRUCTION;
1307 insns[1] = p->opcode;
1308 //p->opcode = *p->addr;
1309 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1311 printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1314 //*p->addr = BREAKPOINT_INSTRUCTION;
1315 //*(p->addr+1) = p->opcode;
1316 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1318 printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1324 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1325 *(p->addr + 1) = p->opcode;
1326 p->opcode = *p->addr;
1327 *p->addr = BREAKPOINT_INSTRUCTION;
1329 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1332 reset_current_kprobe();
1340 void arch_arm_kprobe (struct kprobe *p)
1342 *p->addr = BREAKPOINT_INSTRUCTION;
1343 flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1346 void arch_disarm_kprobe (struct kprobe *p)
1348 *p->addr = p->opcode;
1349 flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1353 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1355 struct kretprobe_instance *ri = NULL;
1356 struct hlist_head *head;
1357 struct hlist_node *node, *tmp;
1358 unsigned long flags, orig_ret_address = 0;
1359 unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1361 struct kretprobe *crp = NULL;
1362 struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1367 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1368 if (!thumb_mode( regs ))
1369 trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1371 trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1374 spin_lock_irqsave (&kretprobe_lock, flags);
1377 * We are using different hash keys (current and mm) for finding kernel
1378 * space and user space probes. Kernel space probes can change mm field in
1379 * task_struct. User space probes can be shared between threads of one
1380 * process so they have different current but same mm.
1383 head = kretprobe_inst_table_head(current->mm);
1385 head = kretprobe_inst_table_head(current);
1389 * It is possible to have multiple instances associated with a given
1390 * task either because an multiple functions in the call path
1391 * have a return probe installed on them, and/or more then one
1392 * return probe was registered for a target function.
1394 * We can handle this because:
1395 * - instances are always inserted at the head of the list
1396 * - when multiple return probes are registered for the same
1397 * function, the first instance's ret_addr will point to the
1398 * real return address, and all the rest will point to
1399 * kretprobe_trampoline
1401 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1403 if (ri->task != current)
1404 /* another task is sharing our hash bucket */
1406 if (ri->rp && ri->rp->handler){
1407 ri->rp->handler (ri, regs, ri->rp->priv_arg);
1410 orig_ret_address = (unsigned long) ri->ret_addr;
1411 recycle_rp_inst (ri);
1412 if (orig_ret_address != trampoline_address)
1414 * This is the real return address. Any other
1415 * instances associated with this task are for
1416 * other calls deeper on the call stack
1420 kretprobe_assert (ri, orig_ret_address, trampoline_address);
1421 //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1422 //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1423 //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1424 //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1425 //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1426 //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1428 if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1429 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1431 regs->uregs[14] = orig_ret_address;
1432 DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1433 DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1435 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1437 regs->uregs[15] = orig_ret_address;
1439 if (!thumb_mode( regs )) regs->uregs[15] += 4;
1440 else regs->uregs[15] += 2;
1443 DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1445 if(p){ // ARM, MIPS, X86 user space
1446 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1448 regs->ARM_cpsr &= 0xFFFFFFDF;
1450 if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1452 regs->ARM_cpsr |= 0x20;
1456 //TODO: test - enter function, delete us retprobe, exit function
1457 // for user space retprobes only - deferred deletion
1459 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1461 // if we are not at the end of the list and current retprobe should be disarmed
1462 if (node && ri->rp2)
1464 struct hlist_node *current_node = node;
1466 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1467 crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1468 DIE(die_msg, regs); */
1469 // look for other instances for the same retprobe
1470 hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1473 * Trying to find another retprobe instance associated with
1474 * the same retprobe.
1476 if (ri->rp2 == crp && node != current_node)
1482 // if there are no more instances for this retprobe
1484 struct kprobe *is_p = &crp->kp;
1485 DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1487 If there is no any retprobe instances of this retprobe
1488 we can free the resources related to the probe.
1490 if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1491 hlist_del_rcu(&is_p->is_hlist_arm);
1493 if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1494 hlist_del_rcu(&is_p->is_hlist_thumb);
1496 unregister_uprobe (&crp->kp, current, 1);
1499 hlist_del(current_node);
1503 if (kcb->kprobe_status == KPROBE_REENTER) {
1504 restore_previous_kprobe(kcb);
1506 reset_current_kprobe();
1510 spin_unlock_irqrestore (&kretprobe_lock, flags);
1513 * By returning a non-zero value, we are telling
1514 * kprobe_handler() that we don't want the post_handler
1515 * to run (and have re-enabled preemption)
1521 void __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1523 struct kretprobe_instance *ri;
1525 DBPRINTF ("start\n");
1526 //TODO: test - remove retprobe after func entry but before its exit
1527 if ((ri = get_free_rp_inst (rp)) != NULL)
1532 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1533 ri->sp = (kprobe_opcode_t *)regs->ARM_sp; //uregs[13];
1536 if (!thumb_mode( regs ))
1537 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1539 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1541 else /* Replace the return addr with trampoline addr */
1542 regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1544 // DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1548 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1554 int asm_init_module_dependencies(void)
1556 //No module dependencies
1560 typedef void (* kpro_type)(struct undef_hook *);
1561 static kpro_type do_kpro;
1562 static kpro_type undo_kpro;
1564 // kernel probes hook
1565 static struct undef_hook undef_ho_k = {
1566 .instr_mask = 0xffffffff,
1567 .instr_val = BREAKPOINT_INSTRUCTION,
1568 .cpsr_mask = MODE_MASK,
1569 .cpsr_val = SVC_MODE,
1570 .fn = kprobe_trap_handler
1573 // userspace probes hook (arm)
1574 static struct undef_hook undef_ho_u = {
1575 .instr_mask = 0xffffffff,
1576 .instr_val = BREAKPOINT_INSTRUCTION,
1577 .cpsr_mask = MODE_MASK,
1578 .cpsr_val = USR_MODE,
1579 .fn = kprobe_trap_handler
1582 // userspace probes hook (thumb)
1583 static struct undef_hook undef_ho_u_t = {
1584 .instr_mask = 0xffffffff,
1585 .instr_val = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1586 .cpsr_mask = MODE_MASK,
1587 .cpsr_val = USR_MODE,
1588 .fn = kprobe_trap_handler
1591 int __init arch_init_kprobes (void)
1593 unsigned int do_bp_handler = 0;
1596 if (arch_init_module_dependencies())
1598 DBPRINTF ("Unable to init module dependencies\n");
1602 do_bp_handler = swap_ksyms("do_undefinstr");
1603 if (do_bp_handler == 0) {
1604 DBPRINTF("no do_undefinstr symbol found!");
1607 arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1608 // Register hooks (kprobe_handler)
1609 do_kpro = (kpro_type)swap_ksyms("register_undef_hook");
1610 if (do_kpro == NULL) {
1611 printk("no register_undef_hook symbol found!\n");
1615 // Unregister hooks (kprobe_handler)
1616 undo_kpro = (kpro_type)swap_ksyms("unregister_undef_hook");
1617 if (undo_kpro == NULL) {
1618 printk("no unregister_undef_hook symbol found!\n");
1622 do_kpro(&undef_ho_k);
1623 do_kpro(&undef_ho_u);
1624 do_kpro(&undef_ho_u_t);
1625 if ((ret = dbi_register_kprobe (&trampoline_p)) != 0) {
1626 //dbi_unregister_jprobe(&do_exit_p, 0);
1632 void __exit dbi_arch_exit_kprobes (void)
1634 undo_kpro(&undef_ho_u_t);
1635 undo_kpro(&undef_ho_u);
1636 undo_kpro(&undef_ho_k);
1639 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1640 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);