kprobe/arch/asm-arm/dbi_kprobes.c

   1 /*
   2  *  Dynamic Binary Instrumentation Module based on KProbes
   3  *  modules/kprobe/arch/asm-arm/dbi_kprobes.c
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18  *
  19  * Copyright (C) Samsung Electronics, 2006-2010
  20  *
  21  * 2006-2007    Ekaterina Gorelkina <e.gorelkina@samsung.com>: initial implementation for ARM/MIPS
  22  * 2008-2009    Alexey Gerenkov <a.gerenkov@samsung.com> User-Space
  23  *              Probes initial implementation; Support x86.
  24  * 2010         Ekaterina Gorelkina <e.gorelkina@samsung.com>: redesign module for separating core and arch parts
  25  * 2010-2011    Alexander Shirshikov <a.shirshikov@samsung.com>: initial implementation for Thumb
  26  * 2012         Stanislav Andreev <s.andreev@samsung.com>: added time debug profiling support; BUG() message fix
  27  * 2012         Stanislav Andreev <s.andreev@samsung.com>: redesign of kprobe functionality -
  28  *              kprobe_handler() now called via undefined instruction hooks
  29  * 2012         Stanislav Andreev <s.andreev@samsung.com>: hash tables search implemented for uprobes
  30  */
  31
  32 #include <linux/module.h>
  33 #include <linux/mm.h>
  34
  35 #include "dbi_kprobes.h"
  36 #include "../dbi_kprobes.h"
  37 #include "../../dbi_kprobes.h"
  38
  39 #include "../../dbi_kdebug.h"
  40 #include "../../dbi_insn_slots.h"
  41 #include "../../dbi_kprobes_deps.h"
  42 #include "../../dbi_uprobes.h"
  43 #include <ksyms.h>
  44
  45 #include <asm/cacheflush.h>
  46
  47 #ifdef TRAP_OVERHEAD_DEBUG
  48 #include <linux/pid.h>
  49 #include <linux/signal.h>
  50 #endif
  51
  52 #ifdef OVERHEAD_DEBUG
  53 #include <linux/time.h>
  54 #endif
  55
  56 #include <asm/traps.h>
  57 #include <asm/ptrace.h>
  58 #include <linux/list.h>
  59 #include <linux/hash.h>
  60
  61 #define SUPRESS_BUG_MESSAGES
  62
  63 extern struct kprobe * per_cpu__current_kprobe;
  64 extern struct hlist_head kprobe_table[KPROBE_TABLE_SIZE];
  65
  66 #ifdef OVERHEAD_DEBUG
  67 unsigned long swap_sum_time = 0;
  68 unsigned long swap_sum_hit = 0;
  69 EXPORT_SYMBOL_GPL (swap_sum_time);
  70 EXPORT_SYMBOL_GPL (swap_sum_hit);
  71 #endif
  72
  73 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
  74 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
  75
  76 static inline long branch_t16_dest(kprobe_opcode_t insn, unsigned int insn_addr)
  77 {
  78         long offset = insn & 0x3ff;
  79         offset -= insn & 0x400;
  80         return (insn_addr + 4 + offset * 2);
  81 }
  82
  83 static inline long branch_cond_t16_dest(kprobe_opcode_t insn, unsigned int insn_addr)
  84 {
  85         long offset = insn & 0x7f;
  86         offset -= insn & 0x80;
  87         return (insn_addr + 4 + offset * 2);
  88 }
  89
  90 static inline long branch_t32_dest(kprobe_opcode_t insn, unsigned int insn_addr)
  91 {
  92         unsigned int poff = insn & 0x3ff;
  93         unsigned int offset = (insn & 0x07fe0000) >> 17;
  94
  95         poff -= (insn & 0x400);
  96
  97         if (insn & (1 << 12))
  98                 return ((insn_addr + 4 + (poff << 12) + offset * 4));
  99         else
 100                 return ((insn_addr + 4 + (poff << 12) + offset * 4) & ~3);
 101 }
 102
 103 static inline long cbz_t16_dest(kprobe_opcode_t insn, unsigned int insn_addr)
 104 {
 105         unsigned int i = (insn & 0x200) >> 3;
 106         unsigned int offset = (insn & 0xf8) >> 2;
 107         return insn_addr + 4 + i + offset;
 108 }
 109
 110 static kprobe_opcode_t get_addr_b(kprobe_opcode_t insn, kprobe_opcode_t *addr)
 111 {
 112         // real position less then PC by 8
 113         return (kprobe_opcode_t)((long)addr + 8 + branch_displacement(insn));
 114 }
 115
 116 static unsigned int arr_traps_template[] = {
 117                 0xe1a0c00d,    // mov          ip, sp
 118                 0xe92dd800,    // stmdb        sp!, {fp, ip, lr, pc}
 119                 0xe24cb004,    // sub          fp, ip, #4      ; 0x4
 120                 0x00000000,    // b
 121                 0xe3500000,    // cmp          r0, #0  ; 0x0
 122                 0xe89da800,    // ldmia        sp, {fp, sp, pc}
 123                 0x00000000,    // nop
 124                 0xffffffff     // end
 125 };
 126
 127
 128 static struct kprobe trampoline_p =
 129 {
 130         .addr = (kprobe_opcode_t *) & kretprobe_trampoline,
 131         .pre_handler = trampoline_probe_handler
 132 };
 133
 134 // is instruction Thumb2 and NOT a branch, etc...
 135 static int isThumb2(kprobe_opcode_t insn)
 136 {
 137         if((    (insn & 0xf800) == 0xe800 ||
 138                 (insn & 0xf800) == 0xf000 ||
 139                 (insn & 0xf800) == 0xf800)) return 1;
 140         return 0;
 141 }
 142
 143
 144 static int prep_pc_dep_insn_execbuf (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 145 {
 146         int i;
 147
 148         if (uregs & 0x10)
 149         {
 150                 int reg_mask = 0x1;
 151                 //search in reg list
 152                 for (i = 0; i < 13; i++, reg_mask <<= 1)
 153                 {
 154                         if (!(insn & reg_mask))
 155                                 break;
 156                 }
 157         }
 158         else
 159         {
 160                 for (i = 0; i < 13; i++)
 161                 {
 162                         if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == i))
 163                                 continue;
 164                         if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == i))
 165                                 continue;
 166                         if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == i))
 167                                 continue;
 168                         if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == i))
 169                                 continue;
 170                         break;
 171                 }
 172         }
 173         if (i == 13)
 174         {
 175                 DBPRINTF ("there are no free register %x in insn %lx!", uregs, insn);
 176                 return -EINVAL;
 177         }
 178         DBPRINTF ("prep_pc_dep_insn_execbuf: using R%d, changing regs %x", i, uregs);
 179
 180         // set register to save
 181         ARM_INSN_REG_SET_RD (insns[0], i);
 182         // set register to load address to
 183         ARM_INSN_REG_SET_RD (insns[1], i);
 184         // set instruction to execute and patch it
 185         if (uregs & 0x10)
 186         {
 187                 ARM_INSN_REG_CLEAR_MR (insn, 15);
 188                 ARM_INSN_REG_SET_MR (insn, i);
 189         }
 190         else
 191         {
 192                 if ((uregs & 0x1) && (ARM_INSN_REG_RN (insn) == 15))
 193                         ARM_INSN_REG_SET_RN (insn, i);
 194                 if ((uregs & 0x2) && (ARM_INSN_REG_RD (insn) == 15))
 195                         ARM_INSN_REG_SET_RD (insn, i);
 196                 if ((uregs & 0x4) && (ARM_INSN_REG_RS (insn) == 15))
 197                         ARM_INSN_REG_SET_RS (insn, i);
 198                 if ((uregs & 0x8) && (ARM_INSN_REG_RM (insn) == 15))
 199                         ARM_INSN_REG_SET_RM (insn, i);
 200         }
 201         insns[UPROBES_TRAMP_INSN_IDX] = insn;
 202         // set register to restore
 203         ARM_INSN_REG_SET_RD (insns[3], i);
 204         return 0;
 205 }
 206
 207
 208
 209 static int prep_pc_dep_insn_execbuf_thumb (kprobe_opcode_t * insns, kprobe_opcode_t insn, int uregs)
 210 {
 211         unsigned char mreg = 0;
 212         unsigned char reg = 0;
 213
 214
 215         if (THUMB_INSN_MATCH (APC, insn) || THUMB_INSN_MATCH (LRO3, insn))
 216         {
 217                 reg = ((insn & 0xffff) & uregs) >> 8;
 218         }else{
 219                 if (THUMB_INSN_MATCH (MOV3, insn))
 220                 {
 221                         if (((((unsigned char) insn) & 0xff) >> 3) == 15)
 222                                 reg = (insn & 0xffff) & uregs;
 223                         else
 224                                 return 0;
 225                 }else{
 226                         if (THUMB2_INSN_MATCH (ADR, insn))
 227                         {
 228                                 reg = ((insn >> 16) & uregs) >> 8;
 229                                 if (reg == 15) return 0;
 230                         }else{
 231                                 if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRW1, insn) ||
 232                                     THUMB2_INSN_MATCH (LDRHW, insn) || THUMB2_INSN_MATCH (LDRHW1, insn) ||
 233                                     THUMB2_INSN_MATCH (LDRWL, insn))
 234                                 {
 235                                         reg = ((insn >> 16) & uregs) >> 12;
 236                                         if (reg == 15) return 0;
 237                                 }else{
 238 // LDRB.W PC, [PC, #immed] => PLD [PC, #immed], so Rt == PC is skipped
 239                                         if (THUMB2_INSN_MATCH (LDRBW, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) || THUMB2_INSN_MATCH (LDREX, insn))
 240                                         {
 241                                                 reg = ((insn >> 16) & uregs) >> 12;
 242                                         }else{
 243                                                 if (THUMB2_INSN_MATCH (DP, insn))
 244                                                 {
 245                                                         reg = ((insn >> 16) & uregs) >> 12;
 246                                                         if (reg == 15) return 0;
 247                                                 }else{
 248                                                         if (THUMB2_INSN_MATCH (RSBW, insn))
 249                                                         {
 250                                                                 reg = ((insn >> 12) & uregs) >> 8;
 251                                                                 if (reg == 15) return 0;
 252                                                         }else{
 253                                                                 if (THUMB2_INSN_MATCH (RORW, insn))
 254                                                                 {
 255                                                                         reg = ((insn >> 12) & uregs) >> 8;
 256                                                                         if (reg == 15) return 0;
 257                                                                 }else{
 258                                                                         if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW1, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 259                                                                         {
 260                                                                                 reg = ((insn >> 12) & uregs) >> 8;
 261                                                                                 if (reg == 15) return 0;
 262                                                                         }else{
 263                                                                                 if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 264                                                                                 {
 265                                                                                         reg = 15;
 266                                                                                 }else{
 267                                                                                         if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 268                                                                                         {
 269                                                                                                 reg = THUMB2_INSN_REG_RM(insn);
 270                                                                                         }
 271                                                                                 }
 272                                                                         }
 273                                                                 }
 274                                                         }
 275                                                 }
 276                                         }
 277                                 }
 278                         }
 279                 }
 280         }
 281
 282         if ((   THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn) || THUMB2_INSN_MATCH (STRD, insn) || \
 283                 THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn) || \
 284                 THUMB2_INSN_MATCH (STRHW, insn)) && THUMB2_INSN_REG_RT(insn) == 15)
 285         {
 286                 reg = THUMB2_INSN_REG_RT(insn);
 287         }
 288
 289         if (reg == 6 || reg == 7)
 290         {
 291                 *((unsigned short*)insns + 0) = (*((unsigned short*)insns + 0) & 0x00ff) | ((1 << mreg) | (1 << (mreg + 1)));
 292                 *((unsigned short*)insns + 1) = (*((unsigned short*)insns + 1) & 0xf8ff) | (mreg << 8);
 293                 *((unsigned short*)insns + 2) = (*((unsigned short*)insns + 2) & 0xfff8) | (mreg + 1);
 294                 *((unsigned short*)insns + 3) = (*((unsigned short*)insns + 3) & 0xffc7) | (mreg << 3);
 295                 *((unsigned short*)insns + 7) = (*((unsigned short*)insns + 7) & 0xf8ff) | (mreg << 8);
 296                 *((unsigned short*)insns + 8) = (*((unsigned short*)insns + 8) & 0xffc7) | (mreg << 3);
 297                 *((unsigned short*)insns + 9) = (*((unsigned short*)insns + 9) & 0xffc7) | ((mreg + 1) << 3);
 298                 *((unsigned short*)insns + 10) = (*((unsigned short*)insns + 10) & 0x00ff) | (( 1 << mreg) | (1 << (mreg + 1)));
 299         }
 300
 301
 302         if (THUMB_INSN_MATCH (APC, insn))
 303         {
 304 //              ADD Rd, PC, #immed_8*4 -> ADD Rd, SP, #immed_8*4
 305                 *((unsigned short*)insns + 4) = ((insn & 0xffff) | 0x800);                              // ADD Rd, SP, #immed_8*4
 306         }else{
 307                 if (THUMB_INSN_MATCH (LRO3, insn))
 308                 {
 309 //                      LDR Rd, [PC, #immed_8*4] -> LDR Rd, [SP, #immed_8*4]
 310                         *((unsigned short*)insns + 4) = ((insn & 0xffff) + 0x5000);                     // LDR Rd, [SP, #immed_8*4]
 311                 }else{
 312                         if (THUMB_INSN_MATCH (MOV3, insn))
 313                         {
 314 //                              MOV Rd, PC -> MOV Rd, SP
 315                                 *((unsigned short*)insns + 4) = ((insn & 0xffff) ^ 0x10);               // MOV Rd, SP
 316                         }else{
 317                                 if (THUMB2_INSN_MATCH (ADR, insn))
 318                                 {
 319 //                                      ADDW Rd, PC, #imm -> ADDW Rd, SP, #imm
 320                                         insns[2] = (insn & 0xfffffff0) | 0x0d;                          // ADDW Rd, SP, #imm
 321                                 }else{
 322                                         if (THUMB2_INSN_MATCH (LDRW, insn) || THUMB2_INSN_MATCH (LDRBW, insn) ||
 323                                             THUMB2_INSN_MATCH (LDRHW, insn))
 324                                         {
 325 //                                              LDR.W Rt, [PC, #-<imm_12>] -> LDR.W Rt, [SP, #-<imm_8>]
 326 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 327 //                                              !!! imm_12 vs. imm_8 !!!
 328 //                                              !!!!!!!!!!!!!!!!!!!!!!!!
 329                                                 insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;            // LDR.W Rt, [SP, #-<imm_8>]
 330                                         }else{
 331                                                 if (THUMB2_INSN_MATCH (LDRW1, insn) || THUMB2_INSN_MATCH (LDRBW1, insn) ||
 332                                                     THUMB2_INSN_MATCH (LDRHW1, insn) || THUMB2_INSN_MATCH (LDRD, insn) || THUMB2_INSN_MATCH (LDRD1, insn) ||
 333                                                     THUMB2_INSN_MATCH (LDREX, insn))
 334                                                 {
 335 //                                                      LDRx.W Rt, [PC, #+<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 336                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                                                   // LDRx.W Rt, [SP, #+<imm_12>]
 337                                                 }else{
 338                                                         if (THUMB2_INSN_MATCH (MUL, insn))
 339                                                         {
 340                                                                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                                                    // MUL Rd, Rn, SP
 341                                                         }else{  if (THUMB2_INSN_MATCH (DP, insn))
 342                                                                 {
 343                                                                         if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                        // DP Rd, Rn, PC
 344                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;                                          // DP Rd, PC, Rm
 345                                                                 }else{  if (THUMB2_INSN_MATCH (LDRWL, insn))
 346                                                                         {
 347 //                                                                              LDRx.W Rt, [PC, #<imm_12>] -> LDRx.W Rt, [SP, #+<imm_12>] (+/-imm_8 for LDRD Rt, Rt2, [PC, #<imm_8>]
 348                                                                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                           // LDRx.W Rt, [SP, #+<imm_12>]
 349                                                                         }else{  if (THUMB2_INSN_MATCH (RSBW, insn))
 350                                                                                 {
 351                                                                                         insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // RSB{S}.W Rd, PC, #<const> -> RSB{S}.W Rd, SP, #<const>
 352                                                                                 }else{  if (THUMB2_INSN_MATCH (RORW, insn) || THUMB2_INSN_MATCH (LSLW1, insn) || THUMB2_INSN_MATCH (LSRW1, insn))
 353                                                                                         {
 354                                                                                                 if ((THUMB2_INSN_REG_RM(insn) == 15) && (THUMB2_INSN_REG_RN(insn) == 15))
 355                                                                                                 {
 356                                                                                                         insns[2] = (insn & 0xfffdfffd);                                                         // ROR.W Rd, PC, PC
 357                                                                                                 }else if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;             // ROR.W Rd, Rn, PC
 358                                                                                                         else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // ROR.W Rd, PC, Rm
 359                                                                                         }else{  if (THUMB2_INSN_MATCH (ROR, insn) || THUMB2_INSN_MATCH (LSLW2, insn) || THUMB2_INSN_MATCH (LSRW2, insn))
 360                                                                                                 {
 361                                                                                                         insns[2] = (insn & 0xfff0ffff) | 0xd0000;                                               // ROR{S} Rd, PC, #<const> -> ROR{S} Rd, SP, #<const>
 362                                                                                                 }
 363                                                                                         }
 364                                                                                 }
 365                                                                         }
 366                                                                 }
 367                                                         }
 368                                                 }
 369                                         }
 370                                 }
 371                         }
 372                 }
 373         }
 374
 375         if (THUMB2_INSN_MATCH (STRW, insn) || THUMB2_INSN_MATCH (STRBW, insn))
 376         {
 377                 insns[2] = (insn & 0xfff0ffff) | 0x000d0000;                                                            // STRx.W Rt, [Rn, SP]
 378         }else{
 379                 if (THUMB2_INSN_MATCH (STRD, insn) || THUMB2_INSN_MATCH (STRHT, insn) || THUMB2_INSN_MATCH (STRT, insn) || THUMB2_INSN_MATCH (STRHW1, insn))
 380                 {
 381                         if (THUMB2_INSN_REG_RN(insn) == 15)
 382                         {
 383                                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                   // STRD/T/HT{.W} Rt, [SP, ...]
 384                         }else{
 385                                 insns[2] = insn;
 386                         }
 387                 }else{
 388                         if (THUMB2_INSN_MATCH (STRHW, insn) && (THUMB2_INSN_REG_RN(insn) == 15))
 389                         {
 390                                 if (THUMB2_INSN_REG_RN(insn) == 15)
 391                                 {
 392                                         insns[2] = (insn & 0xf0fffff0) | 0x0c00000d;                                    // STRH.W Rt, [SP, #-<imm_8>]
 393                                 }else{
 394                                         insns[2] = insn;
 395                                 }
 396                         }
 397                 }
 398         }
 399
 400 //       STRx PC, xxx
 401         if ((reg == 15) && (THUMB2_INSN_MATCH (STRW, insn)   || \
 402                             THUMB2_INSN_MATCH (STRBW, insn)  || \
 403                             THUMB2_INSN_MATCH (STRD, insn)   || \
 404                             THUMB2_INSN_MATCH (STRHT, insn)  || \
 405                             THUMB2_INSN_MATCH (STRT, insn)   || \
 406                             THUMB2_INSN_MATCH (STRHW1, insn) || \
 407                             THUMB2_INSN_MATCH (STRHW, insn) ))
 408         {
 409                 insns[2] = (insns[2] & 0x0fffffff) | 0xd0000000;
 410         }
 411
 412
 413
 414         if (THUMB2_INSN_MATCH (TEQ1, insn) || THUMB2_INSN_MATCH (TST1, insn))
 415         {
 416                 insns[2] = (insn & 0xfffffff0) | 0xd;                                                                   // TEQ SP, #<const>
 417         }else{  if (THUMB2_INSN_MATCH (TEQ2, insn) || THUMB2_INSN_MATCH (TST2, insn))
 418                 {
 419                         if ((THUMB2_INSN_REG_RN(insn) == 15) && (THUMB2_INSN_REG_RM(insn) == 15))
 420                         {
 421                                 insns[2] = (insn & 0xfffdfffd);                                                         // TEQ/TST PC, PC
 422                         }else   if (THUMB2_INSN_REG_RM(insn) == 15) insns[2] = (insn & 0xfff0ffff) | 0xd0000;           // TEQ/TST Rn, PC
 423                                 else if (THUMB2_INSN_REG_RN(insn) == 15) insns[2] = (insn & 0xfffffff0) | 0xd;          // TEQ/TST PC, Rm
 424                 }
 425         }
 426
 427         return 0;
 428 }
 429
 430
 431
 432 static int arch_check_insn_arm (struct arch_specific_insn *ainsn)
 433 {
 434         int ret = 0;
 435
 436         // check instructions that can change PC by nature
 437         if (
 438 //              ARM_INSN_MATCH (UNDEF, ainsn->insn_arm[0]) ||
 439                 ARM_INSN_MATCH (AUNDEF, ainsn->insn_arm[0]) ||
 440                 ARM_INSN_MATCH (SWI, ainsn->insn_arm[0]) ||
 441                 ARM_INSN_MATCH (BREAK, ainsn->insn_arm[0]) ||
 442                 ARM_INSN_MATCH (BL, ainsn->insn_arm[0]) ||
 443                 ARM_INSN_MATCH (BLX1, ainsn->insn_arm[0]) ||
 444                 ARM_INSN_MATCH (BLX2, ainsn->insn_arm[0]) ||
 445                 ARM_INSN_MATCH (BX, ainsn->insn_arm[0]) ||
 446                 ARM_INSN_MATCH (BXJ, ainsn->insn_arm[0]))
 447         {
 448                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 449                 ret = -EFAULT;
 450         }
 451 #ifndef CONFIG_CPU_V7
 452         // check instructions that can write result to PC
 453         else if ((ARM_INSN_MATCH (DPIS, ainsn->insn_arm[0]) ||
 454                                 ARM_INSN_MATCH (DPRS, ainsn->insn_arm[0]) ||
 455                                 ARM_INSN_MATCH (DPI, ainsn->insn_arm[0]) ||
 456                                 ARM_INSN_MATCH (LIO, ainsn->insn_arm[0]) ||
 457                                 ARM_INSN_MATCH (LRO, ainsn->insn_arm[0])) &&
 458                         (ARM_INSN_REG_RD (ainsn->insn_arm[0]) == 15))
 459         {
 460                 DBPRINTF ("Bad arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 461                 ret = -EFAULT;
 462         }
 463 #endif // CONFIG_CPU_V7
 464         // check special instruction loads store multiple registers
 465         else if ((ARM_INSN_MATCH (LM, ainsn->insn_arm[0]) || ARM_INSN_MATCH (SM, ainsn->insn_arm[0])) &&
 466                         // store pc or load to pc
 467                         (ARM_INSN_REG_MR (ainsn->insn_arm[0], 15) ||
 468                          // store/load with pc update
 469                          ((ARM_INSN_REG_RN (ainsn->insn_arm[0]) == 15) && (ainsn->insn_arm[0] & 0x200000))))
 470         {
 471                 DBPRINTF ("Bad insn arch_check_insn_arm: %lx\n", ainsn->insn_arm[0]);
 472                 ret = -EFAULT;
 473         }
 474         return ret;
 475 }
 476
 477 static int arch_check_insn_thumb (struct arch_specific_insn *ainsn)
 478 {
 479         int ret = 0;
 480
 481         // check instructions that can change PC
 482         if (    THUMB_INSN_MATCH (UNDEF, ainsn->insn_thumb[0]) ||
 483                 THUMB_INSN_MATCH (SWI, ainsn->insn_thumb[0]) ||
 484                 THUMB_INSN_MATCH (BREAK, ainsn->insn_thumb[0]) ||
 485                 THUMB2_INSN_MATCH (B1, ainsn->insn_thumb[0]) ||
 486                 THUMB2_INSN_MATCH (B2, ainsn->insn_thumb[0]) ||
 487                 THUMB2_INSN_MATCH (BXJ, ainsn->insn_thumb[0]) ||
 488                 (THUMB2_INSN_MATCH (ADR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 489                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 490                 (THUMB2_INSN_MATCH (LDRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 491                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 492                 (THUMB2_INSN_MATCH (LDRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 493                 (THUMB2_INSN_MATCH (LDRWL, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RT(ainsn->insn_thumb[0]) == 15) ||
 494                 THUMB2_INSN_MATCH (LDMIA, ainsn->insn_thumb[0]) ||
 495                 THUMB2_INSN_MATCH (LDMDB, ainsn->insn_thumb[0]) ||
 496                 (THUMB2_INSN_MATCH (DP, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 497                 (THUMB2_INSN_MATCH (RSBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 498                 (THUMB2_INSN_MATCH (RORW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 499                 (THUMB2_INSN_MATCH (ROR, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 500                 (THUMB2_INSN_MATCH (LSLW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 501                 (THUMB2_INSN_MATCH (LSLW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 502                 (THUMB2_INSN_MATCH (LSRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 503                 (THUMB2_INSN_MATCH (LSRW2, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RD(ainsn->insn_thumb[0]) == 15) ||
 504 /* skip PC, #-imm12 -> SP, #-imm8 and Tegra-hanging instructions */
 505                 (THUMB2_INSN_MATCH (STRW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 506                 (THUMB2_INSN_MATCH (STRBW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 507                 (THUMB2_INSN_MATCH (STRHW1, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 508                 (THUMB2_INSN_MATCH (STRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 509                 (THUMB2_INSN_MATCH (STRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 510                 (THUMB2_INSN_MATCH (LDRW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 511                 (THUMB2_INSN_MATCH (LDRBW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 512                 (THUMB2_INSN_MATCH (LDRHW, ainsn->insn_thumb[0]) && THUMB2_INSN_REG_RN(ainsn->insn_thumb[0]) == 15) ||
 513 /* skip STRDx/LDRDx Rt, Rt2, [Rd, ...] */
 514                 (THUMB2_INSN_MATCH (LDRD, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (LDRD1, ainsn->insn_thumb[0]) || THUMB2_INSN_MATCH (STRD, ainsn->insn_thumb[0])) )
 515         {
 516                 DBPRINTF ("Bad insn arch_check_insn_thumb: %lx\n", ainsn->insn_thumb[0]);
 517                 ret = -EFAULT;
 518         }
 519
 520         return ret;
 521 }
 522
 523 int arch_prepare_kretprobe (struct kretprobe *p)
 524 {
 525         DBPRINTF("Warrning: arch_prepare_kretprobe is not implemented\n");
 526         return 0;
 527 }
 528
 529 int arch_prepare_kprobe (struct kprobe *p)
 530 {
 531         kprobe_opcode_t insns[KPROBES_TRAMP_LEN];
 532         int uregs, pc_dep, ret = 0;
 533     kprobe_opcode_t insn[MAX_INSN_SIZE];
 534     struct arch_specific_insn ainsn;
 535
 536     /* insn: must be on special executable page on i386. */
 537     p->ainsn.insn = get_insn_slot (NULL, 0);
 538     if (!p->ainsn.insn)
 539         return -ENOMEM;
 540
 541     memcpy (insn, p->addr, MAX_INSN_SIZE * sizeof (kprobe_opcode_t));
 542     ainsn.insn_arm = ainsn.insn = insn;
 543     ret = arch_check_insn_arm (&ainsn);
 544     if (!ret)
 545     {
 546         p->opcode = *p->addr;
 547         uregs = pc_dep = 0;
 548
 549         // Rn, Rm ,Rd
 550         if(ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 551            ARM_INSN_MATCH (SRO, insn[0]))
 552         {
 553             uregs = 0xb;
 554             if( (ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 555                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)) )
 556             {
 557                 DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 558                 pc_dep = 1;
 559             }
 560         }
 561         // Rn ,Rd
 562         else if(ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 563                 ARM_INSN_MATCH (SIO, insn[0]))
 564         {
 565             uregs = 0x3;
 566             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 567                         (ARM_INSN_REG_RD (insn[0]) == 15)))
 568             {
 569                 pc_dep = 1;
 570                 DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 571             }
 572         }
 573         // Rn, Rm, Rs
 574         else if(ARM_INSN_MATCH (DPRS, insn[0]))
 575         {
 576             uregs = 0xd;
 577             if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 578                 (ARM_INSN_REG_RS (insn[0]) == 15))
 579             {
 580                 pc_dep = 1;
 581                 DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 582             }
 583         }
 584         // register list
 585         else if(ARM_INSN_MATCH (SM, insn[0]))
 586         {
 587             uregs = 0x10;
 588             if (ARM_INSN_REG_MR (insn[0], 15))
 589             {
 590                 DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 591                 pc_dep = 1;
 592             }
 593         }
 594         // check instructions that can write result to SP andu uses PC
 595         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn[0]) == 13))
 596         {
 597             free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 598             ret = -EFAULT;
 599         }
 600         else
 601         {
 602             if (uregs && pc_dep)
 603             {
 604                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 605                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 606                 {
 607                     DBPRINTF ("failed to prepare exec buffer for insn %lx!", insn[0]);
 608                     free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 609                     return -EINVAL;
 610                 }
 611                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 612             }
 613             else
 614             {
 615                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 616                 insns[KPROBES_TRAMP_INSN_IDX] = insn[0];
 617             }
 618             insns[7] = (kprobe_opcode_t) (p->addr + 1);
 619             DBPRINTF ("arch_prepare_kprobe: insn %lx", insn[0]);
 620             DBPRINTF ("arch_prepare_kprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 621                     p->ainsn.insn, insns[0], insns[1], insns[2], insns[3], insns[4],
 622                     insns[5], insns[6], insns[7], insns[8]);
 623             memcpy (p->ainsn.insn, insns, sizeof(insns));
 624             flush_icache_range((long unsigned)p->ainsn.insn, (long unsigned)(p->ainsn.insn) + sizeof(insns));
 625 #ifdef BOARD_tegra
 626             flush_cache_all();
 627 #endif
 628         }
 629     }
 630     else
 631     {
 632         free_insn_slot(&kprobe_insn_pages, NULL, p->ainsn.insn);
 633         printk("arch_prepare_kprobe: instruction 0x%lx not instrumentation, addr=0x%p\n", insn[0], p->addr);
 634     }
 635
 636     return ret;
 637 }
 638
 639 static unsigned int arch_construct_brunch (unsigned int base, unsigned int addr, int link)
 640 {
 641         kprobe_opcode_t insn;
 642         unsigned int bpi = (unsigned int) base - (unsigned int) addr - 8;
 643
 644         insn = bpi >> 2;
 645         DBPRINTF ("base=%x addr=%x base-addr-8=%x\n", base, addr, bpi);
 646         if (abs (insn & 0xffffff) > 0xffffff)
 647         {
 648                 DBPRINTF ("ERROR: kprobe address out of range\n");
 649                 BUG ();
 650         }
 651         insn = insn & 0xffffff;
 652         insn = insn | ((link != 0) ? 0xeb000000 : 0xea000000);
 653         DBPRINTF ("insn=%lX\n", insn);
 654         return (unsigned int) insn;
 655 }
 656
 657
 658 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 659 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic);
 660
 661 int arch_prepare_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 662 {
 663         int ret = 0;
 664         kprobe_opcode_t insn[MAX_INSN_SIZE];
 665
 666         if ((unsigned long) p->addr & 0x01)
 667         {
 668                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 669                 return -EINVAL;
 670         }
 671         if (!read_proc_vm_atomic (task, (unsigned long) p->addr, &insn, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)))
 672                 panic ("Failed to read memory task[tgid=%u, comm=%s] %p!\n", task->tgid, task->comm, p->addr);
 673         p->opcode = insn[0];
 674         p->ainsn.insn_arm = get_insn_slot(task, atomic);
 675         if (!p->ainsn.insn_arm) {
 676                 printk("Error in %s at %d: kprobe slot allocation error (arm)\n", __FILE__, __LINE__);
 677                 return -ENOMEM;
 678         }
 679         ret = arch_copy_trampoline_arm_uprobe(p, task, 1);
 680         if (ret) {
 681                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 682                 return -EFAULT;
 683         }
 684         p->ainsn.insn_thumb = get_insn_slot(task, atomic);
 685         if (!p->ainsn.insn_thumb) {
 686                 printk("Error in %s at %d: kprobe slot allocation error (thumb)\n", __FILE__, __LINE__);
 687                 return -ENOMEM;
 688         }
 689         ret = arch_copy_trampoline_thumb_uprobe(p, task, 1);
 690         if (ret) {
 691                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 692                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 693                 return -EFAULT;
 694         }
 695         if ((p->safe_arm == 1) && (p->safe_thumb == 1)) {
 696                 printk("Error in %s at %d: failed arch_copy_trampoline_*_uprobe() (both) [tgid=%u, addr=%lx, data=%lx]\n",
 697                                 __FILE__, __LINE__, task->tgid, (unsigned long)p->addr, (unsigned long)p->opcode);
 698                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_arm);
 699                 free_insn_slot(&uprobe_insn_pages, task, p->ainsn.insn_thumb);
 700                 return -ENOEXEC;
 701         }
 702         return ret;
 703 }
 704
 705 int arch_prepare_uretprobe (struct kretprobe *p, struct task_struct *task)
 706 {
 707         /* Remove retprobe if first insn overwrites lr */
 708         if (THUMB_INSN_MATCH(BLX2, p->kp.opcode) ||
 709             THUMB2_INSN_MATCH(BL, p->kp.opcode) ||
 710             THUMB2_INSN_MATCH(BLX1, p->kp.opcode))
 711                 p->thumb_noret = 0;
 712         else
 713                 p->thumb_noret = 1;
 714
 715         if (ARM_INSN_MATCH(BLX1, p->kp.opcode) ||
 716             ARM_INSN_MATCH(BLX2, p->kp.opcode) ||
 717             ARM_INSN_MATCH(BL, p->kp.opcode))
 718                 p->arm_noret = 0;
 719         else
 720                 p->arm_noret = 1;
 721
 722         return 0;
 723 }
 724
 725 void prepare_singlestep (struct kprobe *p, struct pt_regs *regs)
 726 {
 727         if (p->ss_addr) {
 728                 regs->ARM_pc = (unsigned long)p->ss_addr;
 729                 p->ss_addr = NULL;
 730         } else {
 731                 regs->ARM_pc = (unsigned long)p->ainsn.insn;
 732         }
 733 }
 734
 735 void save_previous_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p_run)
 736 {
 737         if (p_run == NULL) {
 738                 panic("arm_save_previous_kprobe: p_run == NULL\n");
 739         }
 740
 741         if (kcb->prev_kprobe.kp != NULL) {
 742                 DBPRINTF ("no space to save new probe[]: task = %d/%s", current->pid, current->comm);
 743         }
 744
 745         kcb->prev_kprobe.kp = p_run;
 746         kcb->prev_kprobe.status = kcb->kprobe_status;
 747 }
 748
 749 void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 750 {
 751         set_current_kprobe(kcb->prev_kprobe.kp, NULL, NULL);
 752         kcb->kprobe_status = kcb->prev_kprobe.status;
 753         kcb->prev_kprobe.kp = NULL;
 754         kcb->prev_kprobe.status = 0;
 755 }
 756
 757 void set_current_kprobe(struct kprobe *p, struct pt_regs *regs, struct kprobe_ctlblk *kcb)
 758 {
 759         __get_cpu_var(current_kprobe) = p;
 760         DBPRINTF ("set_current_kprobe: p=%p addr=%p\n", p, p->addr);
 761 }
 762
 763 int arch_copy_trampoline_arm_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 764 {
 765         kprobe_opcode_t insns[UPROBES_TRAMP_LEN];
 766         int uregs, pc_dep;
 767         kprobe_opcode_t insn[MAX_INSN_SIZE];
 768         struct arch_specific_insn ainsn;
 769
 770         p->safe_arm = 1;
 771         if ((unsigned long) p->addr & 0x01)
 772         {
 773                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 774                 return -EINVAL;
 775         }
 776         insn[0] = p->opcode;
 777         ainsn.insn_arm = insn;
 778         if (!arch_check_insn_arm(&ainsn))
 779         {
 780                 p->safe_arm = 0;
 781         }
 782         uregs = pc_dep = 0;
 783         // Rn, Rm ,Rd
 784         if (ARM_INSN_MATCH (DPIS, insn[0]) || ARM_INSN_MATCH (LRO, insn[0]) ||
 785                         ARM_INSN_MATCH (SRO, insn[0]))
 786         {
 787                 uregs = 0xb;
 788                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 789                                 (ARM_INSN_MATCH (SRO, insn[0]) && (ARM_INSN_REG_RD (insn[0]) == 15)))
 790                 {
 791                         DBPRINTF ("Unboostable insn %lx, DPIS/LRO/SRO\n", insn[0]);
 792                         pc_dep = 1;
 793                 }
 794         }
 795         // Rn ,Rd
 796         else if (ARM_INSN_MATCH (DPI, insn[0]) || ARM_INSN_MATCH (LIO, insn[0]) ||
 797                         ARM_INSN_MATCH (SIO, insn[0]))
 798         {
 799                 uregs = 0x3;
 800                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_MATCH (SIO, insn[0]) &&
 801                                 (ARM_INSN_REG_RD (insn[0]) == 15)))
 802                 {
 803                         pc_dep = 1;
 804                         DBPRINTF ("Unboostable insn %lx/%p, DPI/LIO/SIO\n", insn[0], p);
 805                 }
 806         }
 807         // Rn, Rm, Rs
 808         else if (ARM_INSN_MATCH (DPRS, insn[0]))
 809         {
 810                 uregs = 0xd;
 811                 if ((ARM_INSN_REG_RN (insn[0]) == 15) || (ARM_INSN_REG_RM (insn[0]) == 15) ||
 812                                 (ARM_INSN_REG_RS (insn[0]) == 15))
 813                 {
 814                         pc_dep = 1;
 815                         DBPRINTF ("Unboostable insn %lx, DPRS\n", insn[0]);
 816                 }
 817         }
 818         // register list
 819         else if (ARM_INSN_MATCH (SM, insn[0]))
 820         {
 821                 uregs = 0x10;
 822                 if (ARM_INSN_REG_MR (insn[0], 15))
 823                 {
 824                         DBPRINTF ("Unboostable insn %lx, SM\n", insn[0]);
 825                         pc_dep = 1;
 826                 }
 827         }
 828         // check instructions that can write result to SP andu uses PC
 829         if (pc_dep  && (ARM_INSN_REG_RD (ainsn.insn_arm[0]) == 13))
 830         {
 831                 printk("Error in %s at %d: instruction check failed (arm)\n", __FILE__, __LINE__);
 832                 p->safe_arm = 1;
 833                 // TODO: move free to later phase
 834                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 835                 //ret = -EFAULT;
 836         }
 837         if (unlikely(uregs && pc_dep))
 838         {
 839                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 840                 if (prep_pc_dep_insn_execbuf (insns, insn[0], uregs) != 0)
 841                 {
 842                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 843                                 __FILE__, __LINE__, insn[0]);
 844                         p->safe_arm = 1;
 845                         // TODO: move free to later phase
 846                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 847                         //return -EINVAL;
 848                 }
 849                 //insns[UPROBES_TRAMP_SS_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 850                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 851         }
 852         else
 853         {
 854                 memcpy (insns, gen_insn_execbuf, sizeof (insns));
 855                 insns[UPROBES_TRAMP_INSN_IDX] = insn[0];
 856         }
 857         insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 858         insns[7] = (kprobe_opcode_t) (p->addr + 1);
 859
 860         // B
 861         if(ARM_INSN_MATCH (B, ainsn.insn_arm[0]))
 862         {
 863                 memcpy (insns, pc_dep_insn_execbuf, sizeof (insns));
 864                 insns[UPROBES_TRAMP_RET_BREAK_IDX] = BREAKPOINT_INSTRUCTION;
 865                 insns[6] = (kprobe_opcode_t) (p->addr + 2);
 866                 insns[7] = get_addr_b(p->opcode, p->addr);
 867         }
 868
 869         DBPRINTF ("arch_prepare_uprobe: to %p - %lx %lx %lx %lx %lx %lx %lx %lx %lx",
 870                         p->ainsn.insn_arm, insns[0], insns[1], insns[2], insns[3], insns[4],
 871                         insns[5], insns[6], insns[7], insns[8]);
 872         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_arm, insns, sizeof (insns)))
 873         {
 874                 panic("failed to write memory %p!\n", p->ainsn.insn);
 875                 // Mr_Nobody: we have to panic, really??...
 876                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_arm, 0);
 877                 //return -EINVAL;
 878         }
 879         return 0;
 880 }
 881
 882 int arch_copy_trampoline_thumb_uprobe (struct kprobe *p, struct task_struct *task, int atomic)
 883 {
 884         int uregs, pc_dep;
 885         unsigned int addr;
 886         kprobe_opcode_t insn[MAX_INSN_SIZE];
 887         struct arch_specific_insn ainsn;
 888         kprobe_opcode_t insns[UPROBES_TRAMP_LEN * 2];
 889
 890         p->safe_thumb = 1;
 891         if ((unsigned long) p->addr & 0x01)
 892         {
 893                 printk("Error in %s at %d: attempt to register kprobe at an unaligned address\n", __FILE__, __LINE__);
 894                 return -EINVAL;
 895         }
 896         insn[0] = p->opcode;
 897         ainsn.insn_thumb = insn;
 898         if (!arch_check_insn_thumb(&ainsn))
 899         {
 900                 p->safe_thumb = 0;
 901         }
 902         uregs = 0;
 903         pc_dep = 0;
 904         if (THUMB_INSN_MATCH (APC, insn[0]) || THUMB_INSN_MATCH (LRO3, insn[0]))
 905         {
 906                 uregs = 0x0700;         // 8-10
 907                 pc_dep = 1;
 908         }
 909         else if (THUMB_INSN_MATCH (MOV3, insn[0]) && (((((unsigned char) insn[0]) & 0xff) >> 3) == 15))
 910         {
 911                 // MOV Rd, PC
 912                 uregs = 0x07;
 913                 pc_dep = 1;
 914         }
 915         else if THUMB2_INSN_MATCH (ADR, insn[0])
 916         {
 917                 uregs = 0x0f00;         // Rd 8-11
 918                 pc_dep = 1;
 919         }
 920         else if (((THUMB2_INSN_MATCH (LDRW, insn[0]) || THUMB2_INSN_MATCH (LDRW1, insn[0])  ||
 921                         THUMB2_INSN_MATCH (LDRBW, insn[0]) || THUMB2_INSN_MATCH (LDRBW1, insn[0]) ||
 922                         THUMB2_INSN_MATCH (LDRHW, insn[0]) || THUMB2_INSN_MATCH (LDRHW1, insn[0]) ||
 923                         THUMB2_INSN_MATCH (LDRWL, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15) ||
 924                         THUMB2_INSN_MATCH (LDREX, insn[0]) ||
 925                         ((THUMB2_INSN_MATCH (STRW, insn[0]) || THUMB2_INSN_MATCH (STRBW, insn[0]) ||
 926                                 THUMB2_INSN_MATCH (STRHW, insn[0]) || THUMB2_INSN_MATCH (STRHW1, insn[0])) &&
 927                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) ||
 928                         ((THUMB2_INSN_MATCH (STRT, insn[0]) || THUMB2_INSN_MATCH (STRHT, insn[0])) &&
 929                                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RT(insn[0]) == 15)) )
 930         {
 931                 uregs = 0xf000;         // Rt 12-15
 932                 pc_dep = 1;
 933         }
 934         else if ((THUMB2_INSN_MATCH (LDRD, insn[0]) || THUMB2_INSN_MATCH (LDRD1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15))
 935         {
 936                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 937                 pc_dep = 1;
 938         }
 939         else if (THUMB2_INSN_MATCH (MUL, insn[0]) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 940         {
 941                 uregs = 0xf;
 942                 pc_dep = 1;
 943         }
 944         else if (THUMB2_INSN_MATCH (DP, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 945         {
 946                 uregs = 0xf000; // Rd 12-15
 947                 pc_dep = 1;
 948         }
 949         else if (THUMB2_INSN_MATCH(STRD, insn[0]) && ((THUMB2_INSN_REG_RN(insn[0]) == 15) || (THUMB2_INSN_REG_RT(insn[0]) == 15) || THUMB2_INSN_REG_RT2(insn[0]) == 15))
 950         {
 951                 uregs = 0xff00;         // Rt 12-15, Rt2 8-11
 952                 pc_dep = 1;
 953         }
 954         else if (THUMB2_INSN_MATCH (RSBW, insn[0]) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 955         {
 956                 uregs = 0x0f00; // Rd 8-11
 957                 pc_dep = 1;
 958         }
 959         else if (THUMB2_INSN_MATCH (RORW, insn[0]) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 960         {
 961                 uregs = 0x0f00;
 962                 pc_dep = 1;
 963         }
 964         else if ((THUMB2_INSN_MATCH (ROR, insn[0]) || THUMB2_INSN_MATCH(LSLW2, insn[0]) || THUMB2_INSN_MATCH(LSRW2, insn[0])) && THUMB2_INSN_REG_RM(insn[0]) == 15)
 965         {
 966                 uregs = 0x0f00; // Rd 8-11
 967                 pc_dep = 1;
 968         }
 969         else if ((THUMB2_INSN_MATCH (LSLW1, insn[0]) || THUMB2_INSN_MATCH (LSRW1, insn[0])) && (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 970         {
 971                 uregs = 0x0f00; // Rd 8-11
 972                 pc_dep = 1;
 973         }
 974         else if ((THUMB2_INSN_MATCH (TEQ1, insn[0]) || THUMB2_INSN_MATCH (TST1, insn[0])) && THUMB2_INSN_REG_RN(insn[0]) == 15)
 975         {
 976                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 977                 pc_dep = 1;
 978         }
 979         else if ((THUMB2_INSN_MATCH (TEQ2, insn[0]) || THUMB2_INSN_MATCH (TST2, insn[0])) &&
 980                 (THUMB2_INSN_REG_RN(insn[0]) == 15 || THUMB2_INSN_REG_RM(insn[0]) == 15))
 981         {
 982                 uregs = 0xf0000;        //Rn 0-3 (16-19)
 983                 pc_dep = 1;
 984         }
 985         if (unlikely(uregs && pc_dep))
 986         {
 987                 memcpy (insns, pc_dep_insn_execbuf_thumb, 18 * 2);
 988                 if (prep_pc_dep_insn_execbuf_thumb (insns, insn[0], uregs) != 0)
 989                 {
 990                         printk("Error in %s at %d: failed to prepare exec buffer for insn %lx!",
 991                                 __FILE__, __LINE__, insn[0]);
 992                         p->safe_thumb = 1;
 993                         //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
 994                         //return -EINVAL;
 995                 }
 996                 addr = ((unsigned int)p->addr) + 4;
 997                 *((unsigned short*)insns + 13) = 0xdeff;
 998                 *((unsigned short*)insns + 14) = addr & 0x0000ffff;
 999                 *((unsigned short*)insns + 15) = addr >> 16;
1000                 if (!isThumb2(insn[0]))
1001                 {
1002                         addr = ((unsigned int)p->addr) + 2;
1003                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
1004                         *((unsigned short*)insns + 17) = addr >> 16;
1005                 }
1006                 else {
1007                         addr = ((unsigned int)p->addr) + 4;
1008                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
1009                         *((unsigned short*)insns + 17) = addr >> 16;
1010                 }
1011         }
1012         else {
1013                 memcpy (insns, gen_insn_execbuf_thumb, 18 * 2);
1014                 *((unsigned short*)insns + 13) = 0xdeff;
1015                 if (!isThumb2(insn[0]))
1016                 {
1017                         addr = ((unsigned int)p->addr) + 2;
1018                         *((unsigned short*)insns + 2) = insn[0];
1019                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
1020                         *((unsigned short*)insns + 17) = addr >> 16;
1021                 }
1022                 else {
1023                         addr = ((unsigned int)p->addr) + 4;
1024                         insns[1] = insn[0];
1025                         *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
1026                         *((unsigned short*)insns + 17) = addr >> 16;
1027                 }
1028         }
1029         if (THUMB_INSN_MATCH(B2, insn[0])) {
1030                 memcpy(insns, b_off_insn_execbuf_thumb, sizeof(insns));
1031                 *((unsigned short*)insns + 13) = 0xdeff;
1032                 addr = branch_t16_dest(insn[0], (unsigned int)p->addr);
1033                 *((unsigned short*)insns + 14) = (addr & 0x0000ffff) | 0x1;
1034                 *((unsigned short*)insns + 15) = addr >> 16;
1035                 *((unsigned short*)insns + 16) = 0;
1036                 *((unsigned short*)insns + 17) = 0;
1037
1038         } else if (THUMB_INSN_MATCH(B1, insn[0])) {
1039                 memcpy(insns, b_cond_insn_execbuf_thumb, sizeof(insns));
1040                 *((unsigned short*)insns + 13) = 0xdeff;
1041                 *((unsigned short*)insns + 0) |= (insn[0] & 0xf00);
1042                 addr = branch_cond_t16_dest(insn[0], (unsigned int)p->addr);
1043                 *((unsigned short*)insns + 14) = (addr & 0x0000ffff) | 0x1;
1044                 *((unsigned short*)insns + 15) = addr >> 16;
1045                 addr = ((unsigned int)p->addr) + 2;
1046                 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
1047                 *((unsigned short*)insns + 17) = addr >> 16;
1048
1049         }else if (THUMB_INSN_MATCH(BLX2, insn[0]) || THUMB_INSN_MATCH(BX, insn[0])){
1050                 memcpy(insns, b_r_insn_execbuf_thumb, sizeof(insns));
1051                 *((unsigned short*)insns + 13) = 0xdeff;
1052                 *((unsigned short*)insns + 4) = insn[0];
1053                 addr = ((unsigned int)p->addr) + 2;
1054                 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
1055                 *((unsigned short*)insns + 17) = addr >> 16;
1056
1057         } else if (THUMB2_INSN_MATCH(BLX1, insn[0]) ||
1058                 THUMB2_INSN_MATCH(BL, insn[0])){
1059                 memcpy(insns, blx_off_insn_execbuf_thumb, sizeof(insns));
1060                 *((unsigned short*)insns + 13) = 0xdeff;
1061                 addr = branch_t32_dest(insn[0], (unsigned int)p->addr);
1062                 *((unsigned short*)insns + 14) = (addr & 0x0000ffff);
1063                 *((unsigned short*)insns + 15) = addr >> 16;
1064                 addr = ((unsigned int)p->addr) + 4;
1065                 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
1066                 *((unsigned short*)insns + 17) = addr >> 16;
1067         } else if (THUMB_INSN_MATCH(CBZ, insn[0])) {
1068                 memcpy(insns, cbz_insn_execbuf_thumb, sizeof(insns));
1069                 *((unsigned short*)insns + 13) = 0xdeff;
1070                 *((unsigned short*)insns + 0) = insn[0] &  (~insn[0] & 0xf8);
1071                 *((unsigned short*)insns + 0) &= 0x20;
1072                 addr = cbz_t16_dest(insn[0], (unsigned int)p->addr);
1073                 *((unsigned short*)insns + 14) = (addr & 0x0000ffff) | 0x1;
1074                 *((unsigned short*)insns + 15) = addr >> 16;
1075                 addr = ((unsigned int)p->addr) + 2;
1076                 *((unsigned short*)insns + 16) = (addr & 0x0000ffff) | 0x1;
1077                 *((unsigned short*)insns + 17) = addr >> 16;
1078         }
1079         if (!write_proc_vm_atomic (task, (unsigned long) p->ainsn.insn_thumb, insns, 18 * 2))
1080         {
1081                 panic("failed to write memory %p!\n", p->ainsn.insn_thumb);
1082                 // Mr_Nobody: we have to panic, really??...
1083                 //free_insn_slot (&uprobe_insn_pages, task, p->ainsn.insn_thumb, 0);
1084                 //return -EINVAL;
1085         }
1086         return 0;
1087 }
1088
1089 static int check_validity_insn(struct kprobe *p, struct pt_regs *regs, struct task_struct *task)
1090 {
1091         struct kprobe *kp;
1092
1093         if (unlikely(thumb_mode(regs))) {
1094                 if (p->safe_thumb != 1) {
1095                         p->ainsn.insn = p->ainsn.insn_thumb;
1096                         list_for_each_entry_rcu(kp, &p->list, list) {
1097                                 kp->ainsn.insn = p->ainsn.insn_thumb;
1098                         }
1099                 } else {
1100                         printk("Error in %s at %d: we are in thumb mode (!) and check instruction was fail \
1101                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1102                         // Test case when we do our actions on already running application
1103                         arch_disarm_uprobe(p, task);
1104                         return -1;
1105                 }
1106         } else {
1107                 if (p->safe_arm != 1) {
1108                         p->ainsn.insn = p->ainsn.insn_arm;
1109                         list_for_each_entry_rcu(kp, &p->list, list) {
1110                                 kp->ainsn.insn = p->ainsn.insn_arm;
1111                         }
1112                 } else {
1113                         printk("Error in %s at %d: we are in arm mode (!) and check instruction was fail \
1114                                 (%0lX instruction at %p address)!\n", __FILE__, __LINE__, p->opcode, p->addr);
1115                         // Test case when we do our actions on already running application
1116                         arch_disarm_uprobe(p, task);
1117                         return -1;
1118                 }
1119         }
1120
1121         return 0;
1122 }
1123
1124 static int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
1125 {
1126         int ret;
1127         unsigned long flags;
1128         local_irq_save(flags);
1129         ret = kprobe_handler(regs);
1130         local_irq_restore(flags);
1131         return ret;
1132 }
1133
1134 #ifdef TRAP_OVERHEAD_DEBUG
1135 static unsigned long trap_handler_counter_debug = 0;
1136 #define SAMPLING_COUNTER                               100000
1137 #endif
1138
1139 int kprobe_handler(struct pt_regs *regs)
1140 {
1141         int err_out = 0;
1142         char *msg_out = NULL;
1143         unsigned long user_m = user_mode(regs);
1144         pid_t tgid = (user_m) ? current->tgid : 0;
1145         kprobe_opcode_t *addr = (kprobe_opcode_t *) (regs->ARM_pc);
1146
1147         struct kprobe *p = NULL, *p_run = NULL;
1148         int ret = 0, retprobe = 0, reenter = 0;
1149         kprobe_opcode_t *ssaddr = NULL;
1150         struct kprobe_ctlblk *kcb;
1151
1152 #ifdef SUPRESS_BUG_MESSAGES
1153         int swap_oops_in_progress;
1154         // oops_in_progress used to avoid BUG() messages that slow down kprobe_handler() execution
1155         swap_oops_in_progress = oops_in_progress;
1156         oops_in_progress = 1;
1157 #endif
1158 #ifdef TRAP_OVERHEAD_DEBUG
1159         trap_handler_counter_debug++;
1160         if ( trap_handler_counter_debug < SAMPLING_COUNTER ) {
1161                 err_out = 0;
1162         }
1163         else {
1164                 // XXX NOTE - user must care about catching signal via signal handler to avoid hanging!
1165                 printk("Trap %ld reached - send SIGUSR1\n", trap_handler_counter_debug);
1166                 kill_pid(get_task_pid(current, PIDTYPE_PID), SIGUSR1, 1);
1167                 trap_handler_counter_debug = 0;
1168                 err_out = 0;
1169         }
1170         return err_out;
1171 #endif
1172 #ifdef OVERHEAD_DEBUG
1173         struct timeval swap_tv1;
1174         struct timeval swap_tv2;
1175 #define USEC_IN_SEC_NUM                         1000000
1176         do_gettimeofday(&swap_tv1);
1177 #endif
1178         preempt_disable();
1179
1180 //      printk("### kprobe_handler: task[tgid=%u (%s)] addr=%p\n", tgid, current->comm, addr);
1181         p = get_kprobe(addr, tgid);
1182
1183         if (user_m && p && (check_validity_insn(p, regs, current) != 0)) {
1184                 goto no_kprobe_live;
1185         }
1186
1187         /* We're in an interrupt, but this is clear and BUG()-safe. */
1188         kcb = get_kprobe_ctlblk ();
1189
1190         /* Check we're not actually recursing */
1191         // TODO: event is not saving in trace
1192         p_run = kprobe_running();
1193         if (p_run)
1194         {
1195                 DBPRINTF("lock???");
1196                 if (p)
1197                 {
1198                         if (!tgid && (addr == (kprobe_opcode_t *)kretprobe_trampoline)) {
1199                                 save_previous_kprobe(kcb, p_run);
1200                                 kcb->kprobe_status = KPROBE_REENTER;
1201                                 reenter = 1;
1202                         } else {
1203                                 /* We have reentered the kprobe_handler(), since
1204                                  * another probe was hit while within the handler.
1205                                  * We here save the original kprobes variables and
1206                                  * just single step on the instruction of the new probe
1207                                  * without calling any user handlers.
1208                                  */
1209                                 kprobes_inc_nmissed_count (p);
1210                                 prepare_singlestep (p, regs);
1211
1212                                 err_out = 0;
1213                                 goto out;
1214                         }
1215                 } else {
1216                         if(tgid) { //we can reenter probe upon uretprobe exception
1217                                 DBPRINTF ("check for UNDEF_INSTRUCTION %p\n", addr);
1218                                 // UNDEF_INSTRUCTION from user space
1219
1220                                 p = get_kprobe_by_insn_slot(addr, tgid, regs);
1221                                 if (p) {
1222                                         save_previous_kprobe(kcb, p_run);
1223                                         kcb->kprobe_status = KPROBE_REENTER;
1224                                         reenter = 1;
1225                                         retprobe = 1;
1226                                         DBPRINTF ("uretprobe %p\n", addr);
1227                                 }
1228                         }
1229                         if(!p) {
1230                                 p = p_run;
1231                                 DBPRINTF ("kprobe_running !!! p = 0x%p p->break_handler = 0x%p", p, p->break_handler);
1232                                 /*if (p->break_handler && p->break_handler(p, regs)) {
1233                                   DBPRINTF("kprobe_running !!! goto ss");
1234                                   goto ss_probe;
1235                                   } */
1236                                 DBPRINTF ("unknown uprobe at %p cur at %p/%p\n", addr, p->addr, p->ainsn.insn);
1237                                 if (tgid)
1238                                         ssaddr = p->ainsn.insn + UPROBES_TRAMP_SS_BREAK_IDX;
1239                                 else
1240                                         ssaddr = p->ainsn.insn + KPROBES_TRAMP_SS_BREAK_IDX;
1241                                 if (addr == ssaddr) {
1242                                         regs->ARM_pc = (unsigned long) (p->addr + 1);
1243                                         DBPRINTF ("finish step at %p cur at %p/%p, redirect to %lx\n", addr, p->addr, p->ainsn.insn, regs->ARM_pc);
1244                                         if (kcb->kprobe_status == KPROBE_REENTER) {
1245                                                 restore_previous_kprobe(kcb);
1246                                         } else {
1247                                                 reset_current_kprobe();
1248                                         }
1249                                 }
1250                                 DBPRINTF ("kprobe_running !!! goto no");
1251                                 ret = 1;
1252                                 /* If it's not ours, can't be delete race, (we hold lock). */
1253                                 DBPRINTF ("no_kprobe");
1254                                 goto no_kprobe;
1255                         }
1256                 }
1257         }
1258
1259         if (!p) {
1260                 if (tgid) {
1261                         DBPRINTF ("search UNDEF_INSTRUCTION %p\n", addr);
1262                         // UNDEF_INSTRUCTION from user space
1263
1264                         p = get_kprobe_by_insn_slot(addr, tgid, regs);
1265                         if (!p) {
1266                                 /* Not one of ours: let kernel handle it */
1267                                 DBPRINTF ("no_kprobe");
1268                                 goto no_kprobe;
1269                         }
1270                         retprobe = 1;
1271                         DBPRINTF ("uretprobe %p\n", addr);
1272                 } else {
1273                         /* Not one of ours: let kernel handle it */
1274                         DBPRINTF ("no_kprobe");
1275                         goto no_kprobe;
1276                 }
1277         }
1278         // restore opcode for thumb app
1279         if (user_mode( regs ) && thumb_mode( regs )) {
1280                 if (!isThumb2(p->opcode)) {
1281                         unsigned long tmp = p->opcode >> 16;
1282                         write_proc_vm_atomic(current, (unsigned long)((unsigned short*)p->addr + 1), &tmp, 2);
1283
1284                         // "2*sizeof(kprobe_opcode_t)" - strange. Should be "sizeof(kprobe_opcode_t)", need to test
1285                         flush_icache_range((unsigned int) p->addr, ((unsigned int)p->addr) + (2 * sizeof(kprobe_opcode_t)));
1286                 }
1287         }
1288         set_current_kprobe(p, NULL, NULL);
1289         if(!reenter)
1290                 kcb->kprobe_status = KPROBE_HIT_ACTIVE;
1291         if (retprobe) {         //(einsn == UNDEF_INSTRUCTION)
1292                 ret = trampoline_probe_handler (p, regs);
1293         } else if (p->pre_handler) {
1294                 ret = p->pre_handler (p, regs);
1295                 if(p->pre_handler != trampoline_probe_handler) {
1296                         reset_current_kprobe();
1297                 }
1298         }
1299
1300         if (ret) {
1301                 /* handler has already set things up, so skip ss setup */
1302                 err_out = 0;
1303                 goto out;
1304         }
1305
1306 no_kprobe:
1307         msg_out = "no_kprobe\n";
1308         err_out = 1;            // return with death
1309         goto out;
1310
1311 no_kprobe_live:
1312         msg_out = "no_kprobe live\n";
1313         err_out = 0;            // ok - life is life
1314         goto out;
1315
1316 out:
1317         preempt_enable_no_resched();
1318 #ifdef OVERHEAD_DEBUG
1319         do_gettimeofday(&swap_tv2);
1320         swap_sum_hit++;
1321         swap_sum_time += ((swap_tv2.tv_sec - swap_tv1.tv_sec) *  USEC_IN_SEC_NUM +
1322                 (swap_tv2.tv_usec - swap_tv1.tv_usec));
1323 #endif
1324 #ifdef SUPRESS_BUG_MESSAGES
1325         oops_in_progress = swap_oops_in_progress;
1326 #endif
1327
1328         if(msg_out) {
1329                 printk(msg_out);
1330         }
1331
1332         return err_out;
1333 }
1334
1335 int setjmp_pre_handler (struct kprobe *p, struct pt_regs *regs)
1336 {
1337         struct jprobe *jp = container_of (p, struct jprobe, kp);
1338         kprobe_pre_entry_handler_t pre_entry;
1339         entry_point_t entry;
1340
1341 # ifdef REENTER
1342 //      p = kprobe_running(regs);
1343 # endif
1344
1345         DBPRINTF ("pjp = 0x%p jp->entry = 0x%p", jp, jp->entry);
1346         entry = (entry_point_t) jp->entry;
1347         pre_entry = (kprobe_pre_entry_handler_t) jp->pre_entry;
1348         //if(!entry)
1349         //      DIE("entry NULL", regs)
1350         DBPRINTF ("entry = 0x%p jp->entry = 0x%p", entry, jp->entry);
1351
1352         //call handler for all kernel probes and user space ones which belong to current tgid
1353         if (!p->tgid || (p->tgid == current->tgid))
1354         {
1355                 if(!p->tgid && ((unsigned int)p->addr == sched_addr) && sched_rp) {
1356                         struct thread_info *tinfo = (struct thread_info *)regs->ARM_r2;
1357                         patch_suspended_task(sched_rp, tinfo->task, regs);
1358                 }
1359                 if (pre_entry)
1360                         p->ss_addr = (void *)pre_entry (jp->priv_arg, regs);
1361                 if (entry){
1362                         entry (regs->ARM_r0, regs->ARM_r1, regs->ARM_r2, regs->ARM_r3, regs->ARM_r4, regs->ARM_r5);
1363                 }
1364                 else {
1365                         if (p->tgid)
1366                                 dbi_arch_uprobe_return ();
1367                         else
1368                                 dbi_jprobe_return ();
1369                 }
1370         }
1371         else if (p->tgid)
1372                 dbi_arch_uprobe_return ();
1373
1374         prepare_singlestep (p, regs);
1375
1376         return 1;
1377 }
1378
1379 void dbi_jprobe_return (void)
1380 {
1381 }
1382
1383 void dbi_arch_uprobe_return (void)
1384 {
1385 }
1386
1387 int longjmp_break_handler (struct kprobe *p, struct pt_regs *regs)
1388 {
1389 # ifndef REENTER
1390         //kprobe_opcode_t insn = BREAKPOINT_INSTRUCTION;
1391         kprobe_opcode_t insns[2];
1392
1393         if (p->pid)
1394         {
1395                 insns[0] = BREAKPOINT_INSTRUCTION;
1396                 insns[1] = p->opcode;
1397                 //p->opcode = *p->addr;
1398                 if (read_proc_vm_atomic (current, (unsigned long) (p->addr), &(p->opcode), sizeof (p->opcode)) < sizeof (p->opcode))
1399                 {
1400                         printk ("ERROR[%lu]: failed to read vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1401                         return -1;
1402                 }
1403                 //*p->addr = BREAKPOINT_INSTRUCTION;
1404                 //*(p->addr+1) = p->opcode;
1405                 if (write_proc_vm_atomic (current, (unsigned long) (p->addr), insns, sizeof (insns)) < sizeof (insns))
1406                 {
1407                         printk ("ERROR[%lu]: failed to write vm of proc %s/%u addr %p.", nCount, current->comm, current->pid, p->addr);
1408                         return -1;
1409                 }
1410         }
1411         else
1412         {
1413                 DBPRINTF ("p->opcode = 0x%lx *p->addr = 0x%lx p->addr = 0x%p\n", p->opcode, *p->addr, p->addr);
1414                 *(p->addr + 1) = p->opcode;
1415                 p->opcode = *p->addr;
1416                 *p->addr = BREAKPOINT_INSTRUCTION;
1417
1418                 flush_icache_range ((unsigned int) p->addr, (unsigned int) (((unsigned int) p->addr) + (sizeof (kprobe_opcode_t) * 2)));
1419         }
1420
1421         reset_current_kprobe();
1422
1423 #endif //REENTER
1424
1425         return 0;
1426 }
1427
1428
1429 void arch_arm_kprobe (struct kprobe *p)
1430 {
1431         *p->addr = BREAKPOINT_INSTRUCTION;
1432         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1433 }
1434
1435 void arch_disarm_kprobe (struct kprobe *p)
1436 {
1437         *p->addr = p->opcode;
1438         flush_icache_range ((unsigned long) p->addr, (unsigned long) p->addr + sizeof (kprobe_opcode_t));
1439 }
1440
1441
1442 int trampoline_probe_handler (struct kprobe *p, struct pt_regs *regs)
1443 {
1444         struct kretprobe_instance *ri = NULL;
1445         struct hlist_head *head;
1446         struct hlist_node *node, *tmp;
1447         unsigned long flags, orig_ret_address = 0;
1448         unsigned long trampoline_address = (unsigned long) &kretprobe_trampoline;
1449         unsigned long ret = 1;
1450
1451         struct kretprobe *crp = NULL;
1452         struct kprobe_ctlblk *kcb = get_kprobe_ctlblk ();
1453
1454         DBPRINTF ("start");
1455
1456         if (p && p->tgid){
1457                 // in case of user space retprobe trampoline is at the Nth instruction of US tramp
1458                 if (!thumb_mode( regs ))
1459                         trampoline_address = (unsigned long)(p->ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1460                 else
1461                         trampoline_address = (unsigned long)(p->ainsn.insn) + 0x1b;
1462         }
1463
1464         spin_lock_irqsave (&kretprobe_lock, flags);
1465
1466         /*
1467          * We are using different hash keys (current and mm) for finding kernel
1468          * space and user space probes.  Kernel space probes can change mm field in
1469          * task_struct.  User space probes can be shared between threads of one
1470          * process so they have different current but same mm.
1471          */
1472         if (p && p->tgid) {
1473                 head = kretprobe_inst_table_head(current->mm);
1474         } else {
1475                 head = kretprobe_inst_table_head(current);
1476         }
1477
1478         /*
1479          * It is possible to have multiple instances associated with a given
1480          * task either because an multiple functions in the call path
1481          * have a return probe installed on them, and/or more then one
1482          * return probe was registered for a target function.
1483          *
1484          * We can handle this because:
1485          *     - instances are always inserted at the head of the list
1486          *     - when multiple return probes are registered for the same
1487          *       function, the first instance's ret_addr will point to the
1488          *       real return address, and all the rest will point to
1489          *       kretprobe_trampoline
1490          */
1491         swap_hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1492         {
1493                 if (ri->task != current)
1494                         /* another task is sharing our hash bucket */
1495                         continue;
1496                 if (ri->rp && ri->rp->handler){
1497                         ri->rp->handler (ri, regs, ri->rp->priv_arg);
1498                 }
1499
1500                 orig_ret_address = (unsigned long) ri->ret_addr;
1501                 recycle_rp_inst (ri);
1502                 if (orig_ret_address != trampoline_address)
1503                         /*
1504                          * This is the real return address. Any other
1505                          * instances associated with this task are for
1506                          * other calls deeper on the call stack
1507                          */
1508                         break;
1509         }
1510         kretprobe_assert (ri, orig_ret_address, trampoline_address);
1511         //BUG_ON(!orig_ret_address || (orig_ret_address == trampoline_address));
1512         //E.G. Check this code in case of __switch_to function instrumentation -- currently this code generates dump in this case
1513         //if (trampoline_address != (unsigned long) &kretprobe_trampoline){
1514         //if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1515         //if (ri->rp) BUG_ON (ri->rp->kp.tgid == 0);
1516         //else if (ri->rp2) BUG_ON (ri->rp2->kp.tgid == 0);
1517         //}
1518         if ((ri->rp && ri->rp->kp.tgid) || (ri->rp2 && ri->rp2->kp.tgid))
1519                 BUG_ON (trampoline_address == (unsigned long) &kretprobe_trampoline);
1520
1521         if (p && p->tgid)
1522                 regs->uregs[14] = orig_ret_address;
1523
1524         DBPRINTF ("regs->uregs[14] = 0x%lx\n", regs->uregs[14]);
1525         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1526
1527         if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1528         {
1529                 regs->uregs[15] = orig_ret_address;
1530         }else{
1531                 ret = (void *)orig_ret_address;
1532         }
1533
1534         DBPRINTF ("regs->uregs[15] = 0x%lx\n", regs->uregs[15]);
1535
1536         if(p){ // ARM, MIPS, X86 user space
1537                 if (thumb_mode( regs ) && !(regs->uregs[14] & 0x01))
1538                 {
1539                         regs->ARM_cpsr &= 0xFFFFFFDF;
1540                 }else{
1541                         if (user_mode( regs ) && (regs->uregs[14] & 0x01))
1542                         {
1543                                 regs->ARM_cpsr |= 0x20;
1544                         }
1545                 }
1546
1547                 //TODO: test - enter function, delete us retprobe, exit function
1548                 // for user space retprobes only - deferred deletion
1549
1550                 if (trampoline_address != (unsigned long) &kretprobe_trampoline)
1551                 {
1552                         // if we are not at the end of the list and current retprobe should be disarmed
1553                         if (node && ri->rp2)
1554                         {
1555                                 struct hlist_node *current_node = node;
1556                                 crp = ri->rp2;
1557                                 /*sprintf(die_msg, "deferred disarm p->addr = %p [%lx %lx %lx]\n",
1558                                   crp->kp.addr, *kaddrs[0], *kaddrs[1], *kaddrs[2]);
1559                                   DIE(die_msg, regs); */
1560                                 // look for other instances for the same retprobe
1561                                 swap_hlist_for_each_entry_safe (ri, node, tmp, head, hlist)
1562                                 {
1563                                         /*
1564                                          * Trying to find another retprobe instance associated with
1565                                          * the same retprobe.
1566                                          */
1567                                         if (ri->rp2 == crp && node != current_node)
1568                                                 break;
1569                                 }
1570
1571                                 if (!node)
1572                                 {
1573                                         // if there are no more instances for this retprobe
1574                                         // delete retprobe
1575                                         struct kprobe *is_p = &crp->kp;
1576                                         DBPRINTF ("defered retprobe deletion p->addr = %p", crp->kp.addr);
1577                                         /*
1578                                           If there is no any retprobe instances of this retprobe
1579                                           we can free the resources related to the probe.
1580                                          */
1581                                         if (!(hlist_unhashed(&is_p->is_hlist_arm))) {
1582                                                 hlist_del_rcu(&is_p->is_hlist_arm);
1583                                         }
1584                                         if (!(hlist_unhashed(&is_p->is_hlist_thumb))) {
1585                                                 hlist_del_rcu(&is_p->is_hlist_thumb);
1586                                         }
1587                                         unregister_uprobe (&crp->kp, current, 1);
1588                                         kfree (crp);
1589                                 }
1590                                 hlist_del(current_node);
1591                         }
1592                 }
1593
1594                 if (kcb->kprobe_status == KPROBE_REENTER) {
1595                         restore_previous_kprobe(kcb);
1596                 } else {
1597                         reset_current_kprobe();
1598                 }
1599         }
1600
1601         spin_unlock_irqrestore (&kretprobe_lock, flags);
1602
1603         /*
1604          * By returning a non-zero value, we are telling
1605          * kprobe_handler() that we don't want the post_handler
1606          * to run (and have re-enabled preemption)
1607          */
1608
1609         return ret;
1610 }
1611
1612 void __naked kretprobe_trampoline(void)
1613 {
1614         __asm__ __volatile__ (
1615                 "stmdb  sp!, {r0 - r11}         \n\t"
1616                 "mov    r1, sp                  \n\t"
1617                 "mov    r0, #0                  \n\t"
1618                 "bl     trampoline_probe_handler\n\t"
1619                 "mov    lr, r0                  \n\t"
1620                 "ldmia  sp!, {r0 - r11}         \n\t"
1621                 "bx     lr                      \n\t"
1622                 : : : "memory");
1623 }
1624
1625 void  __arch_prepare_kretprobe (struct kretprobe *rp, struct pt_regs *regs)
1626 {
1627         struct kretprobe_instance *ri;
1628
1629         DBPRINTF ("start\n");
1630         //TODO: test - remove retprobe after func entry but before its exit
1631         if ((ri = get_free_rp_inst (rp)) != NULL)
1632         {
1633                 ri->rp = rp;
1634                 ri->rp2 = NULL;
1635                 ri->task = current;
1636                 ri->ret_addr = (kprobe_opcode_t *) regs->uregs[14];
1637                 ri->sp = (kprobe_opcode_t *)regs->ARM_sp; //uregs[13];
1638
1639                 /* Set flag of current mode */
1640                 ri->sp = (kprobe_opcode_t *)((long)ri->sp | !!thumb_mode(regs));
1641
1642                 if (rp->kp.tgid)
1643                         if (!thumb_mode( regs ))
1644                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn + UPROBES_TRAMP_RET_BREAK_IDX);
1645                         else
1646                                 regs->uregs[14] = (unsigned long) (rp->kp.ainsn.insn) + 0x1b;
1647
1648                 else    /* Replace the return addr with trampoline addr */
1649                         regs->uregs[14] = (unsigned long) &kretprobe_trampoline;
1650
1651 //              DBPRINTF ("ret addr set to %p->%lx\n", ri->ret_addr, regs->uregs[14]);
1652                 add_rp_inst (ri);
1653         }
1654         else {
1655                 DBPRINTF ("WARNING: missed retprobe %p\n", rp->kp.addr);
1656                 rp->nmissed++;
1657         }
1658 }
1659
1660
1661 int asm_init_module_dependencies(void)
1662 {
1663         //No module dependencies
1664         return 0;
1665 }
1666
1667 typedef void (* kpro_type)(struct undef_hook *);
1668 static kpro_type do_kpro;
1669 static kpro_type undo_kpro;
1670
1671 // kernel probes hook
1672 static struct undef_hook undef_ho_k = {
1673     .instr_mask = 0xffffffff,
1674     .instr_val  = BREAKPOINT_INSTRUCTION,
1675     .cpsr_mask  = MODE_MASK,
1676     .cpsr_val   = SVC_MODE,
1677     .fn         = kprobe_trap_handler
1678 };
1679
1680 // userspace probes hook (arm)
1681 static struct undef_hook undef_ho_u = {
1682     .instr_mask = 0xffffffff,
1683     .instr_val  = BREAKPOINT_INSTRUCTION,
1684     .cpsr_mask  = MODE_MASK,
1685     .cpsr_val   = USR_MODE,
1686     .fn         = kprobe_trap_handler
1687 };
1688
1689 // userspace probes hook (thumb)
1690 static struct undef_hook undef_ho_u_t = {
1691     .instr_mask = 0xffffffff,
1692     .instr_val  = BREAKPOINT_INSTRUCTION & 0x0000ffff,
1693     .cpsr_mask  = MODE_MASK,
1694     .cpsr_val   = USR_MODE,
1695     .fn         = kprobe_trap_handler
1696 };
1697
1698 int __init arch_init_kprobes (void)
1699 {
1700         unsigned int do_bp_handler = 0;
1701         int ret = 0;
1702
1703         if (arch_init_module_dependencies())
1704         {
1705                 DBPRINTF ("Unable to init module dependencies\n");
1706                 return -1;
1707         }
1708
1709         do_bp_handler = swap_ksyms("do_undefinstr");
1710         if (do_bp_handler == 0) {
1711                 DBPRINTF("no do_undefinstr symbol found!");
1712                 return -1;
1713         }
1714         arr_traps_template[NOTIFIER_CALL_CHAIN_INDEX] = arch_construct_brunch ((unsigned int)kprobe_handler, do_bp_handler + NOTIFIER_CALL_CHAIN_INDEX * 4, 1);
1715         // Register hooks (kprobe_handler)
1716         do_kpro = (kpro_type)swap_ksyms("register_undef_hook");
1717         if (do_kpro == NULL) {
1718                 printk("no register_undef_hook symbol found!\n");
1719                 return -1;
1720         }
1721
1722         // Unregister hooks (kprobe_handler)
1723         undo_kpro = (kpro_type)swap_ksyms("unregister_undef_hook");
1724         if (undo_kpro == NULL) {
1725                 printk("no unregister_undef_hook symbol found!\n");
1726                 return -1;
1727         }
1728
1729         do_kpro(&undef_ho_k);
1730         do_kpro(&undef_ho_u);
1731         do_kpro(&undef_ho_u_t);
1732         return ret;
1733 }
1734
1735 void __exit dbi_arch_exit_kprobes (void)
1736 {
1737         dbi_unregister_kprobe(&trampoline_p, NULL);
1738         undo_kpro(&undef_ho_u_t);
1739         undo_kpro(&undef_ho_u);
1740         undo_kpro(&undef_ho_k);
1741 }
1742
1743 //EXPORT_SYMBOL_GPL (dbi_arch_uprobe_return);
1744 //EXPORT_SYMBOL_GPL (dbi_arch_exit_kprobes);