1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017-2018 Bartosz Golaszewski <brgl@bgdev.pl>
4 * Copyright (C) 2020 Bartosz Golaszewski <bgolaszewski@baylibre.com>
8 #include <linux/irq_sim.h>
9 #include <linux/irq_work.h>
10 #include <linux/interrupt.h>
11 #include <linux/slab.h>
13 struct irq_sim_work_ctx {
16 unsigned int irq_count;
17 unsigned long *pending;
18 struct irq_domain *domain;
21 struct irq_sim_irq_ctx {
24 struct irq_sim_work_ctx *work_ctx;
27 struct irq_sim_devres {
28 struct irq_domain *domain;
31 static void irq_sim_irqmask(struct irq_data *data)
33 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
35 irq_ctx->enabled = false;
38 static void irq_sim_irqunmask(struct irq_data *data)
40 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
42 irq_ctx->enabled = true;
45 static int irq_sim_set_type(struct irq_data *data, unsigned int type)
47 /* We only support rising and falling edge trigger types. */
48 if (type & ~IRQ_TYPE_EDGE_BOTH)
51 irqd_set_trigger_type(data, type);
56 static int irq_sim_get_irqchip_state(struct irq_data *data,
57 enum irqchip_irq_state which, bool *state)
59 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
60 irq_hw_number_t hwirq = irqd_to_hwirq(data);
63 case IRQCHIP_STATE_PENDING:
65 *state = test_bit(hwirq, irq_ctx->work_ctx->pending);
74 static int irq_sim_set_irqchip_state(struct irq_data *data,
75 enum irqchip_irq_state which, bool state)
77 struct irq_sim_irq_ctx *irq_ctx = irq_data_get_irq_chip_data(data);
78 irq_hw_number_t hwirq = irqd_to_hwirq(data);
81 case IRQCHIP_STATE_PENDING:
82 if (irq_ctx->enabled) {
83 assign_bit(hwirq, irq_ctx->work_ctx->pending, state);
85 irq_work_queue(&irq_ctx->work_ctx->work);
95 static struct irq_chip irq_sim_irqchip = {
97 .irq_mask = irq_sim_irqmask,
98 .irq_unmask = irq_sim_irqunmask,
99 .irq_set_type = irq_sim_set_type,
100 .irq_get_irqchip_state = irq_sim_get_irqchip_state,
101 .irq_set_irqchip_state = irq_sim_set_irqchip_state,
104 static void irq_sim_handle_irq(struct irq_work *work)
106 struct irq_sim_work_ctx *work_ctx;
107 unsigned int offset = 0;
110 work_ctx = container_of(work, struct irq_sim_work_ctx, work);
112 while (!bitmap_empty(work_ctx->pending, work_ctx->irq_count)) {
113 offset = find_next_bit(work_ctx->pending,
114 work_ctx->irq_count, offset);
115 clear_bit(offset, work_ctx->pending);
116 irqnum = irq_find_mapping(work_ctx->domain, offset);
117 handle_simple_irq(irq_to_desc(irqnum));
121 static int irq_sim_domain_map(struct irq_domain *domain,
122 unsigned int virq, irq_hw_number_t hw)
124 struct irq_sim_work_ctx *work_ctx = domain->host_data;
125 struct irq_sim_irq_ctx *irq_ctx;
127 irq_ctx = kzalloc(sizeof(*irq_ctx), GFP_KERNEL);
131 irq_set_chip(virq, &irq_sim_irqchip);
132 irq_set_chip_data(virq, irq_ctx);
133 irq_set_handler(virq, handle_simple_irq);
134 irq_modify_status(virq, IRQ_NOREQUEST | IRQ_NOAUTOEN, IRQ_NOPROBE);
135 irq_ctx->work_ctx = work_ctx;
140 static void irq_sim_domain_unmap(struct irq_domain *domain, unsigned int virq)
142 struct irq_sim_irq_ctx *irq_ctx;
143 struct irq_data *irqd;
145 irqd = irq_domain_get_irq_data(domain, virq);
146 irq_ctx = irq_data_get_irq_chip_data(irqd);
148 irq_set_handler(virq, NULL);
149 irq_domain_reset_irq_data(irqd);
153 static const struct irq_domain_ops irq_sim_domain_ops = {
154 .map = irq_sim_domain_map,
155 .unmap = irq_sim_domain_unmap,
159 * irq_domain_create_sim - Create a new interrupt simulator irq_domain and
160 * allocate a range of dummy interrupts.
162 * @fnode: struct fwnode_handle to be associated with this domain.
163 * @num_irqs: Number of interrupts to allocate.
165 * On success: return a new irq_domain object.
166 * On failure: a negative errno wrapped with ERR_PTR().
168 struct irq_domain *irq_domain_create_sim(struct fwnode_handle *fwnode,
169 unsigned int num_irqs)
171 struct irq_sim_work_ctx *work_ctx;
173 work_ctx = kmalloc(sizeof(*work_ctx), GFP_KERNEL);
177 work_ctx->pending = bitmap_zalloc(num_irqs, GFP_KERNEL);
178 if (!work_ctx->pending)
179 goto err_free_work_ctx;
181 work_ctx->domain = irq_domain_create_linear(fwnode, num_irqs,
184 if (!work_ctx->domain)
185 goto err_free_bitmap;
187 work_ctx->irq_count = num_irqs;
188 init_irq_work(&work_ctx->work, irq_sim_handle_irq);
190 return work_ctx->domain;
193 bitmap_free(work_ctx->pending);
197 return ERR_PTR(-ENOMEM);
199 EXPORT_SYMBOL_GPL(irq_domain_create_sim);
202 * irq_domain_remove_sim - Deinitialize the interrupt simulator domain: free
203 * the interrupt descriptors and allocated memory.
205 * @domain: The interrupt simulator domain to tear down.
207 void irq_domain_remove_sim(struct irq_domain *domain)
209 struct irq_sim_work_ctx *work_ctx = domain->host_data;
211 irq_work_sync(&work_ctx->work);
212 bitmap_free(work_ctx->pending);
215 irq_domain_remove(domain);
217 EXPORT_SYMBOL_GPL(irq_domain_remove_sim);
219 static void devm_irq_domain_release_sim(struct device *dev, void *res)
221 struct irq_sim_devres *this = res;
223 irq_domain_remove_sim(this->domain);
227 * devm_irq_domain_create_sim - Create a new interrupt simulator for
230 * @dev: Device to initialize the simulator object for.
231 * @fnode: struct fwnode_handle to be associated with this domain.
232 * @num_irqs: Number of interrupts to allocate
234 * On success: return a new irq_domain object.
235 * On failure: a negative errno wrapped with ERR_PTR().
237 struct irq_domain *devm_irq_domain_create_sim(struct device *dev,
238 struct fwnode_handle *fwnode,
239 unsigned int num_irqs)
241 struct irq_sim_devres *dr;
243 dr = devres_alloc(devm_irq_domain_release_sim,
244 sizeof(*dr), GFP_KERNEL);
246 return ERR_PTR(-ENOMEM);
248 dr->domain = irq_domain_create_sim(fwnode, num_irqs);
249 if (IS_ERR(dr->domain)) {
257 EXPORT_SYMBOL_GPL(devm_irq_domain_create_sim);