1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright 2017 Thomas Gleixner <tglx@linutronix.de>
4 #include <linux/irqdomain.h>
6 #include <linux/uaccess.h>
10 static struct dentry *irq_dir;
12 struct irq_bit_descr {
16 #define BIT_MASK_DESCR(m) { .mask = m, .name = #m }
18 static void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
19 const struct irq_bit_descr *sd, int size)
23 for (i = 0; i < size; i++, sd++) {
25 seq_printf(m, "%*s%s\n", ind + 12, "", sd->name);
30 static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
32 struct irq_data *data = irq_desc_get_irq_data(desc);
33 const struct cpumask *msk;
35 msk = irq_data_get_affinity_mask(data);
36 seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk));
37 #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
38 msk = irq_data_get_effective_affinity_mask(data);
39 seq_printf(m, "effectiv: %*pbl\n", cpumask_pr_args(msk));
41 #ifdef CONFIG_GENERIC_PENDING_IRQ
42 msk = desc->pending_mask;
43 seq_printf(m, "pending: %*pbl\n", cpumask_pr_args(msk));
47 static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
50 static const struct irq_bit_descr irqchip_flags[] = {
51 BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
52 BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
53 BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
54 BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
55 BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
56 BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
57 BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
58 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
59 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
60 BIT_MASK_DESCR(IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND),
61 BIT_MASK_DESCR(IRQCHIP_IMMUTABLE),
65 irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
67 struct irq_chip *chip = data->chip;
70 seq_printf(m, "chip: None\n");
73 seq_printf(m, "%*schip: ", ind, "");
74 if (chip->irq_print_chip)
75 chip->irq_print_chip(data, m);
77 seq_printf(m, "%s", chip->name);
78 seq_printf(m, "\n%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
79 irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
80 ARRAY_SIZE(irqchip_flags));
84 irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
86 seq_printf(m, "%*sdomain: %s\n", ind, "",
87 data->domain ? data->domain->name : "");
88 seq_printf(m, "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq);
89 irq_debug_show_chip(m, data, ind + 1);
90 if (data->domain && data->domain->ops && data->domain->ops->debug_show)
91 data->domain->ops->debug_show(m, NULL, data, ind + 1);
92 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
93 if (!data->parent_data)
95 seq_printf(m, "%*sparent:\n", ind + 1, "");
96 irq_debug_show_data(m, data->parent_data, ind + 4);
100 static const struct irq_bit_descr irqdata_states[] = {
101 BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
102 BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
103 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
104 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
105 BIT_MASK_DESCR(IRQD_LEVEL),
107 BIT_MASK_DESCR(IRQD_ACTIVATED),
108 BIT_MASK_DESCR(IRQD_IRQ_STARTED),
109 BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
110 BIT_MASK_DESCR(IRQD_IRQ_MASKED),
111 BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
113 BIT_MASK_DESCR(IRQD_PER_CPU),
114 BIT_MASK_DESCR(IRQD_NO_BALANCING),
116 BIT_MASK_DESCR(IRQD_SINGLE_TARGET),
117 BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
118 BIT_MASK_DESCR(IRQD_AFFINITY_SET),
119 BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
120 BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
121 BIT_MASK_DESCR(IRQD_AFFINITY_ON_ACTIVATE),
122 BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
123 BIT_MASK_DESCR(IRQD_CAN_RESERVE),
124 BIT_MASK_DESCR(IRQD_MSI_NOMASK_QUIRK),
126 BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
128 BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
129 BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
131 BIT_MASK_DESCR(IRQD_DEFAULT_TRIGGER_SET),
133 BIT_MASK_DESCR(IRQD_HANDLE_ENFORCE_IRQCTX),
135 BIT_MASK_DESCR(IRQD_IRQ_ENABLED_ON_SUSPEND),
137 BIT_MASK_DESCR(IRQD_RESEND_WHEN_IN_PROGRESS),
140 static const struct irq_bit_descr irqdesc_states[] = {
141 BIT_MASK_DESCR(_IRQ_NOPROBE),
142 BIT_MASK_DESCR(_IRQ_NOREQUEST),
143 BIT_MASK_DESCR(_IRQ_NOTHREAD),
144 BIT_MASK_DESCR(_IRQ_NOAUTOEN),
145 BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
146 BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
147 BIT_MASK_DESCR(_IRQ_IS_POLLED),
148 BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
149 BIT_MASK_DESCR(_IRQ_HIDDEN),
152 static const struct irq_bit_descr irqdesc_istates[] = {
153 BIT_MASK_DESCR(IRQS_AUTODETECT),
154 BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
155 BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
156 BIT_MASK_DESCR(IRQS_ONESHOT),
157 BIT_MASK_DESCR(IRQS_REPLAY),
158 BIT_MASK_DESCR(IRQS_WAITING),
159 BIT_MASK_DESCR(IRQS_PENDING),
160 BIT_MASK_DESCR(IRQS_SUSPENDED),
161 BIT_MASK_DESCR(IRQS_NMI),
165 static int irq_debug_show(struct seq_file *m, void *p)
167 struct irq_desc *desc = m->private;
168 struct irq_data *data;
170 raw_spin_lock_irq(&desc->lock);
171 data = irq_desc_get_irq_data(desc);
172 seq_printf(m, "handler: %ps\n", desc->handle_irq);
173 seq_printf(m, "device: %s\n", desc->dev_name);
174 seq_printf(m, "status: 0x%08x\n", desc->status_use_accessors);
175 irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states,
176 ARRAY_SIZE(irqdesc_states));
177 seq_printf(m, "istate: 0x%08x\n", desc->istate);
178 irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates,
179 ARRAY_SIZE(irqdesc_istates));
180 seq_printf(m, "ddepth: %u\n", desc->depth);
181 seq_printf(m, "wdepth: %u\n", desc->wake_depth);
182 seq_printf(m, "dstate: 0x%08x\n", irqd_get(data));
183 irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states,
184 ARRAY_SIZE(irqdata_states));
185 seq_printf(m, "node: %d\n", irq_data_get_node(data));
186 irq_debug_show_masks(m, desc);
187 irq_debug_show_data(m, data, 0);
188 raw_spin_unlock_irq(&desc->lock);
192 static int irq_debug_open(struct inode *inode, struct file *file)
194 return single_open(file, irq_debug_show, inode->i_private);
197 static ssize_t irq_debug_write(struct file *file, const char __user *user_buf,
198 size_t count, loff_t *ppos)
200 struct irq_desc *desc = file_inode(file)->i_private;
201 char buf[8] = { 0, };
204 size = min(sizeof(buf) - 1, count);
205 if (copy_from_user(buf, user_buf, size))
208 if (!strncmp(buf, "trigger", size)) {
209 int err = irq_inject_interrupt(irq_desc_get_irq(desc));
211 return err ? err : count;
217 static const struct file_operations dfs_irq_ops = {
218 .open = irq_debug_open,
219 .write = irq_debug_write,
222 .release = single_release,
225 void irq_debugfs_copy_devname(int irq, struct device *dev)
227 struct irq_desc *desc = irq_to_desc(irq);
228 const char *name = dev_name(dev);
231 desc->dev_name = kstrdup(name, GFP_KERNEL);
234 void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
238 if (!irq_dir || !desc || desc->debugfs_file)
241 sprintf(name, "%d", irq);
242 desc->debugfs_file = debugfs_create_file(name, 0644, irq_dir, desc,
246 static int __init irq_debugfs_init(void)
248 struct dentry *root_dir;
251 root_dir = debugfs_create_dir("irq", NULL);
253 irq_domain_debugfs_init(root_dir);
255 irq_dir = debugfs_create_dir("irqs", root_dir);
258 for_each_active_irq(irq)
259 irq_add_debugfs_entry(irq, irq_to_desc(irq));
264 __initcall(irq_debugfs_init);