kernel/dma/direct.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2018 Christoph Hellwig.
   4  *
   5  * DMA operations that map physical memory directly without using an IOMMU.
   6  */
   7 #include <linux/memblock.h> /* for max_pfn */
   8 #include <linux/export.h>
   9 #include <linux/mm.h>
  10 #include <linux/dma-direct.h>
  11 #include <linux/scatterlist.h>
  12 #include <linux/dma-contiguous.h>
  13 #include <linux/dma-noncoherent.h>
  14 #include <linux/pfn.h>
  15 #include <linux/set_memory.h>
  16 #include <linux/swiotlb.h>
  17
  18 /*
  19  * Most architectures use ZONE_DMA for the first 16 Megabytes, but
  20  * some use it for entirely different regions:
  21  */
  22 #ifndef ARCH_ZONE_DMA_BITS
  23 #define ARCH_ZONE_DMA_BITS 24
  24 #endif
  25
  26 static void report_addr(struct device *dev, dma_addr_t dma_addr, size_t size)
  27 {
  28         if (!dev->dma_mask) {
  29                 dev_err_once(dev, "DMA map on device without dma_mask\n");
  30         } else if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) {
  31                 dev_err_once(dev,
  32                         "overflow %pad+%zu of DMA mask %llx bus mask %llx\n",
  33                         &dma_addr, size, *dev->dma_mask, dev->bus_dma_mask);
  34         }
  35         WARN_ON_ONCE(1);
  36 }
  37
  38 static inline dma_addr_t phys_to_dma_direct(struct device *dev,
  39                 phys_addr_t phys)
  40 {
  41         if (force_dma_unencrypted(dev))
  42                 return __phys_to_dma(dev, phys);
  43         return phys_to_dma(dev, phys);
  44 }
  45
  46 u64 dma_direct_get_required_mask(struct device *dev)
  47 {
  48         u64 max_dma = phys_to_dma_direct(dev, (max_pfn - 1) << PAGE_SHIFT);
  49
  50         if (dev->bus_dma_mask && dev->bus_dma_mask < max_dma)
  51                 max_dma = dev->bus_dma_mask;
  52
  53         return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
  54 }
  55
  56 static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
  57                 u64 *phys_mask)
  58 {
  59         if (dev->bus_dma_mask && dev->bus_dma_mask < dma_mask)
  60                 dma_mask = dev->bus_dma_mask;
  61
  62         if (force_dma_unencrypted(dev))
  63                 *phys_mask = __dma_to_phys(dev, dma_mask);
  64         else
  65                 *phys_mask = dma_to_phys(dev, dma_mask);
  66
  67         /*
  68          * Optimistically try the zone that the physical address mask falls
  69          * into first.  If that returns memory that isn't actually addressable
  70          * we will fallback to the next lower zone and try again.
  71          *
  72          * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
  73          * zones.
  74          */
  75         if (*phys_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS))
  76                 return GFP_DMA;
  77         if (*phys_mask <= DMA_BIT_MASK(32))
  78                 return GFP_DMA32;
  79         return 0;
  80 }
  81
  82 static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
  83 {
  84         return phys_to_dma_direct(dev, phys) + size - 1 <=
  85                         min_not_zero(dev->coherent_dma_mask, dev->bus_dma_mask);
  86 }
  87
  88 struct page *__dma_direct_alloc_pages(struct device *dev, size_t size,
  89                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
  90 {
  91         struct page *page = NULL;
  92         u64 phys_mask;
  93
  94         if (attrs & DMA_ATTR_NO_WARN)
  95                 gfp |= __GFP_NOWARN;
  96
  97         /* we always manually zero the memory once we are done: */
  98         gfp &= ~__GFP_ZERO;
  99         gfp |= __dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
 100                         &phys_mask);
 101 again:
 102         page = dma_alloc_contiguous(dev, size, gfp);
 103         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 104                 dma_free_contiguous(dev, page, size);
 105                 page = NULL;
 106
 107                 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
 108                     phys_mask < DMA_BIT_MASK(64) &&
 109                     !(gfp & (GFP_DMA32 | GFP_DMA))) {
 110                         gfp |= GFP_DMA32;
 111                         goto again;
 112                 }
 113
 114                 if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
 115                         gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
 116                         goto again;
 117                 }
 118         }
 119
 120         return page;
 121 }
 122
 123 void *dma_direct_alloc_pages(struct device *dev, size_t size,
 124                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 125 {
 126         struct page *page;
 127         void *ret;
 128
 129         page = __dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
 130         if (!page)
 131                 return NULL;
 132
 133         if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) {
 134                 /* remove any dirty cache lines on the kernel alias */
 135                 if (!PageHighMem(page))
 136                         arch_dma_prep_coherent(page, size);
 137                 /* return the page pointer as the opaque cookie */
 138                 return page;
 139         }
 140
 141         if (PageHighMem(page)) {
 142                 /*
 143                  * Depending on the cma= arguments and per-arch setup
 144                  * dma_alloc_contiguous could return highmem pages.
 145                  * Without remapping there is no way to return them here,
 146                  * so log an error and fail.
 147                  */
 148                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 149                 __dma_direct_free_pages(dev, size, page);
 150                 return NULL;
 151         }
 152
 153         ret = page_address(page);
 154         if (force_dma_unencrypted(dev)) {
 155                 set_memory_decrypted((unsigned long)ret, 1 << get_order(size));
 156                 *dma_handle = __phys_to_dma(dev, page_to_phys(page));
 157         } else {
 158                 *dma_handle = phys_to_dma(dev, page_to_phys(page));
 159         }
 160         memset(ret, 0, size);
 161
 162         if (IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 163             dma_alloc_need_uncached(dev, attrs)) {
 164                 arch_dma_prep_coherent(page, size);
 165                 ret = uncached_kernel_address(ret);
 166         }
 167
 168         return ret;
 169 }
 170
 171 void __dma_direct_free_pages(struct device *dev, size_t size, struct page *page)
 172 {
 173         dma_free_contiguous(dev, page, size);
 174 }
 175
 176 void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr,
 177                 dma_addr_t dma_addr, unsigned long attrs)
 178 {
 179         unsigned int page_order = get_order(size);
 180
 181         if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) {
 182                 /* cpu_addr is a struct page cookie, not a kernel address */
 183                 __dma_direct_free_pages(dev, size, cpu_addr);
 184                 return;
 185         }
 186
 187         if (force_dma_unencrypted(dev))
 188                 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order);
 189
 190         if (IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 191             dma_alloc_need_uncached(dev, attrs))
 192                 cpu_addr = cached_kernel_address(cpu_addr);
 193         __dma_direct_free_pages(dev, size, virt_to_page(cpu_addr));
 194 }
 195
 196 void *dma_direct_alloc(struct device *dev, size_t size,
 197                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 198 {
 199         if (!IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 200             dma_alloc_need_uncached(dev, attrs))
 201                 return arch_dma_alloc(dev, size, dma_handle, gfp, attrs);
 202         return dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
 203 }
 204
 205 void dma_direct_free(struct device *dev, size_t size,
 206                 void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs)
 207 {
 208         if (!IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
 209             dma_alloc_need_uncached(dev, attrs))
 210                 arch_dma_free(dev, size, cpu_addr, dma_addr, attrs);
 211         else
 212                 dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs);
 213 }
 214
 215 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
 216     defined(CONFIG_SWIOTLB)
 217 void dma_direct_sync_single_for_device(struct device *dev,
 218                 dma_addr_t addr, size_t size, enum dma_data_direction dir)
 219 {
 220         phys_addr_t paddr = dma_to_phys(dev, addr);
 221
 222         if (unlikely(is_swiotlb_buffer(paddr)))
 223                 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_DEVICE);
 224
 225         if (!dev_is_dma_coherent(dev))
 226                 arch_sync_dma_for_device(dev, paddr, size, dir);
 227 }
 228 EXPORT_SYMBOL(dma_direct_sync_single_for_device);
 229
 230 void dma_direct_sync_sg_for_device(struct device *dev,
 231                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 232 {
 233         struct scatterlist *sg;
 234         int i;
 235
 236         for_each_sg(sgl, sg, nents, i) {
 237                 if (unlikely(is_swiotlb_buffer(sg_phys(sg))))
 238                         swiotlb_tbl_sync_single(dev, sg_phys(sg), sg->length,
 239                                         dir, SYNC_FOR_DEVICE);
 240
 241                 if (!dev_is_dma_coherent(dev))
 242                         arch_sync_dma_for_device(dev, sg_phys(sg), sg->length,
 243                                         dir);
 244         }
 245 }
 246 EXPORT_SYMBOL(dma_direct_sync_sg_for_device);
 247 #endif
 248
 249 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
 250     defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
 251     defined(CONFIG_SWIOTLB)
 252 void dma_direct_sync_single_for_cpu(struct device *dev,
 253                 dma_addr_t addr, size_t size, enum dma_data_direction dir)
 254 {
 255         phys_addr_t paddr = dma_to_phys(dev, addr);
 256
 257         if (!dev_is_dma_coherent(dev)) {
 258                 arch_sync_dma_for_cpu(dev, paddr, size, dir);
 259                 arch_sync_dma_for_cpu_all(dev);
 260         }
 261
 262         if (unlikely(is_swiotlb_buffer(paddr)))
 263                 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_CPU);
 264 }
 265 EXPORT_SYMBOL(dma_direct_sync_single_for_cpu);
 266
 267 void dma_direct_sync_sg_for_cpu(struct device *dev,
 268                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 269 {
 270         struct scatterlist *sg;
 271         int i;
 272
 273         for_each_sg(sgl, sg, nents, i) {
 274                 if (!dev_is_dma_coherent(dev))
 275                         arch_sync_dma_for_cpu(dev, sg_phys(sg), sg->length, dir);
 276
 277                 if (unlikely(is_swiotlb_buffer(sg_phys(sg))))
 278                         swiotlb_tbl_sync_single(dev, sg_phys(sg), sg->length, dir,
 279                                         SYNC_FOR_CPU);
 280         }
 281
 282         if (!dev_is_dma_coherent(dev))
 283                 arch_sync_dma_for_cpu_all(dev);
 284 }
 285 EXPORT_SYMBOL(dma_direct_sync_sg_for_cpu);
 286
 287 void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
 288                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 289 {
 290         phys_addr_t phys = dma_to_phys(dev, addr);
 291
 292         if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
 293                 dma_direct_sync_single_for_cpu(dev, addr, size, dir);
 294
 295         if (unlikely(is_swiotlb_buffer(phys)))
 296                 swiotlb_tbl_unmap_single(dev, phys, size, dir, attrs);
 297 }
 298 EXPORT_SYMBOL(dma_direct_unmap_page);
 299
 300 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
 301                 int nents, enum dma_data_direction dir, unsigned long attrs)
 302 {
 303         struct scatterlist *sg;
 304         int i;
 305
 306         for_each_sg(sgl, sg, nents, i)
 307                 dma_direct_unmap_page(dev, sg->dma_address, sg_dma_len(sg), dir,
 308                              attrs);
 309 }
 310 EXPORT_SYMBOL(dma_direct_unmap_sg);
 311 #endif
 312
 313 static inline bool dma_direct_possible(struct device *dev, dma_addr_t dma_addr,
 314                 size_t size)
 315 {
 316         return swiotlb_force != SWIOTLB_FORCE &&
 317                 dma_capable(dev, dma_addr, size);
 318 }
 319
 320 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
 321                 unsigned long offset, size_t size, enum dma_data_direction dir,
 322                 unsigned long attrs)
 323 {
 324         phys_addr_t phys = page_to_phys(page) + offset;
 325         dma_addr_t dma_addr = phys_to_dma(dev, phys);
 326
 327         if (unlikely(!dma_direct_possible(dev, dma_addr, size)) &&
 328             !swiotlb_map(dev, &phys, &dma_addr, size, dir, attrs)) {
 329                 report_addr(dev, dma_addr, size);
 330                 return DMA_MAPPING_ERROR;
 331         }
 332
 333         if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
 334                 arch_sync_dma_for_device(dev, phys, size, dir);
 335         return dma_addr;
 336 }
 337 EXPORT_SYMBOL(dma_direct_map_page);
 338
 339 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
 340                 enum dma_data_direction dir, unsigned long attrs)
 341 {
 342         int i;
 343         struct scatterlist *sg;
 344
 345         for_each_sg(sgl, sg, nents, i) {
 346                 sg->dma_address = dma_direct_map_page(dev, sg_page(sg),
 347                                 sg->offset, sg->length, dir, attrs);
 348                 if (sg->dma_address == DMA_MAPPING_ERROR)
 349                         goto out_unmap;
 350                 sg_dma_len(sg) = sg->length;
 351         }
 352
 353         return nents;
 354
 355 out_unmap:
 356         dma_direct_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
 357         return 0;
 358 }
 359 EXPORT_SYMBOL(dma_direct_map_sg);
 360
 361 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
 362                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 363 {
 364         dma_addr_t dma_addr = paddr;
 365
 366         if (unlikely(!dma_direct_possible(dev, dma_addr, size))) {
 367                 report_addr(dev, dma_addr, size);
 368                 return DMA_MAPPING_ERROR;
 369         }
 370
 371         return dma_addr;
 372 }
 373 EXPORT_SYMBOL(dma_direct_map_resource);
 374
 375 /*
 376  * Because 32-bit DMA masks are so common we expect every architecture to be
 377  * able to satisfy them - either by not supporting more physical memory, or by
 378  * providing a ZONE_DMA32.  If neither is the case, the architecture needs to
 379  * use an IOMMU instead of the direct mapping.
 380  */
 381 int dma_direct_supported(struct device *dev, u64 mask)
 382 {
 383         u64 min_mask;
 384
 385         if (IS_ENABLED(CONFIG_ZONE_DMA))
 386                 min_mask = DMA_BIT_MASK(ARCH_ZONE_DMA_BITS);
 387         else
 388                 min_mask = DMA_BIT_MASK(32);
 389
 390         min_mask = min_t(u64, min_mask, (max_pfn - 1) << PAGE_SHIFT);
 391
 392         /*
 393          * This check needs to be against the actual bit mask value, so
 394          * use __phys_to_dma() here so that the SME encryption mask isn't
 395          * part of the check.
 396          */
 397         return mask >= __phys_to_dma(dev, min_mask);
 398 }
 399
 400 size_t dma_direct_max_mapping_size(struct device *dev)
 401 {
 402         /* If SWIOTLB is active, use its maximum mapping size */
 403         if (is_swiotlb_active() &&
 404             (dma_addressing_limited(dev) || swiotlb_force == SWIOTLB_FORCE))
 405                 return swiotlb_max_mapping_size(dev);
 406         return SIZE_MAX;
 407 }