kernel/dma/direct.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2018-2020 Christoph Hellwig.
   4  *
   5  * DMA operations that map physical memory directly without using an IOMMU.
   6  */
   7 #include <linux/memblock.h> /* for max_pfn */
   8 #include <linux/export.h>
   9 #include <linux/mm.h>
  10 #include <linux/dma-map-ops.h>
  11 #include <linux/scatterlist.h>
  12 #include <linux/pfn.h>
  13 #include <linux/vmalloc.h>
  14 #include <linux/set_memory.h>
  15 #include <linux/slab.h>
  16 #include "direct.h"
  17
  18 /*
  19  * Most architectures use ZONE_DMA for the first 16 Megabytes, but some use
  20  * it for entirely different regions. In that case the arch code needs to
  21  * override the variable below for dma-direct to work properly.
  22  */
  23 unsigned int zone_dma_bits __ro_after_init = 24;
  24
  25 static inline dma_addr_t phys_to_dma_direct(struct device *dev,
  26                 phys_addr_t phys)
  27 {
  28         if (force_dma_unencrypted(dev))
  29                 return phys_to_dma_unencrypted(dev, phys);
  30         return phys_to_dma(dev, phys);
  31 }
  32
  33 static inline struct page *dma_direct_to_page(struct device *dev,
  34                 dma_addr_t dma_addr)
  35 {
  36         return pfn_to_page(PHYS_PFN(dma_to_phys(dev, dma_addr)));
  37 }
  38
  39 u64 dma_direct_get_required_mask(struct device *dev)
  40 {
  41         phys_addr_t phys = (phys_addr_t)(max_pfn - 1) << PAGE_SHIFT;
  42         u64 max_dma = phys_to_dma_direct(dev, phys);
  43
  44         return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
  45 }
  46
  47 static gfp_t dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
  48                                   u64 *phys_limit)
  49 {
  50         u64 dma_limit = min_not_zero(dma_mask, dev->bus_dma_limit);
  51
  52         /*
  53          * Optimistically try the zone that the physical address mask falls
  54          * into first.  If that returns memory that isn't actually addressable
  55          * we will fallback to the next lower zone and try again.
  56          *
  57          * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
  58          * zones.
  59          */
  60         *phys_limit = dma_to_phys(dev, dma_limit);
  61         if (*phys_limit <= DMA_BIT_MASK(zone_dma_bits))
  62                 return GFP_DMA;
  63         if (*phys_limit <= DMA_BIT_MASK(32))
  64                 return GFP_DMA32;
  65         return 0;
  66 }
  67
  68 static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
  69 {
  70         dma_addr_t dma_addr = phys_to_dma_direct(dev, phys);
  71
  72         if (dma_addr == DMA_MAPPING_ERROR)
  73                 return false;
  74         return dma_addr + size - 1 <=
  75                 min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit);
  76 }
  77
  78 static void __dma_direct_free_pages(struct device *dev, struct page *page,
  79                                     size_t size)
  80 {
  81         if (IS_ENABLED(CONFIG_DMA_RESTRICTED_POOL) &&
  82             swiotlb_free(dev, page, size))
  83                 return;
  84         dma_free_contiguous(dev, page, size);
  85 }
  86
  87 static struct page *__dma_direct_alloc_pages(struct device *dev, size_t size,
  88                 gfp_t gfp)
  89 {
  90         int node = dev_to_node(dev);
  91         struct page *page = NULL;
  92         u64 phys_limit;
  93
  94         WARN_ON_ONCE(!PAGE_ALIGNED(size));
  95
  96         gfp |= dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
  97                                            &phys_limit);
  98         if (IS_ENABLED(CONFIG_DMA_RESTRICTED_POOL) &&
  99             is_swiotlb_for_alloc(dev)) {
 100                 page = swiotlb_alloc(dev, size);
 101                 if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 102                         __dma_direct_free_pages(dev, page, size);
 103                         return NULL;
 104                 }
 105                 return page;
 106         }
 107
 108         page = dma_alloc_contiguous(dev, size, gfp);
 109         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 110                 dma_free_contiguous(dev, page, size);
 111                 page = NULL;
 112         }
 113 again:
 114         if (!page)
 115                 page = alloc_pages_node(node, gfp, get_order(size));
 116         if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
 117                 dma_free_contiguous(dev, page, size);
 118                 page = NULL;
 119
 120                 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
 121                     phys_limit < DMA_BIT_MASK(64) &&
 122                     !(gfp & (GFP_DMA32 | GFP_DMA))) {
 123                         gfp |= GFP_DMA32;
 124                         goto again;
 125                 }
 126
 127                 if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
 128                         gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
 129                         goto again;
 130                 }
 131         }
 132
 133         return page;
 134 }
 135
 136 static void *dma_direct_alloc_from_pool(struct device *dev, size_t size,
 137                 dma_addr_t *dma_handle, gfp_t gfp)
 138 {
 139         struct page *page;
 140         u64 phys_mask;
 141         void *ret;
 142
 143         gfp |= dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
 144                                            &phys_mask);
 145         page = dma_alloc_from_pool(dev, size, &ret, gfp, dma_coherent_ok);
 146         if (!page)
 147                 return NULL;
 148         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 149         return ret;
 150 }
 151
 152 void *dma_direct_alloc(struct device *dev, size_t size,
 153                 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 154 {
 155         struct page *page;
 156         void *ret;
 157         int err;
 158
 159         size = PAGE_ALIGN(size);
 160         if (attrs & DMA_ATTR_NO_WARN)
 161                 gfp |= __GFP_NOWARN;
 162
 163         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 164             !force_dma_unencrypted(dev) && !is_swiotlb_for_alloc(dev)) {
 165                 page = __dma_direct_alloc_pages(dev, size, gfp & ~__GFP_ZERO);
 166                 if (!page)
 167                         return NULL;
 168                 /* remove any dirty cache lines on the kernel alias */
 169                 if (!PageHighMem(page))
 170                         arch_dma_prep_coherent(page, size);
 171                 *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 172                 /* return the page pointer as the opaque cookie */
 173                 return page;
 174         }
 175
 176         if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 177             !IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) && !dev_is_dma_coherent(dev) &&
 178             !is_swiotlb_for_alloc(dev))
 179                 return arch_dma_alloc(dev, size, dma_handle, gfp, attrs);
 180
 181         /*
 182          * Remapping or decrypting memory may block. If either is required and
 183          * we can't block, allocate the memory from the atomic pools.
 184          * If restricted DMA (i.e., is_swiotlb_for_alloc) is required, one must
 185          * set up another device coherent pool by shared-dma-pool and use
 186          * dma_alloc_from_dev_coherent instead.
 187          */
 188         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 189             !gfpflags_allow_blocking(gfp) &&
 190             (force_dma_unencrypted(dev) ||
 191              (IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 192               !dev_is_dma_coherent(dev))) &&
 193             !is_swiotlb_for_alloc(dev))
 194                 return dma_direct_alloc_from_pool(dev, size, dma_handle, gfp);
 195
 196         /* we always manually zero the memory once we are done */
 197         page = __dma_direct_alloc_pages(dev, size, gfp & ~__GFP_ZERO);
 198         if (!page)
 199                 return NULL;
 200
 201         if ((IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
 202              !dev_is_dma_coherent(dev)) ||
 203             (IS_ENABLED(CONFIG_DMA_REMAP) && PageHighMem(page))) {
 204                 /* remove any dirty cache lines on the kernel alias */
 205                 arch_dma_prep_coherent(page, size);
 206
 207                 /* create a coherent mapping */
 208                 ret = dma_common_contiguous_remap(page, size,
 209                                 dma_pgprot(dev, PAGE_KERNEL, attrs),
 210                                 __builtin_return_address(0));
 211                 if (!ret)
 212                         goto out_free_pages;
 213                 if (force_dma_unencrypted(dev)) {
 214                         err = set_memory_decrypted((unsigned long)ret,
 215                                                    1 << get_order(size));
 216                         if (err)
 217                                 goto out_free_pages;
 218                 }
 219                 memset(ret, 0, size);
 220                 goto done;
 221         }
 222
 223         if (PageHighMem(page)) {
 224                 /*
 225                  * Depending on the cma= arguments and per-arch setup
 226                  * dma_alloc_contiguous could return highmem pages.
 227                  * Without remapping there is no way to return them here,
 228                  * so log an error and fail.
 229                  */
 230                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 231                 goto out_free_pages;
 232         }
 233
 234         ret = page_address(page);
 235         if (force_dma_unencrypted(dev)) {
 236                 err = set_memory_decrypted((unsigned long)ret,
 237                                            1 << get_order(size));
 238                 if (err)
 239                         goto out_free_pages;
 240         }
 241
 242         memset(ret, 0, size);
 243
 244         if (IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 245             !dev_is_dma_coherent(dev)) {
 246                 arch_dma_prep_coherent(page, size);
 247                 ret = arch_dma_set_uncached(ret, size);
 248                 if (IS_ERR(ret))
 249                         goto out_encrypt_pages;
 250         }
 251 done:
 252         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 253         return ret;
 254
 255 out_encrypt_pages:
 256         if (force_dma_unencrypted(dev)) {
 257                 err = set_memory_encrypted((unsigned long)page_address(page),
 258                                            1 << get_order(size));
 259                 /* If memory cannot be re-encrypted, it must be leaked */
 260                 if (err)
 261                         return NULL;
 262         }
 263 out_free_pages:
 264         __dma_direct_free_pages(dev, page, size);
 265         return NULL;
 266 }
 267
 268 void dma_direct_free(struct device *dev, size_t size,
 269                 void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs)
 270 {
 271         unsigned int page_order = get_order(size);
 272
 273         if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
 274             !force_dma_unencrypted(dev) && !is_swiotlb_for_alloc(dev)) {
 275                 /* cpu_addr is a struct page cookie, not a kernel address */
 276                 dma_free_contiguous(dev, cpu_addr, size);
 277                 return;
 278         }
 279
 280         if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_SET_UNCACHED) &&
 281             !IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) && !dev_is_dma_coherent(dev) &&
 282             !is_swiotlb_for_alloc(dev)) {
 283                 arch_dma_free(dev, size, cpu_addr, dma_addr, attrs);
 284                 return;
 285         }
 286
 287         /* If cpu_addr is not from an atomic pool, dma_free_from_pool() fails */
 288         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 289             dma_free_from_pool(dev, cpu_addr, PAGE_ALIGN(size)))
 290                 return;
 291
 292         if (force_dma_unencrypted(dev))
 293                 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order);
 294
 295         if (IS_ENABLED(CONFIG_DMA_REMAP) && is_vmalloc_addr(cpu_addr))
 296                 vunmap(cpu_addr);
 297         else if (IS_ENABLED(CONFIG_ARCH_HAS_DMA_CLEAR_UNCACHED))
 298                 arch_dma_clear_uncached(cpu_addr, size);
 299
 300         __dma_direct_free_pages(dev, dma_direct_to_page(dev, dma_addr), size);
 301 }
 302
 303 struct page *dma_direct_alloc_pages(struct device *dev, size_t size,
 304                 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
 305 {
 306         struct page *page;
 307         void *ret;
 308
 309         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 310             force_dma_unencrypted(dev) && !gfpflags_allow_blocking(gfp) &&
 311             !is_swiotlb_for_alloc(dev))
 312                 return dma_direct_alloc_from_pool(dev, size, dma_handle, gfp);
 313
 314         page = __dma_direct_alloc_pages(dev, size, gfp);
 315         if (!page)
 316                 return NULL;
 317         if (PageHighMem(page)) {
 318                 /*
 319                  * Depending on the cma= arguments and per-arch setup
 320                  * dma_alloc_contiguous could return highmem pages.
 321                  * Without remapping there is no way to return them here,
 322                  * so log an error and fail.
 323                  */
 324                 dev_info(dev, "Rejecting highmem page from CMA.\n");
 325                 goto out_free_pages;
 326         }
 327
 328         ret = page_address(page);
 329         if (force_dma_unencrypted(dev)) {
 330                 if (set_memory_decrypted((unsigned long)ret,
 331                                 1 << get_order(size)))
 332                         goto out_free_pages;
 333         }
 334         memset(ret, 0, size);
 335         *dma_handle = phys_to_dma_direct(dev, page_to_phys(page));
 336         return page;
 337 out_free_pages:
 338         __dma_direct_free_pages(dev, page, size);
 339         return NULL;
 340 }
 341
 342 void dma_direct_free_pages(struct device *dev, size_t size,
 343                 struct page *page, dma_addr_t dma_addr,
 344                 enum dma_data_direction dir)
 345 {
 346         unsigned int page_order = get_order(size);
 347         void *vaddr = page_address(page);
 348
 349         /* If cpu_addr is not from an atomic pool, dma_free_from_pool() fails */
 350         if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
 351             dma_free_from_pool(dev, vaddr, size))
 352                 return;
 353
 354         if (force_dma_unencrypted(dev))
 355                 set_memory_encrypted((unsigned long)vaddr, 1 << page_order);
 356
 357         __dma_direct_free_pages(dev, page, size);
 358 }
 359
 360 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
 361     defined(CONFIG_SWIOTLB)
 362 void dma_direct_sync_sg_for_device(struct device *dev,
 363                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 364 {
 365         struct scatterlist *sg;
 366         int i;
 367
 368         for_each_sg(sgl, sg, nents, i) {
 369                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 370
 371                 if (unlikely(is_swiotlb_buffer(dev, paddr)))
 372                         swiotlb_sync_single_for_device(dev, paddr, sg->length,
 373                                                        dir);
 374
 375                 if (!dev_is_dma_coherent(dev))
 376                         arch_sync_dma_for_device(paddr, sg->length,
 377                                         dir);
 378         }
 379 }
 380 #endif
 381
 382 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
 383     defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
 384     defined(CONFIG_SWIOTLB)
 385 void dma_direct_sync_sg_for_cpu(struct device *dev,
 386                 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
 387 {
 388         struct scatterlist *sg;
 389         int i;
 390
 391         for_each_sg(sgl, sg, nents, i) {
 392                 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
 393
 394                 if (!dev_is_dma_coherent(dev))
 395                         arch_sync_dma_for_cpu(paddr, sg->length, dir);
 396
 397                 if (unlikely(is_swiotlb_buffer(dev, paddr)))
 398                         swiotlb_sync_single_for_cpu(dev, paddr, sg->length,
 399                                                     dir);
 400
 401                 if (dir == DMA_FROM_DEVICE)
 402                         arch_dma_mark_clean(paddr, sg->length);
 403         }
 404
 405         if (!dev_is_dma_coherent(dev))
 406                 arch_sync_dma_for_cpu_all();
 407 }
 408
 409 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
 410                 int nents, enum dma_data_direction dir, unsigned long attrs)
 411 {
 412         struct scatterlist *sg;
 413         int i;
 414
 415         for_each_sg(sgl, sg, nents, i)
 416                 dma_direct_unmap_page(dev, sg->dma_address, sg_dma_len(sg), dir,
 417                              attrs);
 418 }
 419 #endif
 420
 421 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
 422                 enum dma_data_direction dir, unsigned long attrs)
 423 {
 424         int i;
 425         struct scatterlist *sg;
 426
 427         for_each_sg(sgl, sg, nents, i) {
 428                 sg->dma_address = dma_direct_map_page(dev, sg_page(sg),
 429                                 sg->offset, sg->length, dir, attrs);
 430                 if (sg->dma_address == DMA_MAPPING_ERROR)
 431                         goto out_unmap;
 432                 sg_dma_len(sg) = sg->length;
 433         }
 434
 435         return nents;
 436
 437 out_unmap:
 438         dma_direct_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
 439         return 0;
 440 }
 441
 442 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
 443                 size_t size, enum dma_data_direction dir, unsigned long attrs)
 444 {
 445         dma_addr_t dma_addr = paddr;
 446
 447         if (unlikely(!dma_capable(dev, dma_addr, size, false))) {
 448                 dev_err_once(dev,
 449                              "DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
 450                              &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
 451                 WARN_ON_ONCE(1);
 452                 return DMA_MAPPING_ERROR;
 453         }
 454
 455         return dma_addr;
 456 }
 457
 458 int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
 459                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 460                 unsigned long attrs)
 461 {
 462         struct page *page = dma_direct_to_page(dev, dma_addr);
 463         int ret;
 464
 465         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 466         if (!ret)
 467                 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
 468         return ret;
 469 }
 470
 471 bool dma_direct_can_mmap(struct device *dev)
 472 {
 473         return dev_is_dma_coherent(dev) ||
 474                 IS_ENABLED(CONFIG_DMA_NONCOHERENT_MMAP);
 475 }
 476
 477 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
 478                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 479                 unsigned long attrs)
 480 {
 481         unsigned long user_count = vma_pages(vma);
 482         unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 483         unsigned long pfn = PHYS_PFN(dma_to_phys(dev, dma_addr));
 484         int ret = -ENXIO;
 485
 486         vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs);
 487
 488         if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
 489                 return ret;
 490
 491         if (vma->vm_pgoff >= count || user_count > count - vma->vm_pgoff)
 492                 return -ENXIO;
 493         return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
 494                         user_count << PAGE_SHIFT, vma->vm_page_prot);
 495 }
 496
 497 int dma_direct_supported(struct device *dev, u64 mask)
 498 {
 499         u64 min_mask = (max_pfn - 1) << PAGE_SHIFT;
 500
 501         /*
 502          * Because 32-bit DMA masks are so common we expect every architecture
 503          * to be able to satisfy them - either by not supporting more physical
 504          * memory, or by providing a ZONE_DMA32.  If neither is the case, the
 505          * architecture needs to use an IOMMU instead of the direct mapping.
 506          */
 507         if (mask >= DMA_BIT_MASK(32))
 508                 return 1;
 509
 510         /*
 511          * This check needs to be against the actual bit mask value, so use
 512          * phys_to_dma_unencrypted() here so that the SME encryption mask isn't
 513          * part of the check.
 514          */
 515         if (IS_ENABLED(CONFIG_ZONE_DMA))
 516                 min_mask = min_t(u64, min_mask, DMA_BIT_MASK(zone_dma_bits));
 517         return mask >= phys_to_dma_unencrypted(dev, min_mask);
 518 }
 519
 520 size_t dma_direct_max_mapping_size(struct device *dev)
 521 {
 522         /* If SWIOTLB is active, use its maximum mapping size */
 523         if (is_swiotlb_active(dev) &&
 524             (dma_addressing_limited(dev) || is_swiotlb_force_bounce(dev)))
 525                 return swiotlb_max_mapping_size(dev);
 526         return SIZE_MAX;
 527 }
 528
 529 bool dma_direct_need_sync(struct device *dev, dma_addr_t dma_addr)
 530 {
 531         return !dev_is_dma_coherent(dev) ||
 532                is_swiotlb_buffer(dev, dma_to_phys(dev, dma_addr));
 533 }
 534
 535 /**
 536  * dma_direct_set_offset - Assign scalar offset for a single DMA range.
 537  * @dev:        device pointer; needed to "own" the alloced memory.
 538  * @cpu_start:  beginning of memory region covered by this offset.
 539  * @dma_start:  beginning of DMA/PCI region covered by this offset.
 540  * @size:       size of the region.
 541  *
 542  * This is for the simple case of a uniform offset which cannot
 543  * be discovered by "dma-ranges".
 544  *
 545  * It returns -ENOMEM if out of memory, -EINVAL if a map
 546  * already exists, 0 otherwise.
 547  *
 548  * Note: any call to this from a driver is a bug.  The mapping needs
 549  * to be described by the device tree or other firmware interfaces.
 550  */
 551 int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start,
 552                          dma_addr_t dma_start, u64 size)
 553 {
 554         struct bus_dma_region *map;
 555         u64 offset = (u64)cpu_start - (u64)dma_start;
 556
 557         if (dev->dma_range_map) {
 558                 dev_err(dev, "attempt to add DMA range to existing map\n");
 559                 return -EINVAL;
 560         }
 561
 562         if (!offset)
 563                 return 0;
 564
 565         map = kcalloc(2, sizeof(*map), GFP_KERNEL);
 566         if (!map)
 567                 return -ENOMEM;
 568         map[0].cpu_start = cpu_start;
 569         map[0].dma_start = dma_start;
 570         map[0].offset = offset;
 571         map[0].size = size;
 572         dev->dma_range_map = map;
 573         return 0;
 574 }