isci/create_fw.c

   1 #include <stdio.h>
   2 #include <stdlib.h>
   3 #include <unistd.h>
   4 #include <sys/types.h>
   5 #include <sys/stat.h>
   6 #include <fcntl.h>
   7 #include <string.h>
   8 #include <errno.h>
   9 #include <asm/types.h>
  10 #include <strings.h>
  11 #include <stdint.h>
  12
  13 #include "create_fw.h"
  14
  15 int write_blob(struct isci_orom *isci_orom)
  16 {
  17         FILE *fd;
  18         int err;
  19         size_t count;
  20
  21         fd = fopen(blob_name, "w+");
  22         if (!fd) {
  23                 perror("Open file for write failed");
  24                 fclose(fd);
  25                 return -EIO;
  26         }
  27
  28         count = fwrite(isci_orom, sizeof(struct isci_orom), 1, fd);
  29         if (count != 1) {
  30                 perror("Write data failed");
  31                 fclose(fd);
  32                 return -EIO;
  33         }
  34
  35         fclose(fd);
  36
  37         return 0;
  38 }
  39
  40 void set_binary_values(struct isci_orom *isci_orom)
  41 {
  42         int ctrl_idx, phy_idx, port_idx;
  43
  44         /* setting OROM signature */
  45         strncpy(isci_orom->hdr.signature, sig, strlen(sig));
  46         isci_orom->hdr.version = version;
  47         isci_orom->hdr.total_block_length = sizeof(struct isci_orom);
  48         isci_orom->hdr.hdr_length = sizeof(struct sci_bios_oem_param_block_hdr);
  49         isci_orom->hdr.num_elements = num_elements;
  50
  51         for (ctrl_idx = 0; ctrl_idx < 2; ctrl_idx++) {
  52                 isci_orom->ctrl[ctrl_idx].controller.mode_type = mode_type;
  53                 isci_orom->ctrl[ctrl_idx].controller.max_concurr_spin_up =
  54                         max_num_concurrent_dev_spin_up;
  55                 isci_orom->ctrl[ctrl_idx].controller.do_enable_ssc =
  56                         enable_ssc;
  57
  58                 for (port_idx = 0; port_idx < 4; port_idx++)
  59                         isci_orom->ctrl[ctrl_idx].ports[port_idx].phy_mask =
  60                                 phy_mask[ctrl_idx][port_idx];
  61
  62                 for (phy_idx = 0; phy_idx < 4; phy_idx++) {
  63                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.high =
  64                                 (__u32)(sas_addr[ctrl_idx][phy_idx] >> 32);
  65                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].sas_address.low =
  66                                 (__u32)(sas_addr[ctrl_idx][phy_idx]);
  67
  68                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control0 =
  69                                 afe_tx_amp_control0;
  70                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control1 =
  71                                 afe_tx_amp_control1;
  72                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control2 =
  73                                 afe_tx_amp_control2;
  74                         isci_orom->ctrl[ctrl_idx].phys[phy_idx].afe_tx_amp_control3 =
  75                                 afe_tx_amp_control3;
  76                 }
  77         }
  78 }
  79
  80 int main(void)
  81 {
  82         int err;
  83         struct isci_orom *isci_orom;
  84
  85         isci_orom = malloc(sizeof(struct isci_orom));
  86         memset(isci_orom, 0, sizeof(struct isci_orom));
  87
  88         set_binary_values(isci_orom);
  89
  90         err = write_blob(isci_orom);
  91         if (err < 0) {
  92                 free(isci_orom);
  93                 return err;
  94         }
  95
  96         free(isci_orom);
  97         return 0;
  98 }