intel/intel_chipset.h

   1 /*
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #ifndef _INTEL_CHIPSET_H
  29 #define _INTEL_CHIPSET_H
  30
  31 #define PCI_CHIP_ILD_G                  0x0042
  32 #define PCI_CHIP_ILM_G                  0x0046
  33
  34 #define PCI_CHIP_SANDYBRIDGE_GT1        0x0102 /* desktop */
  35 #define PCI_CHIP_SANDYBRIDGE_GT2        0x0112
  36 #define PCI_CHIP_SANDYBRIDGE_GT2_PLUS   0x0122
  37 #define PCI_CHIP_SANDYBRIDGE_M_GT1      0x0106 /* mobile */
  38 #define PCI_CHIP_SANDYBRIDGE_M_GT2      0x0116
  39 #define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126
  40 #define PCI_CHIP_SANDYBRIDGE_S          0x010A /* server */
  41
  42 #define PCI_CHIP_IVYBRIDGE_GT1          0x0152 /* desktop */
  43 #define PCI_CHIP_IVYBRIDGE_GT2          0x0162
  44 #define PCI_CHIP_IVYBRIDGE_M_GT1        0x0156 /* mobile */
  45 #define PCI_CHIP_IVYBRIDGE_M_GT2        0x0166
  46 #define PCI_CHIP_IVYBRIDGE_S            0x015a /* server */
  47
  48 #define IS_830(dev) (dev == 0x3577)
  49 #define IS_845(dev) (dev == 0x2562)
  50 #define IS_85X(dev) (dev == 0x3582)
  51 #define IS_865(dev) (dev == 0x2572)
  52
  53 #define IS_GEN2(dev) (IS_830(dev) ||                            \
  54                       IS_845(dev) ||                            \
  55                       IS_85X(dev) ||                            \
  56                       IS_865(dev))
  57
  58 #define IS_915G(dev) (dev == 0x2582 ||          \
  59                        dev == 0x258a)
  60 #define IS_915GM(dev) (dev == 0x2592)
  61 #define IS_945G(dev) (dev == 0x2772)
  62 #define IS_945GM(dev) (dev == 0x27A2 ||         \
  63                         dev == 0x27AE)
  64
  65 #define IS_915(dev) (IS_915G(dev) ||                            \
  66                      IS_915GM(dev))
  67
  68 #define IS_945(dev) (IS_945G(dev) ||                            \
  69                      IS_945GM(dev) ||                           \
  70                      IS_G33(dev) ||                             \
  71                      IS_PINEVIEW(dev))
  72
  73 #define IS_G33(dev)    (dev == 0x29C2 ||                \
  74                         dev == 0x29B2 ||                \
  75                         dev == 0x29D2)
  76
  77 #define IS_PINEVIEW(dev) (dev == 0xa001 ||      \
  78                           dev == 0xa011)
  79
  80 #define IS_GEN3(dev) (IS_915(dev) ||                            \
  81                       IS_945(dev) ||                            \
  82                       IS_G33(dev) ||                            \
  83                       IS_PINEVIEW(dev))
  84
  85 #define IS_I965GM(dev) (dev == 0x2A02)
  86
  87 #define IS_GEN4(dev) (dev == 0x2972 ||  \
  88                       dev == 0x2982 ||  \
  89                       dev == 0x2992 ||  \
  90                       dev == 0x29A2 ||  \
  91                       dev == 0x2A02 ||  \
  92                       dev == 0x2A12 ||  \
  93                       dev == 0x2A42 ||  \
  94                       dev == 0x2E02 ||  \
  95                       dev == 0x2E12 ||  \
  96                       dev == 0x2E22 ||  \
  97                       dev == 0x2E32 ||  \
  98                       dev == 0x2E42 ||  \
  99                       dev == 0x0042 ||  \
 100                       dev == 0x0046 ||  \
 101                       IS_I965GM(dev) || \
 102                       IS_G4X(dev))
 103
 104 #define IS_GM45(dev) (dev == 0x2A42)
 105
 106
 107 #define IS_GEN5(dev)    (dev == PCI_CHIP_ILD_G || \
 108                          dev == PCI_CHIP_ILM_G)
 109
 110 #define IS_GEN6(dev)    (dev == PCI_CHIP_SANDYBRIDGE_GT1 || \
 111                          dev == PCI_CHIP_SANDYBRIDGE_GT2 || \
 112                          dev == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \
 113                          dev == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
 114                          dev == PCI_CHIP_SANDYBRIDGE_M_GT2 || \
 115                          dev == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \
 116                          dev == PCI_CHIP_SANDYBRIDGE_S)
 117
 118 #define IS_GEN7(dev)    (dev == PCI_CHIP_IVYBRIDGE_GT1 || \
 119                          dev == PCI_CHIP_IVYBRIDGE_GT2 || \
 120                          dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \
 121                          dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \
 122                          dev == PCI_CHIP_IVYBRIDGE_S)
 123
 124 #define IS_G4X(dev) (dev == 0x2E02 || \
 125                      dev == 0x2E12 || \
 126                      dev == 0x2E22 || \
 127                      dev == 0x2E32 || \
 128                      dev == 0x2E42 || \
 129                      IS_GM45(dev))
 130
 131 #define IS_9XX(dev) (IS_GEN3(dev) ||                            \
 132                      IS_GEN4(dev) ||                            \
 133                      IS_GEN5(dev) ||                            \
 134                      IS_GEN6(dev) ||                            \
 135                      IS_GEN7(dev))
 136
 137 #endif /* _INTEL_CHIPSET_H */