2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
29 * @file intel_bufmgr_priv.h
31 * Private definitions of Intel-specific bufmgr functions and structures.
34 #ifndef INTEL_BUFMGR_PRIV_H
35 #define INTEL_BUFMGR_PRIV_H
38 * Context for a buffer manager instance.
40 * Contains public methods followed by private storage for the buffer manager.
42 struct _drm_intel_bufmgr {
44 * Allocate a buffer object.
46 * Buffer objects are not necessarily initially mapped into CPU virtual
47 * address space or graphics device aperture. They must be mapped
48 * using bo_map() or drm_intel_gem_bo_map_gtt() to be used by the CPU.
50 drm_intel_bo *(*bo_alloc) (drm_intel_bufmgr *bufmgr, const char *name,
51 unsigned long size, unsigned int alignment);
54 * Allocate a buffer object, hinting that it will be used as a
57 * This is otherwise the same as bo_alloc.
59 drm_intel_bo *(*bo_alloc_for_render) (drm_intel_bufmgr *bufmgr,
62 unsigned int alignment);
65 * Allocate a buffer object from an existing user accessible
66 * address malloc'd with the provided size.
67 * Alignment is used when mapping to the gtt.
68 * Flags may be I915_VMAP_READ_ONLY or I915_USERPTR_UNSYNCHRONIZED
70 drm_intel_bo *(*bo_alloc_userptr)(drm_intel_bufmgr *bufmgr,
71 const char *name, void *addr,
72 uint32_t tiling_mode, uint32_t stride,
77 * Allocate a tiled buffer object.
79 * Alignment for tiled objects is set automatically; the 'flags'
80 * argument provides a hint about how the object will be used initially.
82 * Valid tiling formats are:
87 * Note the tiling format may be rejected; callers should check the
88 * 'tiling_mode' field on return, as well as the pitch value, which
89 * may have been rounded up to accommodate for tiling restrictions.
91 drm_intel_bo *(*bo_alloc_tiled) (drm_intel_bufmgr *bufmgr,
93 int x, int y, int cpp,
94 uint32_t *tiling_mode,
98 /** Takes a reference on a buffer object */
99 void (*bo_reference) (drm_intel_bo *bo);
102 * Releases a reference on a buffer object, freeing the data if
103 * no references remain.
105 void (*bo_unreference) (drm_intel_bo *bo);
108 * Maps the buffer into userspace.
110 * This function will block waiting for any existing execution on the
111 * buffer to complete, first. The resulting mapping is available at
114 int (*bo_map) (drm_intel_bo *bo, int write_enable);
117 * Reduces the refcount on the userspace mapping of the buffer
120 int (*bo_unmap) (drm_intel_bo *bo);
123 * Write data into an object.
125 * This is an optional function, if missing,
126 * drm_intel_bo will map/memcpy/unmap.
128 int (*bo_subdata) (drm_intel_bo *bo, unsigned long offset,
129 unsigned long size, const void *data);
132 * Read data from an object
134 * This is an optional function, if missing,
135 * drm_intel_bo will map/memcpy/unmap.
137 int (*bo_get_subdata) (drm_intel_bo *bo, unsigned long offset,
138 unsigned long size, void *data);
141 * Waits for rendering to an object by the GPU to have completed.
143 * This is not required for any access to the BO by bo_map,
144 * bo_subdata, etc. It is merely a way for the driver to implement
147 void (*bo_wait_rendering) (drm_intel_bo *bo);
150 * Tears down the buffer manager instance.
152 void (*destroy) (drm_intel_bufmgr *bufmgr);
155 * Add relocation entry in reloc_buf, which will be updated with the
156 * target buffer's real offset on on command submission.
158 * Relocations remain in place for the lifetime of the buffer object.
160 * \param bo Buffer to write the relocation into.
161 * \param offset Byte offset within reloc_bo of the pointer to
163 * \param target_bo Buffer whose offset should be written into the
165 * \param target_offset Constant value to be added to target_bo's
166 * offset in relocation entry.
167 * \param read_domains GEM read domains which the buffer will be
168 * read into by the command that this relocation
170 * \param write_domains GEM read domains which the buffer will be
171 * dirtied in by the command that this
172 * relocation is part of.
174 int (*bo_emit_reloc) (drm_intel_bo *bo, uint32_t offset,
175 drm_intel_bo *target_bo, uint32_t target_offset,
176 uint32_t read_domains, uint32_t write_domain);
177 int (*bo_emit_reloc_fence)(drm_intel_bo *bo, uint32_t offset,
178 drm_intel_bo *target_bo,
179 uint32_t target_offset,
180 uint32_t read_domains,
181 uint32_t write_domain);
183 /** Executes the command buffer pointed to by bo. */
184 int (*bo_exec) (drm_intel_bo *bo, int used,
185 drm_clip_rect_t *cliprects, int num_cliprects,
188 /** Executes the command buffer pointed to by bo on the selected
191 int (*bo_mrb_exec) (drm_intel_bo *bo, int used,
192 drm_clip_rect_t *cliprects, int num_cliprects,
193 int DR4, unsigned flags);
196 * Pin a buffer to the aperture and fix the offset until unpinned
198 * \param buf Buffer to pin
199 * \param alignment Required alignment for aperture, in bytes
201 int (*bo_pin) (drm_intel_bo *bo, uint32_t alignment);
204 * Unpin a buffer from the aperture, allowing it to be removed
206 * \param buf Buffer to unpin
208 int (*bo_unpin) (drm_intel_bo *bo);
211 * Ask that the buffer be placed in tiling mode
213 * \param buf Buffer to set tiling mode for
214 * \param tiling_mode desired, and returned tiling mode
216 int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
220 * Get the current tiling (and resulting swizzling) mode for the bo.
222 * \param buf Buffer to get tiling mode for
223 * \param tiling_mode returned tiling mode
224 * \param swizzle_mode returned swizzling mode
226 int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
227 uint32_t * swizzle_mode);
230 * Create a visible name for a buffer which can be used by other apps
232 * \param buf Buffer to create a name for
233 * \param name Returned name
235 int (*bo_flink) (drm_intel_bo *bo, uint32_t * name);
238 * Returns 1 if mapping the buffer for write could cause the process
239 * to block, due to the object being active in the GPU.
241 int (*bo_busy) (drm_intel_bo *bo);
244 * Specify the volatility of the buffer.
245 * \param bo Buffer to create a name for
246 * \param madv The purgeable status
248 * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
249 * reclaimed under memory pressure. If you subsequently require the buffer,
250 * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
252 * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
253 * marked as I915_MADV_DONTNEED.
255 int (*bo_madvise) (drm_intel_bo *bo, int madv);
257 int (*check_aperture_space) (drm_intel_bo ** bo_array, int count);
260 * Disable buffer reuse for buffers which will be shared in some way,
261 * as with scanout buffers. When the buffer reference count goes to
262 * zero, it will be freed and not placed in the reuse list.
264 * \param bo Buffer to disable reuse for
266 int (*bo_disable_reuse) (drm_intel_bo *bo);
269 * Query whether a buffer is reusable.
271 * \param bo Buffer to query
273 int (*bo_is_reusable) (drm_intel_bo *bo);
277 * Return the pipe associated with a crtc_id so that vblank
278 * synchronization can use the correct data in the request.
279 * This is only supported for KMS and gem at this point, when
280 * unsupported, this function returns -1 and leaves the decision
281 * of what to do in that case to the caller
283 * \param bufmgr the associated buffer manager
284 * \param crtc_id the crtc identifier
286 int (*get_pipe_from_crtc_id) (drm_intel_bufmgr *bufmgr, int crtc_id);
288 /** Returns true if target_bo is in the relocation tree rooted at bo. */
289 int (*bo_references) (drm_intel_bo *bo, drm_intel_bo *target_bo);
291 /**< Enables verbose debugging printouts */
295 struct _drm_intel_context {
297 struct _drm_intel_bufmgr *bufmgr;
300 #define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
301 #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
302 #define ROUND_UP_TO_MB(x) ROUND_UP_TO((x), 1024*1024)
304 #endif /* INTEL_BUFMGR_PRIV_H */