1 /*******************************************************************************
2 * Copyright 2018 Intel Corporation
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
8 * http://www.apache.org/licenses/LICENSE-2.0
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 *******************************************************************************/
17 #ifndef JIT_UNI_X8S8S32X_DW_CONV_KERNEL_F32_HPP
18 #define JIT_UNI_X8S8S32X_DW_CONV_KERNEL_F32_HPP
20 #include "c_types_map.hpp"
21 #include "jit_generator.hpp"
22 #include "jit_primitive_conf.hpp"
23 #include "type_helpers.hpp"
29 template <cpu_isa_t isa>
30 struct jit_uni_x8s8s32x_dw_conv_fwd_kernel: public jit_generator {
31 DECLARE_CPU_JIT_AUX_FUNCTIONS(jit_uni_dw_conv_fwd_kernel_f32)
33 jit_uni_x8s8s32x_dw_conv_fwd_kernel(jit_conv_conf_t ajcp,
34 const primitive_attr_t &attr): jcp(ajcp), attr_(attr) {
36 jit_ker = (void (*)(jit_conv_call_s *))this->getCode();
39 static bool post_ops_ok(jit_conv_conf_t &jcp,
40 const primitive_attr_t &attr);
41 static status_t init_conf(jit_conv_conf_t &jcp,
42 const convolution_desc_t &cd, const memory_desc_wrapper &src_d,
43 const memory_desc_wrapper &weights_d,
44 const memory_desc_wrapper &dst_d,
45 const memory_desc_wrapper &bias_pd,
46 const primitive_attr_t &attr,
47 bool with_relu = false, float relu_negative_slope = 0.f);
50 const primitive_attr_t &attr_;
51 void (*jit_ker)(jit_conv_call_s *);
54 using Vmm = typename utils::conditional3<isa == sse42, Xbyak::Xmm,
55 isa == avx2, Xbyak::Ymm, Xbyak::Zmm>::type;
56 using Ymm = const Xbyak::Ymm;
57 using reg64_t = const Xbyak::Reg64;
58 using reg32_t = const Xbyak::Reg32;
59 using reg8_t = const Xbyak::Reg8;
60 const int vlen = cpu_isa_traits<isa>::vlen;
62 reg64_t reg_input_base = r10;
63 reg64_t reg_output_base = r9;
64 reg64_t reg_kernel_base = r11;
65 reg64_t reg_ch_work = r13;
66 reg64_t reg_bias_base = abi_not_param1;
67 reg64_t reg_scales_base = rdx;
69 reg64_t reg_input = r8;
70 reg64_t reg_kernel = r12;
71 reg64_t aux_reg_input = r9;
72 reg64_t aux1_reg_input = r10;
73 reg64_t aux_reg_kernel = r13;
74 reg64_t aux1_reg_kernel = r11;
75 reg64_t reg_output = r14;
79 reg64_t iter_kh = rdx;
80 reg64_t iter_kw = rsi;
81 reg64_t reg_ur_w = rbp;
83 reg32_t reg_tmp_32 = r15d;
84 reg64_t reg_tmp_64 = r15;
85 reg8_t reg_tmp_8 = r15b;
87 Vmm vmm_zero = Vmm(0);
88 Vmm vmm_bias = Vmm(3);
89 Vmm vmm_scale = Vmm(2);
90 Vmm vmm_prev_dst = Vmm(2);
92 inline Vmm get_ker_reg(int idx) { return Vmm(idx + 0); }
93 inline Vmm get_src_reg(int idx) { return Vmm(idx + 1); }
94 inline Vmm get_acc_reg(int idx) { return Vmm(idx + 4); }
96 inline void cvt2ps(data_type_t type_in, Vmm vmm_in, const Xbyak::Operand &op, bool scalar_load);
97 inline void store_dst(const Xbyak::Address &op, Vmm vmm_dst, bool scalar_store);
99 inline void load_src(int ur_ch_blocks, int ch_step, int ur_w);
100 inline void apply_filter(int ur_ch_blocks, int ch_step, int ur_w);
101 inline void apply_filter_unrolled(int ur_ch_blocks, int ch_step, int ur_w);
102 inline bool maybe_relu(int position);
103 inline void store_dst(int ur_ch_blocks, int ch_step, int ur_w);
104 inline void loop_body(int ur_ch_blocks, int ch_step);