inference-engine/thirdparty/clDNN/kernel_selector/core/actual_kernels/convolution/convolution_kernel_mmad_batched_block_1x1.cpp

   1 /*
   2 // Copyright (c) 2018 Intel Corporation
   3 //
   4 // Licensed under the Apache License, Version 2.0 (the "License");
   5 // you may not use this file except in compliance with the License.
   6 // You may obtain a copy of the License at
   7 //
   8 //      http://www.apache.org/licenses/LICENSE-2.0
   9 //
  10 // Unless required by applicable law or agreed to in writing, software
  11 // distributed under the License is distributed on an "AS IS" BASIS,
  12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  13 // See the License for the specific language governing permissions and
  14 // limitations under the License.
  15 */
  16
  17 #include "convolution_kernel_mmad_batched_block_1x1.h"
  18 #include "kernel_selector_utils.h"
  19
  20 namespace kernel_selector {
  21
  22     ParamsKey ConvolutionKernel_mmad_batched_block_1x1::GetSupportedKey() const
  23     {
  24         ParamsKey k;
  25         k.EnableInputDataType(Datatype::INT8);
  26         k.EnableOutputDataType(Datatype::INT8);
  27         k.EnableInputWeightsType(WeightsType::INT8);
  28         k.EnableInputLayout(DataLayout::fs_bs_yx_bsv4_fsv32);
  29         k.EnableOutputLayout(DataLayout::fs_bs_yx_bsv4_fsv32);
  30         k.EnableTensorOffset();
  31         k.EnableTensorPitches();
  32         k.EnableBiasPerFeature();
  33         k.EnableBatching();
  34         k.EnableInt8Quantization();
  35         k.EnableOutputCalibration();
  36         k.DisableTuning();
  37         return k;
  38     }
  39
  40     struct block_params
  41     {
  42         int32_t out_width;
  43         int32_t out_height;
  44         int32_t out_depth;
  45     };
  46
  47     static block_params get_out_block_size(const convolution_params& p)
  48     {
  49         if (p.output.X().v == 7)
  50             return { 7,1,4 };
  51         else if (p.output.X().v == 14)
  52             return { 7,1,4 };
  53         else if (p.output.X().v == 28)
  54             return { 4,2,4 };
  55         else if (p.output.X().v == 56)
  56             return { 8,1,4 };
  57
  58         return { 1,1,1 };
  59     }
  60
  61     std::vector<WeightsLayout> ConvolutionKernel_mmad_batched_block_1x1::GetSupportedWeightLayouts(const convolution_params& cp) const
  62     {
  63         auto block = get_out_block_size(cp);
  64         if (block.out_depth == 4)
  65             return { WeightsLayout::os_is_yx_isa8_osv8_isv4_swizzled_by_4 };
  66         else
  67             return { WeightsLayout::os_is_yx_isa8_osv8_isv4 };
  68     }
  69
  70     bool ConvolutionKernel_mmad_batched_block_1x1::Validate(const Params& p, const optional_params& o) const
  71     {
  72         if (!ConvolutionKernelBase::Validate(p, o) ||
  73             !CovolutionCheckInput(p, o))
  74         {
  75             return false;
  76         }
  77         const convolution_params& cp = static_cast<const convolution_params&>(p);
  78
  79         // only for conv 1x1
  80         if (cp.filterSize.x != 1 || cp.filterSize.y != 1)
  81             return false;
  82
  83         // only for stride 1x1
  84         if (cp.stride.x != 1 || cp.stride.y != 1)
  85             return false;
  86
  87         // if block sizes are 1x1, then this algorithm is probably not the best
  88         auto block = get_out_block_size(cp);
  89         if (block.out_depth != 4)
  90             return false;
  91
  92         if (cp.output.X().v % block.out_width != 0)
  93             return false;
  94         if (cp.output.Y().v % block.out_height != 0)
  95             return false;
  96
  97         return true;
  98     }
  99
 100     ConvolutionKernelBase::DispatchData ConvolutionKernel_mmad_batched_block_1x1::SetDefault(const convolution_params& arg, int) const
 101     {
 102         DispatchData runInfo = ConvolutionKernelBase::SetDefault(arg);
 103
 104         constexpr size_t sub_group_size = 8;
 105
 106         runInfo.effiency = FORCE_PRIORITY_3;
 107
 108         auto block = get_out_block_size(arg);
 109
 110         runInfo.gws0 = arg.output.X().v / block.out_width;
 111         runInfo.gws1 = arg.output.Y().v / block.out_height;
 112         runInfo.gws2 = (arg.output.Feature().v) * ((arg.output.Batch().v + 3) / 4) / block.out_depth; // process 4 output channels per Workitem
 113
 114         runInfo.lws0 = 1;
 115         runInfo.lws1 = 1;
 116         runInfo.lws2 = sub_group_size;
 117
 118         return runInfo;
 119     }
 120
 121     JitConstants ConvolutionKernel_mmad_batched_block_1x1::GetJitConstants(const convolution_params& params, const DispatchData& runInfo) const
 122     {
 123         auto jit = Parent::GetJitConstants(params, runInfo);
 124
 125         jit.AddConstant(MakeJitConstant("SUB_GROUP_SIZE", runInfo.lws2));
 126
 127         // pitch for special block format used in this kernel
 128         const size_t ifm_32_aligned = Align(params.weights.IFM().v, 32);
 129         const size_t filter_ofm_block_pitch = (ifm_32_aligned / 32) * params.weights.X().v * params.weights.Y().v * 4 * 8 * 8;
 130         jit.AddConstant(MakeJitConstant("FILTER_OFM_BLOCK_PITCH", filter_ofm_block_pitch));
 131
 132         const size_t in_x_pitch = 32 * 4;
 133         const size_t in_y_pitch = 32 * 4 * params.inputs[0].X().LogicalDimPadded();
 134         const size_t in_b_block_pitch = in_y_pitch * params.inputs[0].Y().LogicalDimPadded();
 135         const size_t in_f_block_pitch = in_b_block_pitch * ((params.inputs[0].Batch().v + 3) / 4);
 136         const size_t in_offset = in_x_pitch * params.inputs[0].X().pad.before + in_y_pitch * params.inputs[0].Y().pad.before;
 137
 138         jit.AddConstant(MakeJitConstant("IN_X_PITCH", in_x_pitch));
 139         jit.AddConstant(MakeJitConstant("IN_Y_PITCH", in_y_pitch));
 140         jit.AddConstant(MakeJitConstant("IN_B_BLOCK_PITCH", in_b_block_pitch));
 141         jit.AddConstant(MakeJitConstant("IN_F_BLOCK_PITCH", in_f_block_pitch));
 142         jit.AddConstant(MakeJitConstant("IN_OFFSET", in_offset));
 143
 144         auto block = get_out_block_size(params);
 145         jit.AddConstant(MakeJitConstant("OUT_BLOCK_WIDTH", block.out_width));
 146         jit.AddConstant(MakeJitConstant("OUT_BLOCK_HEIGHT", block.out_height));
 147         jit.AddConstant(MakeJitConstant("WEIGHTS_PER_WORKITEM", block.out_depth));
 148
 149         return jit;
 150     }
 151
 152     KernelsData ConvolutionKernel_mmad_batched_block_1x1::GetKernelsData(const Params& params, const optional_params& options) const
 153     {
 154         KernelsData kd = GetCommonKernelsData(params, options, " -Dcl_intel_subgroups_char");
 155         if (!kd.empty())
 156             kd[0].estimatedTime = FORCE_PRIORITY_3;
 157         return kd;
 158     }
 159 }