1 // Copyright (C) 2018-2020 Intel Corporation
2 // SPDX-License-Identifier: Apache-2.0
6 #include "ngraph_reader_tests.hpp"
8 TEST_F(NGraphReaderTests, ReadGroupConvolutionNetwork) {
9 std::string model = R"V0G0N(
10 <net name="GroupConvolution" version="10">
12 <layer id="0" name="in1" type="Parameter" version="opset1">
13 <data shape="1,64,65,51" element_type="f32"/>
15 <port id="0" precision="FP32">
23 <layer id="1" name="const_val" type="Const" version="opset1">
24 <data offset="0" size="2304" shape="64,1,1,3,3" element_type="f32"/>
26 <port id="1" precision="FP32">
35 <layer id="2" name="GroupConvolutionOp" type="GroupConvolution" version="opset1">
36 <data strides="1,1" dilations="1,1" pads_begin="1,1" pads_end="1,1" output_padding="0,0"/>
53 <port id="2" precision="FP32">
61 <layer id="3" name="140/sink_port_0" type="Result" version="opset1">
73 <edge from-layer="0" from-port="0" to-layer="2" to-port="0"/>
74 <edge from-layer="1" from-port="1" to-layer="2" to-port="1"/>
75 <edge from-layer="2" from-port="2" to-layer="3" to-port="0"/>
79 std::string modelV7 = R"V0G0N(
80 <net name="GroupConvolution" version="7">
82 <layer id="0" name="in1" type="Input" version="opset1">
83 <data shape="1,64,65,51" element_type="f32"/>
85 <port id="0" precision="FP32">
93 <layer id="1" name="GroupConvolutionOp" type="Convolution" version="opset1">
94 <data group="64" strides="1,1" dilations="1,1" kernel="3,3" pads_begin="1,1" pads_end="1,1" output="64"/>
104 <port id="2" precision="FP32">
112 <weights offset="0" size="2304" precision="FP32"/>
117 <edge from-layer="0" from-port="0" to-layer="1" to-port="0"/>
121 compareIRs(model, modelV7, 2304);