1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
13 *********************************************************************/
14 typedef enum { /* typedef xilinx_iface */
15 min_xilinx_iface_type, /* low range check value */
16 slave_serial, /* serial data and external clock */
17 master_serial, /* serial data w/ internal clock (not used) */
18 slave_parallel, /* parallel data w/ external latch */
19 jtag_mode, /* jtag/tap serial (not used ) */
20 master_selectmap, /* master SelectMap (virtex2) */
21 slave_selectmap, /* slave SelectMap (virtex2) */
22 devcfg, /* devcfg interface (zynq) */
23 csu_dma, /* csu_dma interface (zynqmp) */
24 cfi, /* CFI interface(versal) */
25 max_xilinx_iface_type /* insert all new types before this */
26 } xilinx_iface; /* end, typedef xilinx_iface */
28 typedef enum { /* typedef xilinx_family */
29 min_xilinx_type, /* low range check value */
30 xilinx_spartan2, /* Spartan-II Family */
31 xilinx_virtexE, /* Virtex-E Family */
32 xilinx_virtex2, /* Virtex2 Family */
33 xilinx_spartan3, /* Spartan-III Family */
34 xilinx_zynq, /* Zynq Family */
35 xilinx_zynqmp, /* ZynqMP Family */
36 xilinx_versal, /* Versal Family */
37 max_xilinx_type /* insert all new types before this */
38 } xilinx_family; /* end, typedef xilinx_family */
40 /* FPGA bitstream supported types */
41 #define FPGA_LEGACY BIT(0)
42 #define FPGA_XILINX_ZYNQMP_DDRAUTH BIT(1)
43 #define FPGA_XILINX_ZYNQMP_ENC BIT(2)
45 typedef struct { /* typedef xilinx_desc */
46 xilinx_family family; /* part type */
47 xilinx_iface iface; /* interface type */
48 size_t size; /* bytes of data part can accept */
49 void *iface_fns; /* interface function table */
50 int cookie; /* implementation specific cookie */
51 struct xilinx_fpga_op *operations; /* operations */
52 char *name; /* device name in bitstream */
53 int flags; /* compatible flags */
54 } xilinx_desc; /* end, typedef xilinx_desc */
56 struct xilinx_fpga_op {
57 int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
58 bitstream_type bstype, int flags);
59 int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
60 fpga_fs_info *fpga_fsinfo);
61 int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
62 struct fpga_secure_info *fpga_sec_info);
63 int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
64 int (*info)(xilinx_desc *desc);
65 #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
66 int (*str2flag)(xilinx_desc *desc, const char *string);
70 /* Generic Xilinx Functions
71 *********************************************************************/
72 int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
73 bitstream_type bstype, int flags);
74 int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
75 int xilinx_info(xilinx_desc *desc);
76 int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
77 fpga_fs_info *fpga_fsinfo);
78 int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
79 struct fpga_secure_info *fpga_sec_info);
81 /* Board specific implementation specific function types
82 *********************************************************************/
83 typedef int (*xilinx_pgm_fn)(int assert_pgm, int flush, int cookie);
84 typedef int (*xilinx_init_fn)(int cookie);
85 typedef int (*xilinx_err_fn)(int cookie);
86 typedef int (*xilinx_done_fn)(int cookie);
87 typedef int (*xilinx_clk_fn)(int assert_clk, int flush, int cookie);
88 typedef int (*xilinx_cs_fn)(int assert_cs, int flush, int cookie);
89 typedef int (*xilinx_wr_fn)(int assert_write, int flush, int cookie);
90 typedef int (*xilinx_rdata_fn)(unsigned char *data, int cookie);
91 typedef int (*xilinx_wdata_fn)(unsigned char data, int flush, int cookie);
92 typedef int (*xilinx_busy_fn)(int cookie);
93 typedef int (*xilinx_abort_fn)(int cookie);
94 typedef int (*xilinx_pre_fn)(int cookie);
95 typedef int (*xilinx_post_fn)(int cookie);
96 typedef int (*xilinx_bwr_fn)(void *buf, size_t len, int flush, int cookie);
98 #endif /* _XILINX_H_ */