* Add support for NSCU board
[platform/kernel/u-boot.git] / include / video_ad7177.h
1 /*
2  * (C) Copyright 2000
3  * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23
24 #ifndef _VIDEO_AD7177_H_
25 #define _VIDEO_AD7177_H_
26
27 /*#define VIDEO_DEBUG_DISABLE_COLORS    0 */
28
29 #define VIDEO_ENCODER_NAME      "Analog Devices AD7177"
30
31 #define VIDEO_ENCODER_I2C_RATE  100000  /* Max rate is 100Khz */
32 #define VIDEO_ENCODER_CB_Y_CR_Y         /* Use CB Y CR Y format... */
33
34 #define VIDEO_MODE_YUYV         /* The only mode supported by this encoder */
35 #undef  VIDEO_MODE_RGB
36 #define VIDEO_MODE_BPP          16
37
38 #ifdef  VIDEO_MODE_PAL
39 #define VIDEO_ACTIVE_COLS       720
40 #define VIDEO_ACTIVE_ROWS       576
41 #define VIDEO_VISIBLE_COLS      640
42 #define VIDEO_VISIBLE_ROWS      480
43 #endif
44
45 #ifdef  VIDEO_MODE_NTSC
46 #define VIDEO_ACTIVE_COLS       720
47 #define VIDEO_ACTIVE_ROWS       525
48 #define VIDEO_VISIBLE_COLS      640
49 #define VIDEO_VISIBLE_ROWS      400
50 #endif
51
52 static unsigned char
53     video_encoder_data[] = {
54 #ifdef VIDEO_MODE_NTSC
55                                         0x04, /* Mode Register 0 */
56 #ifdef VIDEO_DEBUG_COLORBARS
57                                         0xc2,
58 #else
59                                         0x42, /* Mode Register 1 */
60 #endif
61                                         0x16, /* Subcarrier Freq 0 */
62                                         0x7c, /* Subcarrier Freq 1 */
63                                         0xf0, /* Subcarrier Freq 2 */
64                                         0x21, /* Subcarrier Freq 3 */
65                                         0x00, /* Subcarrier phase */
66                                         0x02, /* Timing Register 0 */
67                                         0x00, /* Extended Captioning 0 */
68                                         0x00, /* Extended Captioning 1 */
69                                         0x00, /* Closed Captioning 0 */
70                                         0x00, /* Closed Captioning 1 */
71                                         0x00, /* Timing Register 1 */
72                                         0x08, /* Mode Register 2 */
73                                         0x00, /* Pedestal Register 0 */
74                                         0x00, /* Pedestal Register 1 */
75                                         0x00, /* Pedestal Register 2 */
76                                         0x00, /* Pedestal Register 3 */
77                                         0x08 /* Mode Register 3 */
78
79 #endif
80 #ifdef VIDEO_MODE_PAL
81 #ifdef VIDEO_MODE_RGB_OUT
82
83                                         0x69, /* Mode Register 0 */
84 #ifdef VIDEO_DEBUG_COLORBARS
85                                         0xc0, /* Mode Register 1 (c0) */
86 #else
87                                         0x40, /* Mode Register 1 (c0) */
88 #endif
89                                         0xcb, /* Subcarrier Freq 0 */
90                                         0x8a, /* Subcarrier Freq 1 */
91                                         0x09, /* Subcarrier Freq 2 */
92                                         0x2a, /* Subcarrier Freq 3 */
93                                         0x00, /* Subcarrier phase */
94                                         0x02, /* Timing Register 0 */
95                                         0x00, /* Extended Captioning 0 */
96                                         0x00, /* Extended Captioning 1 */
97                                         0x00, /* Closed Captioning 0 */
98                                         0x00, /* Closed Captioning 1 */
99                                         0x00, /* Timing Register 1 */
100                                         0x28, /* Mode Register 2 */
101                                         0x00, /* Pedestal Register 0 */
102                                         0x00, /* Pedestal Register 1 */
103                                         0x00, /* Pedestal Register 2 */
104                                         0x00, /* Pedestal Register 3 */
105                                         0x08  /* Mode Register 3 */
106
107 #else
108
109                                         0x09, /* Mode Register 0 (was 01) */
110 #ifdef VIDEO_DEBUG_COLORBARS
111                                         0xd8,   /* */
112 #else
113                                         0x59, /* Mode Register 1 (was 58) */
114 #endif
115                                         0xcb, /* Subcarrier Freq 0 */
116                                         0x8a, /* Subcarrier Freq 1 */
117                                         0x09, /* Subcarrier Freq 2 */
118                                         0x2a, /* Subcarrier Freq 3 */
119                                         0x00, /* Subcarrier phase */
120                                         0x02, /* Timing Register 0 (was a) */
121                                         0x00, /* Extended Captioning 0 */
122                                         0x00, /* Extended Captioning 1 */
123                                         0x00, /* Closed Captioning 0 */
124                                         0x00, /* Closed Captioning 1 */
125                                         0x00, /* Timing Register 1 */
126 #ifdef VIDEO_DEBUG_LOWPOWER
127 #ifdef VIDEO_DEBUG_DISABLE_COLORS
128                                         0x98, /* Mode Register 2 */
129 #else
130                                         0x88, /* Mode Register 2 */
131 #endif
132 #else
133 #ifdef VIDEO_DEBUG_DISABLE_COLORS
134                                         0x18, /* Mode Register 2 */
135 #else
136                                         0x08, /* Mode Register 2 */
137 #endif
138 #endif
139                                         0x00, /* Pedestal Register 0 */
140                                         0x00, /* Pedestal Register 1 */
141                                         0x00, /* Pedestal Register 2 */
142                                         0x00, /* Pedestal Register 3 */
143                                         0x08  /* Mode Register 3 */
144 #endif
145 #endif
146     } ;
147
148 #endif