2 * Copyright (c) 2009 Wind River Systems, Inc.
3 * Tom Rix <Tom.Rix at windriver.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git
22 * Copyright (C) 2007-2009 Texas Instruments, Inc.
31 /* I2C chip addresses */
34 #define TWL4030_CHIP_USB 0x48
36 #define TWL4030_CHIP_AUDIO_VOICE 0x49
37 #define TWL4030_CHIP_GPIO 0x49
38 #define TWL4030_CHIP_INTBR 0x49
39 #define TWL4030_CHIP_PIH 0x49
40 #define TWL4030_CHIP_TEST 0x49
42 #define TWL4030_CHIP_KEYPAD 0x4a
43 #define TWL4030_CHIP_MADC 0x4a
44 #define TWL4030_CHIP_INTERRUPTS 0x4a
45 #define TWL4030_CHIP_LED 0x4a
46 #define TWL4030_CHIP_MAIN_CHARGE 0x4a
47 #define TWL4030_CHIP_PRECHARGE 0x4a
48 #define TWL4030_CHIP_PWM0 0x4a
49 #define TWL4030_CHIP_PWM1 0x4a
50 #define TWL4030_CHIP_PWMA 0x4a
51 #define TWL4030_CHIP_PWMB 0x4a
53 #define TWL4030_CHIP_BACKUP 0x4b
54 #define TWL4030_CHIP_INT 0x4b
55 #define TWL4030_CHIP_PM_MASTER 0x4b
56 #define TWL4030_CHIP_PM_RECEIVER 0x4b
57 #define TWL4030_CHIP_RTC 0x4b
58 #define TWL4030_CHIP_SECURED_REG 0x4b
60 /* Register base addresses */
63 #define TWL4030_BASEADD_USB 0x0000
65 #define TWL4030_BASEADD_AUDIO_VOICE 0x0000
66 #define TWL4030_BASEADD_GPIO 0x0098
67 #define TWL4030_BASEADD_INTBR 0x0085
68 #define TWL4030_BASEADD_PIH 0x0080
69 #define TWL4030_BASEADD_TEST 0x004C
71 #define TWL4030_BASEADD_INTERRUPTS 0x00B9
72 #define TWL4030_BASEADD_LED 0x00EE
73 #define TWL4030_BASEADD_MADC 0x0000
74 #define TWL4030_BASEADD_MAIN_CHARGE 0x0074
75 #define TWL4030_BASEADD_PRECHARGE 0x00AA
76 #define TWL4030_BASEADD_PWM0 0x00F8
77 #define TWL4030_BASEADD_PWM1 0x00FB
78 #define TWL4030_BASEADD_PWMA 0x00EF
79 #define TWL4030_BASEADD_PWMB 0x00F1
80 #define TWL4030_BASEADD_KEYPAD 0x00D2
82 #define TWL4030_BASEADD_BACKUP 0x0014
83 #define TWL4030_BASEADD_INT 0x002E
84 #define TWL4030_BASEADD_PM_MASTER 0x0036
85 #define TWL4030_BASEADD_PM_RECIEVER 0x005B
86 #define TWL4030_BASEADD_RTC 0x001C
87 #define TWL4030_BASEADD_SECURED_REG 0x0000
90 * Power Management Master
92 #define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x36
93 #define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x37
94 #define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x38
95 #define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x39
96 #define TWL4030_PM_MASTER_STS_BOOT 0x3A
97 #define TWL4030_PM_MASTER_CFG_BOOT 0x3B
98 #define TWL4030_PM_MASTER_SHUNDAN 0x3C
99 #define TWL4030_PM_MASTER_BOOT_BCI 0x3D
100 #define TWL4030_PM_MASTER_CFG_PWRANA1 0x3E
101 #define TWL4030_PM_MASTER_CFG_PWRANA2 0x3F
102 #define TWL4030_PM_MASTER_BGAP_TRIM 0x40
103 #define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x41
104 #define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x42
105 #define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x43
106 #define TWL4030_PM_MASTER_PROTECT_KEY 0x44
107 #define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x45
108 #define TWL4030_PM_MASTER_P1_SW_EVENTS 0x46
109 #define TWL4030_PM_MASTER_P2_SW_EVENTS 0x47
110 #define TWL4030_PM_MASTER_P3_SW_EVENTS 0x48
111 #define TWL4030_PM_MASTER_STS_P123_STATE 0x49
112 #define TWL4030_PM_MASTER_PB_CFG 0x4A
113 #define TWL4030_PM_MASTER_PB_WORD_MSB 0x4B
114 #define TWL4030_PM_MASTER_PB_WORD_LSB 0x4C
115 #define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x52
116 #define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x53
117 #define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x54
118 #define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x55
119 #define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x56
120 #define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x57
121 #define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x58
122 #define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x59
123 #define TWL4030_PM_MASTER_MEMORY_DATA 0x5A
124 #define TWL4030_PM_MASTER_SC_CONFIG 0x5B
125 #define TWL4030_PM_MASTER_SC_DETECT1 0x5C
126 #define TWL4030_PM_MASTER_SC_DETECT2 0x5D
127 #define TWL4030_PM_MASTER_WATCHDOG_CFG 0x5E
128 #define TWL4030_PM_MASTER_IT_CHECK_CFG 0x5F
129 #define TWL4030_PM_MASTER_VIBRATOR_CFG 0x60
130 #define TWL4030_PM_MASTER_DCDC_GLOBAL_CFG 0x61
131 #define TWL4030_PM_MASTER_VDD1_TRIM1 0x62
132 #define TWL4030_PM_MASTER_VDD1_TRIM2 0x63
133 #define TWL4030_PM_MASTER_VDD2_TRIM1 0x64
134 #define TWL4030_PM_MASTER_VDD2_TRIM2 0x65
135 #define TWL4030_PM_MASTER_VIO_TRIM1 0x66
136 #define TWL4030_PM_MASTER_VIO_TRIM2 0x67
137 #define TWL4030_PM_MASTER_MISC_CFG 0x68
138 #define TWL4030_PM_MASTER_LS_TST_A 0x69
139 #define TWL4030_PM_MASTER_LS_TST_B 0x6A
140 #define TWL4030_PM_MASTER_LS_TST_C 0x6B
141 #define TWL4030_PM_MASTER_LS_TST_D 0x6C
142 #define TWL4030_PM_MASTER_BB_CFG 0x6D
143 #define TWL4030_PM_MASTER_MISC_TST 0x6E
144 #define TWL4030_PM_MASTER_TRIM1 0x6F
145 /* P[1-3]_SW_EVENTS */
146 #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON (1 << 6)
147 #define TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN (1 << 5)
148 #define TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET (1 << 4)
149 #define TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP (1 << 3)
150 #define TWL4030_PM_MASTER_SW_EVENTS_DEVACT (1 << 2)
151 #define TWL4030_PM_MASTER_SW_EVENTS_DEVSLP (1 << 1)
152 #define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF (1 << 0)
154 /* Power bus message definitions */
156 /* The TWL4030/5030 splits its power-management resources (the various
157 * regulators, clock and reset lines) into 3 processor groups - P1, P2 and
158 * P3. These groups can then be configured to transition between sleep, wait-on
159 * and active states by sending messages to the power bus. See Section 5.4.2
160 * Power Resources of TWL4030 TRM
163 /* Processor groups */
164 #define DEV_GRP_NULL 0x0
165 #define DEV_GRP_P1 0x1 /* P1: all OMAP devices */
166 #define DEV_GRP_P2 0x2 /* P2: all Modem devices */
167 #define DEV_GRP_P3 0x4 /* P3: all peripheral devices */
169 /* Resource groups */
170 #define RES_GRP_RES 0x0 /* Reserved */
171 #define RES_GRP_PP 0x1 /* Power providers */
172 #define RES_GRP_RC 0x2 /* Reset and control */
173 #define RES_GRP_PP_RC 0x3
174 #define RES_GRP_PR 0x4 /* Power references */
175 #define RES_GRP_PP_PR 0x5
176 #define RES_GRP_RC_PR 0x6
177 #define RES_GRP_ALL 0x7 /* All resource groups */
179 #define RES_TYPE2_R0 0x0
181 #define RES_TYPE_ALL 0x7
183 /* Resource states */
184 #define RES_STATE_WRST 0xF
185 #define RES_STATE_ACTIVE 0xE
186 #define RES_STATE_SLEEP 0x8
187 #define RES_STATE_OFF 0x0
189 /* Power resources */
191 /* Power providers */
202 #define RES_VINTANA1 11
203 #define RES_VINTANA2 12
204 #define RES_VINTDIG 13
208 #define RES_VUSB_1V5 17
209 #define RES_VUSB_1V8 18
210 #define RES_VUSB_3V1 19
211 #define RES_VUSBCP 20
213 /* Reset and control */
214 #define RES_NRES_PWRON 22
217 #define RES_HFCLKOUT 25
218 #define RES_32KCLKOUT 26
220 /* Power Reference */
221 #define RES_Main_Ref 28
223 #define TOTAL_RESOURCES 28
225 * Power Bus Message Format ... these can be sent individually by Linux,
226 * but are usually part of downloaded scripts that are run when various
227 * power events are triggered.
229 * Broadcast Message (16 Bits):
230 * DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4]
233 * Singular Message (16 Bits):
234 * DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0]
237 #define MSG_BROADCAST(devgrp, grp, type, type2, state) \
238 ((devgrp) << 13 | 1 << 12 | (grp) << 9 | (type2) << 7 \
239 | (type) << 4 | (state))
241 #define MSG_SINGULAR(devgrp, id, state) \
242 ((devgrp) << 13 | 0 << 12 | (id) << 4 | (state))
244 #define MSG_BROADCAST_ALL(devgrp, state) \
245 ((devgrp) << 5 | (state))
247 #define MSG_BROADCAST_REF MSG_BROADCAST_ALL
248 #define MSG_BROADCAST_PROV MSG_BROADCAST_ALL
249 #define MSG_BROADCAST__CLK_RST MSG_BROADCAST_ALL
251 /* Power Managment Receiver */
252 #define TWL4030_PM_RECEIVER_SC_CONFIG 0x5B
253 #define TWL4030_PM_RECEIVER_SC_DETECT1 0x5C
254 #define TWL4030_PM_RECEIVER_SC_DETECT2 0x5D
255 #define TWL4030_PM_RECEIVER_WATCHDOG_CFG 0x5E
256 #define TWL4030_PM_RECEIVER_IT_CHECK_CFG 0x5F
257 #define TWL4030_PM_RECEIVER_VIBRATOR_CFG 0x5F
258 #define TWL4030_PM_RECEIVER_DC_TO_DC_CFG 0x61
259 #define TWL4030_PM_RECEIVER_VDD1_TRIM1 0x62
260 #define TWL4030_PM_RECEIVER_VDD1_TRIM2 0x63
261 #define TWL4030_PM_RECEIVER_VDD2_TRIM1 0x64
262 #define TWL4030_PM_RECEIVER_VDD2_TRIM2 0x65
263 #define TWL4030_PM_RECEIVER_VIO_TRIM1 0x66
264 #define TWL4030_PM_RECEIVER_VIO_TRIM2 0x67
265 #define TWL4030_PM_RECEIVER_MISC_CFG 0x68
266 #define TWL4030_PM_RECEIVER_LS_TST_A 0x69
267 #define TWL4030_PM_RECEIVER_LS_TST_B 0x6A
268 #define TWL4030_PM_RECEIVER_LS_TST_C 0x6B
269 #define TWL4030_PM_RECEIVER_LS_TST_D 0x6C
270 #define TWL4030_PM_RECEIVER_BB_CFG 0x6D
271 #define TWL4030_PM_RECEIVER_MISC_TST 0x6E
272 #define TWL4030_PM_RECEIVER_TRIM1 0x6F
273 #define TWL4030_PM_RECEIVER_TRIM2 0x70
274 #define TWL4030_PM_RECEIVER_DC_DC_TIMEOUT 0x71
275 #define TWL4030_PM_RECEIVER_VAUX1_DEV_GRP 0x72
276 #define TWL4030_PM_RECEIVER_VAUX1_TYPE 0x73
277 #define TWL4030_PM_RECEIVER_VAUX1_REMAP 0x74
278 #define TWL4030_PM_RECEIVER_VAUX1_DEDICATED 0x75
279 #define TWL4030_PM_RECEIVER_VAUX2_DEV_GRP 0x76
280 #define TWL4030_PM_RECEIVER_VAUX2_TYPE 0x77
281 #define TWL4030_PM_RECEIVER_VAUX2_REMAP 0x78
282 #define TWL4030_PM_RECEIVER_VAUX2_DEDICATED 0x79
283 #define TWL4030_PM_RECEIVER_VAUX3_DEV_GRP 0x7A
284 #define TWL4030_PM_RECEIVER_VAUX3_TYPE 0x7B
285 #define TWL4030_PM_RECEIVER_VAUX3_REMAP 0x7C
286 #define TWL4030_PM_RECEIVER_VAUX3_DEDICATED 0x7D
287 #define TWL4030_PM_RECEIVER_VAUX4_DEV_GRP 0x7E
288 #define TWL4030_PM_RECEIVER_VAUX4_TYPE 0x7F
289 #define TWL4030_PM_RECEIVER_VAUX4_REMAP 0x80
290 #define TWL4030_PM_RECEIVER_VAUX4_DEDICATED 0x81
291 #define TWL4030_PM_RECEIVER_VMMC1_DEV_GRP 0x82
292 #define TWL4030_PM_RECEIVER_VMMC1_TYPE 0x83
293 #define TWL4030_PM_RECEIVER_VMMC1_REMAP 0x84
294 #define TWL4030_PM_RECEIVER_VMMC1_DEDICATED 0x85
295 #define TWL4030_PM_RECEIVER_VMMC2_DEV_GRP 0x86
296 #define TWL4030_PM_RECEIVER_VMMC2_TYPE 0x87
297 #define TWL4030_PM_RECEIVER_VMMC2_REMAP 0x88
298 #define TWL4030_PM_RECEIVER_VMMC2_DEDICATED 0x89
299 #define TWL4030_PM_RECEIVER_VPLL1_DEV_GRP 0x8A
300 #define TWL4030_PM_RECEIVER_VPLL1_TYPE 0x8B
301 #define TWL4030_PM_RECEIVER_VPLL1_REMAP 0x8C
302 #define TWL4030_PM_RECEIVER_VPLL1_DEDICATED 0x8D
303 #define TWL4030_PM_RECEIVER_VPLL2_DEV_GRP 0x8E
304 #define TWL4030_PM_RECEIVER_VPLL2_TYPE 0x8F
305 #define TWL4030_PM_RECEIVER_VPLL2_REMAP 0x90
306 #define TWL4030_PM_RECEIVER_VPLL2_DEDICATED 0x91
307 #define TWL4030_PM_RECEIVER_VSIM_DEV_GRP 0x92
308 #define TWL4030_PM_RECEIVER_VSIM_TYPE 0x93
309 #define TWL4030_PM_RECEIVER_VSIM_REMAP 0x94
310 #define TWL4030_PM_RECEIVER_VSIM_DEDICATED 0x95
311 #define TWL4030_PM_RECEIVER_VDAC_DEV_GRP 0x96
312 #define TWL4030_PM_RECEIVER_VDAC_TYPE 0x97
313 #define TWL4030_PM_RECEIVER_VDAC_REMAP 0x98
314 #define TWL4030_PM_RECEIVER_VDAC_DEDICATED 0x99
315 #define TWL4030_PM_RECEIVER_VINTANA1_DEV_GRP 0x9A
316 #define TWL4030_PM_RECEIVER_VINTANA1_TYP 0x9B
317 #define TWL4030_PM_RECEIVER_VINTANA1_REMAP 0x9C
318 #define TWL4030_PM_RECEIVER_VINTANA1_DEDICATED 0x9D
319 #define TWL4030_PM_RECEIVER_VINTANA2_DEV_GRP 0x9E
320 #define TWL4030_PM_RECEIVER_VINTANA2_TYPE 0x9F
321 #define TWL4030_PM_RECEIVER_VINTANA2_REMAP 0xA0
322 #define TWL4030_PM_RECEIVER_VINTANA2_DEDICATED 0xA1
323 #define TWL4030_PM_RECEIVER_VINTDIG_DEV_GRP 0xA2
324 #define TWL4030_PM_RECEIVER_VINTDIG_TYPE 0xA3
325 #define TWL4030_PM_RECEIVER_VINTDIG_REMAP 0xA4
326 #define TWL4030_PM_RECEIVER_VINTDIG_DEDICATED 0xA5
327 #define TWL4030_PM_RECEIVER_VIO_DEV_GRP 0xA6
328 #define TWL4030_PM_RECEIVER_VIO_TYPE 0xA7
329 #define TWL4030_PM_RECEIVER_VIO_REMAP 0xA8
330 #define TWL4030_PM_RECEIVER_VIO_CFG 0xA9
331 #define TWL4030_PM_RECEIVER_VIO_MISC_CFG 0xAA
332 #define TWL4030_PM_RECEIVER_VIO_TEST1 0xAB
333 #define TWL4030_PM_RECEIVER_VIO_TEST2 0xAC
334 #define TWL4030_PM_RECEIVER_VIO_OSC 0xAD
335 #define TWL4030_PM_RECEIVER_VIO_RESERVED 0xAE
336 #define TWL4030_PM_RECEIVER_VIO_VSEL 0xAF
337 #define TWL4030_PM_RECEIVER_VDD1_DEV_GRP 0xB0
338 #define TWL4030_PM_RECEIVER_VDD1_TYPE 0xB1
339 #define TWL4030_PM_RECEIVER_VDD1_REMAP 0xB2
340 #define TWL4030_PM_RECEIVER_VDD1_CFG 0xB3
341 #define TWL4030_PM_RECEIVER_VDD1_MISC_CFG 0xB4
342 #define TWL4030_PM_RECEIVER_VDD1_TEST1 0xB5
343 #define TWL4030_PM_RECEIVER_VDD1_TEST2 0xB6
344 #define TWL4030_PM_RECEIVER_VDD1_OSC 0xB7
345 #define TWL4030_PM_RECEIVER_VDD1_RESERVED 0xB8
346 #define TWL4030_PM_RECEIVER_VDD1_VSEL 0xB9
347 #define TWL4030_PM_RECEIVER_VDD1_VMODE_CFG 0xBA
348 #define TWL4030_PM_RECEIVER_VDD1_VFLOOR 0xBB
349 #define TWL4030_PM_RECEIVER_VDD1_VROOF 0xBC
350 #define TWL4030_PM_RECEIVER_VDD1_STEP 0xBD
351 #define TWL4030_PM_RECEIVER_VDD2_DEV_GRP 0xBE
352 #define TWL4030_PM_RECEIVER_VDD2_TYPE 0xBF
353 #define TWL4030_PM_RECEIVER_VDD2_REMAP 0xC0
354 #define TWL4030_PM_RECEIVER_VDD2_CFG 0xC1
355 #define TWL4030_PM_RECEIVER_VDD2_MISC_CFG 0xC2
356 #define TWL4030_PM_RECEIVER_VDD2_TEST1 0xC3
357 #define TWL4030_PM_RECEIVER_VDD2_TEST2 0xC4
358 #define TWL4030_PM_RECEIVER_VDD2_OSC 0xC5
359 #define TWL4030_PM_RECEIVER_VDD2_RESERVED 0xC6
360 #define TWL4030_PM_RECEIVER_VDD2_VSEL 0xC7
361 #define TWL4030_PM_RECEIVER_VDD2_VMODE_CFG 0xC8
362 #define TWL4030_PM_RECEIVER_VDD2_VFLOOR 0xC9
363 #define TWL4030_PM_RECEIVER_VDD2_VROOF 0xCA
364 #define TWL4030_PM_RECEIVER_VDD2_STEP 0xCB
365 #define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP 0xCC
366 #define TWL4030_PM_RECEIVER_VUSB1V5_TYPE 0xCD
367 #define TWL4030_PM_RECEIVER_VUSB1V5_REMAP 0xCE
368 #define TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP 0xCF
369 #define TWL4030_PM_RECEIVER_VUSB1V8_TYPE 0xD0
370 #define TWL4030_PM_RECEIVER_VUSB1V8_REMAP 0xD1
371 #define TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP 0xD2
372 #define TWL4030_PM_RECEIVER_VUSB3V1_TYPE 0xD3
373 #define TWL4030_PM_RECEIVER_VUSB3V1_REMAP 0xD4
374 #define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP 0xD5
375 #define TWL4030_PM_RECEIVER_VUSBCP_TYPE 0xD6
376 #define TWL4030_PM_RECEIVER_VUSBCP_REMAP 0xD7
377 #define TWL4030_PM_RECEIVER_VUSB_DEDICATED1 0xD8
378 #define TWL4030_PM_RECEIVER_VUSB_DEDICATED2 0xD9
379 #define TWL4030_PM_RECEIVER_REGEN_DEV_GRP 0xDA
380 #define TWL4030_PM_RECEIVER_REGEN_TYPE 0xDB
381 #define TWL4030_PM_RECEIVER_REGEN_REMAP 0xDC
382 #define TWL4030_PM_RECEIVER_NRESPWRON_DEV_GRP 0xDD
383 #define TWL4030_PM_RECEIVER_NRESPWRON_TYPE 0xDE
384 #define TWL4030_PM_RECEIVER_NRESPWRON_REMAP 0xDF
385 #define TWL4030_PM_RECEIVER_CLKEN_DEV_GRP 0xE0
386 #define TWL4030_PM_RECEIVER_CLKEN_TYPE 0xE1
387 #define TWL4030_PM_RECEIVER_CLKEN_REMAP 0xE2
388 #define TWL4030_PM_RECEIVER_SYSEN_DEV_GRP 0xE3
389 #define TWL4030_PM_RECEIVER_SYSEN_TYPE 0xE4
390 #define TWL4030_PM_RECEIVER_SYSEN_REMAP 0xE5
391 #define TWL4030_PM_RECEIVER_HFCLKOUT_DEV_GRP 0xE6
392 #define TWL4030_PM_RECEIVER_HFCLKOUT_TYPE 0xE7
393 #define TWL4030_PM_RECEIVER_HFCLKOUT_REMAP 0xE8
394 #define TWL4030_PM_RECEIVER_32KCLKOUT_DEV_GRP 0xE9
395 #define TWL4030_PM_RECEIVER_32KCLKOUT_TYPE 0xEA
396 #define TWL4030_PM_RECEIVER_32KCLKOUT_REMAP 0xEB
397 #define TWL4030_PM_RECEIVER_TRITON_RESET_DEV_GRP 0xEC
398 #define TWL4030_PM_RECEIVER_TRITON_RESET_TYPE 0xED
399 #define TWL4030_PM_RECEIVER_TRITON_RESET_REMAP 0xEE
400 #define TWL4030_PM_RECEIVER_MAINREF_DEV_GRP 0xEF
401 #define TWL4030_PM_RECEIVER_MAINREF_TYPE 0xF0
402 #define TWL4030_PM_RECEIVER_MAINREF_REMAP 0xF1
404 /* Voltage Selection in PM Receiver Module */
405 #define TWL4030_PM_RECEIVER_VAUX2_VSEL_18 0x05
406 #define TWL4030_PM_RECEIVER_VAUX3_VSEL_28 0x03
407 #define TWL4030_PM_RECEIVER_VPLL2_VSEL_18 0x05
408 #define TWL4030_PM_RECEIVER_VDAC_VSEL_18 0x03
409 #define TWL4030_PM_RECEIVER_VMMC1_VSEL_30 0x02
410 #define TWL4030_PM_RECEIVER_VMMC1_VSEL_32 0x03
411 #define TWL4030_PM_RECEIVER_VSIM_VSEL_18 0x03
413 /* Device Selection in PM Receiver Module */
414 #define TWL4030_PM_RECEIVER_DEV_GRP_P1 0x20
415 #define TWL4030_PM_RECEIVER_DEV_GRP_ALL 0xE0
418 #define TWL4030_LED_LEDEN 0xEE
419 #define TWL4030_LED_LEDEN_LEDAON (1 << 0)
420 #define TWL4030_LED_LEDEN_LEDBON (1 << 1)
421 #define TWL4030_LED_LEDEN_LEDAPWM (1 << 4)
422 #define TWL4030_LED_LEDEN_LEDBPWM (1 << 5)
425 #define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2
426 #define TWL4030_KEYPAD_KEY_DEB_REG 0xD3
427 #define TWL4030_KEYPAD_LONG_KEY_REG1 0xD4
428 #define TWL4030_KEYPAD_LK_PTV_REG 0xD5
429 #define TWL4030_KEYPAD_TIME_OUT_REG1 0xD6
430 #define TWL4030_KEYPAD_TIME_OUT_REG2 0xD7
431 #define TWL4030_KEYPAD_KBC_REG 0xD8
432 #define TWL4030_KEYPAD_KBR_REG 0xD9
433 #define TWL4030_KEYPAD_KEYP_SMS 0xDA
434 #define TWL4030_KEYPAD_FULL_CODE_7_0 0xDB
435 #define TWL4030_KEYPAD_FULL_CODE_15_8 0xDC
436 #define TWL4030_KEYPAD_FULL_CODE_23_16 0xDD
437 #define TWL4030_KEYPAD_FULL_CODE_31_24 0xDE
438 #define TWL4030_KEYPAD_FULL_CODE_39_32 0xDF
439 #define TWL4030_KEYPAD_FULL_CODE_47_40 0xE0
440 #define TWL4030_KEYPAD_FULL_CODE_55_48 0xE1
441 #define TWL4030_KEYPAD_FULL_CODE_63_56 0xE2
442 #define TWL4030_KEYPAD_KEYP_ISR1 0xE3
443 #define TWL4030_KEYPAD_KEYP_IMR1 0xE4
444 #define TWL4030_KEYPAD_KEYP_ISR2 0xE5
445 #define TWL4030_KEYPAD_KEYP_IMR2 0xE6
446 #define TWL4030_KEYPAD_KEYP_SIR 0xE7
447 #define TWL4030_KEYPAD_KEYP_EDR 0xE8
448 #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0xE9
450 #define TWL4030_KEYPAD_CTRL_KBD_ON (1 << 6)
451 #define TWL4030_KEYPAD_CTRL_RP_EN (1 << 5)
452 #define TWL4030_KEYPAD_CTRL_TOLE_EN (1 << 4)
453 #define TWL4030_KEYPAD_CTRL_TOE_EN (1 << 3)
454 #define TWL4030_KEYPAD_CTRL_LK_EN (1 << 2)
455 #define TWL4030_KEYPAD_CTRL_SOFTMODEN (1 << 1)
456 #define TWL4030_KEYPAD_CTRL_SOFT_NRST (1 << 0)
459 #define TWL4030_USB_VENDOR_ID_LO 0x00
460 #define TWL4030_USB_VENDOR_ID_HI 0x01
461 #define TWL4030_USB_PRODUCT_ID_LO 0x02
462 #define TWL4030_USB_PRODUCT_ID_HI 0x03
463 #define TWL4030_USB_FUNC_CTRL 0x04
464 #define TWL4030_USB_FUNC_CTRL_SET 0x05
465 #define TWL4030_USB_FUNC_CTRL_CLR 0x06
466 #define TWL4030_USB_IFC_CTRL 0x07
467 #define TWL4030_USB_IFC_CTRL_SET 0x08
468 #define TWL4030_USB_IFC_CTRL_CLR 0x09
469 #define TWL4030_USB_OTG_CTRL 0x0A
470 #define TWL4030_USB_OTG_CTRL_SET 0x0B
471 #define TWL4030_USB_OTG_CTRL_CLR 0x0C
472 #define TWL4030_USB_USB_INT_EN_RISE 0x0D
473 #define TWL4030_USB_USB_INT_EN_RISE_SET 0x0E
474 #define TWL4030_USB_USB_INT_EN_RISE_CLR 0x0F
475 #define TWL4030_USB_USB_INT_EN_FALL 0x10
476 #define TWL4030_USB_USB_INT_EN_FALL_SET 0x11
477 #define TWL4030_USB_USB_INT_EN_FALL_CLR 0x12
478 #define TWL4030_USB_USB_INT_STS 0x13
479 #define TWL4030_USB_USB_INT_LATCH 0x14
480 #define TWL4030_USB_DEBUG 0x15
481 #define TWL4030_USB_SCRATCH_REG 0x16
482 #define TWL4030_USB_SCRATCH_REG_SET 0x17
483 #define TWL4030_USB_SCRATCH_REG_CLR 0x18
484 #define TWL4030_USB_CARKIT_CTRL 0x19
485 #define TWL4030_USB_CARKIT_CTRL_SET 0x1A
486 #define TWL4030_USB_CARKIT_CTRL_CLR 0x1B
487 #define TWL4030_USB_CARKIT_INT_DELAY 0x1C
488 #define TWL4030_USB_CARKIT_INT_EN 0x1D
489 #define TWL4030_USB_CARKIT_INT_EN_SET 0x1E
490 #define TWL4030_USB_CARKIT_INT_EN_CLR 0x1F
491 #define TWL4030_USB_CARKIT_INT_STS 0x20
492 #define TWL4030_USB_CARKIT_INT_LATCH 0x21
493 #define TWL4030_USB_CARKIT_PLS_CTRL 0x22
494 #define TWL4030_USB_CARKIT_PLS_CTRL_SET 0x23
495 #define TWL4030_USB_CARKIT_PLS_CTRL_CLR 0x24
496 #define TWL4030_USB_TRANS_POS_WIDTH 0x25
497 #define TWL4030_USB_TRANS_NEG_WIDTH 0x26
498 #define TWL4030_USB_RCV_PLTY_RECOVERY 0x27
499 #define TWL4030_USB_MCPC_CTRL 0x30
500 #define TWL4030_USB_MCPC_CTRL_SET 0x31
501 #define TWL4030_USB_MCPC_CTRL_CLR 0x32
502 #define TWL4030_USB_MCPC_IO_CTRL 0x33
503 #define TWL4030_USB_MCPC_IO_CTRL_SET 0x34
504 #define TWL4030_USB_MCPC_IO_CTRL_CLR 0x35
505 #define TWL4030_USB_MCPC_CTRL2 0x36
506 #define TWL4030_USB_MCPC_CTRL2_SET 0x37
507 #define TWL4030_USB_MCPC_CTRL2_CLR 0x38
508 #define TWL4030_USB_OTHER_FUNC_CTRL 0x80
509 #define TWL4030_USB_OTHER_FUNC_CTRL_SET 0x81
510 #define TWL4030_USB_OTHER_FUNC_CTRL_CLR 0x82
511 #define TWL4030_USB_OTHER_IFC_CTRL 0x83
512 #define TWL4030_USB_OTHER_IFC_CTRL_SET 0x84
513 #define TWL4030_USB_OTHER_IFC_CTRL_CLR 0x85
514 #define TWL4030_USB_OTHER_INT_EN_RISE_SET 0x87
515 #define TWL4030_USB_OTHER_INT_EN_RISE_CLR 0x88
516 #define TWL4030_USB_OTHER_INT_EN_FALL 0x89
517 #define TWL4030_USB_OTHER_INT_EN_FALL_SET 0x8A
518 #define TWL4030_USB_OTHER_INT_EN_FALL_CLR 0x8B
519 #define TWL4030_USB_OTHER_INT_STS 0x8C
520 #define TWL4030_USB_OTHER_INT_LATCH 0x8D
521 #define TWL4030_USB_ID_STATUS 0x96
522 #define TWL4030_USB_CARKIT_SM_1_INT_EN 0x97
523 #define TWL4030_USB_CARKIT_SM_1_INT_EN_SET 0x98
524 #define TWL4030_USB_CARKIT_SM_1_INT_EN_CLR 0x99
525 #define TWL4030_USB_CARKIT_SM_1_INT_STS 0x9A
526 #define TWL4030_USB_CARKIT_SM_1_INT_LATCH 0x9B
527 #define TWL4030_USB_CARKIT_SM_2_INT_EN 0x9C
528 #define TWL4030_USB_CARKIT_SM_2_INT_EN_SET 0x9D
529 #define TWL4030_USB_CARKIT_SM_2_INT_EN_CLR 0x9E
530 #define TWL4030_USB_CARKIT_SM_2_INT_STS 0x9F
531 #define TWL4030_USB_CARKIT_SM_2_INT_LATCH 0xA0
532 #define TWL4030_USB_CARKIT_SM_CTRL 0xA1
533 #define TWL4030_USB_CARKIT_SM_CTRL_SET 0xA2
534 #define TWL4030_USB_CARKIT_SM_CTRL_CLR 0xA3
535 #define TWL4030_USB_CARKIT_SM_CMD 0xA4
536 #define TWL4030_USB_CARKIT_SM_CMD_SET 0xA5
537 #define TWL4030_USB_CARKIT_SM_CMD_CLR 0xA6
538 #define TWL4030_USB_CARKIT_SM_CMD_STS 0xA7
539 #define TWL4030_USB_CARKIT_SM_STATUS 0xA8
540 #define TWL4030_USB_CARKIT_SM_ERR_STATUS 0xAA
541 #define TWL4030_USB_CARKIT_SM_CTRL_STATE 0xAB
542 #define TWL4030_USB_POWER_CTRL 0xAC
543 #define TWL4030_USB_POWER_CTRL_SET 0xAD
544 #define TWL4030_USB_POWER_CTRL_CLR 0xAE
545 #define TWL4030_USB_OTHER_IFC_CTRL2 0xAF
546 #define TWL4030_USB_OTHER_IFC_CTRL2_SET 0xB0
547 #define TWL4030_USB_OTHER_IFC_CTRL2_CLR 0xB1
548 #define TWL4030_USB_REG_CTRL_EN 0xB2
549 #define TWL4030_USB_REG_CTRL_EN_SET 0xB3
550 #define TWL4030_USB_REG_CTRL_EN_CLR 0xB4
551 #define TWL4030_USB_REG_CTRL_ERROR 0xB5
552 #define TWL4030_USB_OTHER_FUNC_CTRL2 0xB8
553 #define TWL4030_USB_OTHER_FUNC_CTRL2_SET 0xB9
554 #define TWL4030_USB_OTHER_FUNC_CTRL2_CLR 0xBA
555 #define TWL4030_USB_CARKIT_ANA_CTRL 0xBB
556 #define TWL4030_USB_CARKIT_ANA_CTRL_SET 0xBC
557 #define TWL4030_USB_CARKIT_ANA_CTRL_CLR 0xBD
558 #define TWL4030_USB_VBUS_DEBOUNCE 0xC0
559 #define TWL4030_USB_ID_DEBOUNCE 0xC1
560 #define TWL4030_USB_TPH_DP_CON_MIN 0xC2
561 #define TWL4030_USB_TPH_DP_CON_MAX 0xC3
562 #define TWL4030_USB_TCR_DP_CON_MIN 0xC4
563 #define TWL4030_USB_TCR_DP_CON_MAX 0xC5
564 #define TWL4030_USB_TPH_DP_PD_SHORT 0xC6
565 #define TWL4030_USB_TPH_CMD_DLY 0xC7
566 #define TWL4030_USB_TPH_DET_RST 0xC8
567 #define TWL4030_USB_TPH_AUD_BIAS 0xC9
568 #define TWL4030_USB_TCR_UART_DET_MIN 0xCA
569 #define TWL4030_USB_TCR_UART_DET_MAX 0xCB
570 #define TWL4030_USB_TPH_ID_INT_PW 0xCD
571 #define TWL4030_USB_TACC_ID_INT_WAIT 0xCE
572 #define TWL4030_USB_TACC_ID_INT_PW 0xCF
573 #define TWL4030_USB_TPH_CMD_WAIT 0xD0
574 #define TWL4030_USB_TPH_ACK_WAIT 0xD1
575 #define TWL4030_USB_TPH_DP_DISC_DET 0xD2
576 #define TWL4030_USB_VBAT_TIMER 0xD3
577 #define TWL4030_USB_CARKIT_4W_DEBUG 0xE0
578 #define TWL4030_USB_CARKIT_5W_DEBUG 0xE1
579 #define TWL4030_USB_PHY_PWR_CTRL 0xFD
580 #define TWL4030_USB_PHY_CLK_CTRL 0xFE
581 #define TWL4030_USB_PHY_CLK_CTRL_STS 0xFF
584 #define TWL4030_GPIO_GPIODATAIN1 0x00
585 #define TWL4030_GPIO_GPIODATAIN2 0x01
586 #define TWL4030_GPIO_GPIODATAIN3 0x02
587 #define TWL4030_GPIO_GPIODATADIR1 0x03
588 #define TWL4030_GPIO_GPIODATADIR2 0x04
589 #define TWL4030_GPIO_GPIODATADIR3 0x05
590 #define TWL4030_GPIO_GPIODATAOUT1 0x06
591 #define TWL4030_GPIO_GPIODATAOUT2 0x07
592 #define TWL4030_GPIO_GPIODATAOUT3 0x08
593 #define TWL4030_GPIO_CLEARGPIODATAOUT1 0x09
594 #define TWL4030_GPIO_CLEARGPIODATAOUT2 0x0A
595 #define TWL4030_GPIO_CLEARGPIODATAOUT3 0x0B
596 #define TWL4030_GPIO_SETGPIODATAOUT1 0x0C
597 #define TWL4030_GPIO_SETGPIODATAOUT2 0x0D
598 #define TWL4030_GPIO_SETGPIODATAOUT3 0x0E
599 #define TWL4030_GPIO_GPIO_DEBEN1 0x0F
600 #define TWL4030_GPIO_GPIO_DEBEN2 0x10
601 #define TWL4030_GPIO_GPIO_DEBEN3 0x11
602 #define TWL4030_GPIO_GPIO_CTRL 0x12
603 #define TWL4030_GPIO_GPIOPUPDCTR1 0x13
604 #define TWL4030_GPIO_GPIOPUPDCTR2 0x14
605 #define TWL4030_GPIO_GPIOPUPDCTR3 0x15
606 #define TWL4030_GPIO_GPIOPUPDCTR4 0x16
607 #define TWL4030_GPIO_GPIOPUPDCTR5 0x17
608 #define TWL4030_GPIO_GPIO_ISR1A 0x19
609 #define TWL4030_GPIO_GPIO_ISR2A 0x1A
610 #define TWL4030_GPIO_GPIO_ISR3A 0x1B
611 #define TWL4030_GPIO_GPIO_IMR1A 0x1C
612 #define TWL4030_GPIO_GPIO_IMR2A 0x1D
613 #define TWL4030_GPIO_GPIO_IMR3A 0x1E
614 #define TWL4030_GPIO_GPIO_ISR1B 0x1F
615 #define TWL4030_GPIO_GPIO_ISR2B 0x20
616 #define TWL4030_GPIO_GPIO_ISR3B 0x21
617 #define TWL4030_GPIO_GPIO_IMR1B 0x22
618 #define TWL4030_GPIO_GPIO_IMR2B 0x23
619 #define TWL4030_GPIO_GPIO_IMR3B 0x24
620 #define TWL4030_GPIO_GPIO_EDR1 0x28
621 #define TWL4030_GPIO_GPIO_EDR2 0x29
622 #define TWL4030_GPIO_GPIO_EDR3 0x2A
623 #define TWL4030_GPIO_GPIO_EDR4 0x2B
624 #define TWL4030_GPIO_GPIO_EDR5 0x2C
625 #define TWL4030_GPIO_GPIO_SIH_CTRL 0x2D
628 * Convience functions to read and write from TWL4030
630 * chip_no is the i2c address, it must be one of the chip addresses
631 * defined at the top of this file with the prefix TWL4030_CHIP_
632 * examples are TWL4030_CHIP_PM_RECEIVER and TWL4030_CHIP_KEYPAD
634 * val is the data either written to or read from the twl4030
636 * reg is the register to act on, it must be one of the defines
637 * above and with the format TWL4030_<chip suffix>_<register name>
638 * examples are TWL4030_PM_RECEIVER_VMMC1_DEV_GRP and
641 static inline int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val)
643 return i2c_write(chip_no, reg, 1, &val, 1);
646 static inline int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
648 return i2c_read(chip_no, reg, 1, val, 1);
655 /* For hardware resetting */
656 void twl4030_power_reset_init(void);
657 /* For setting device group and voltage */
658 void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val,
659 u8 dev_grp, u8 dev_grp_sel);
660 /* For initializing power device */
661 void twl4030_power_init(void);
662 /* For initializing mmc power */
663 void twl4030_power_mmc_init(void);
668 void twl4030_led_init(unsigned char ledon_mask);
673 int twl4030_usb_ulpi_init(void);
675 #endif /* TWL4030_H */