ARM: imx: novena: Convert block devices to DM
[platform/kernel/u-boot.git] / include / tsi148.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com
4  *
5  * base on universe.h by
6  *
7  * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
8  */
9
10 #ifndef _tsi148_h
11 #define _tsi148_h
12
13 #ifndef PCI_DEVICE_ID_TUNDRA_TSI148
14 #define PCI_DEVICE_ID_TUNDRA_TSI148 0x0148
15 #endif
16
17 typedef struct _TSI148 TSI148;
18 typedef struct _OUTBOUND OUTBOUND;
19 typedef struct _INBOUND  INBOUND;
20 typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET;
21
22 struct _OUTBOUND {
23         unsigned int otsau;                   /* 0x000 Outbound start       upper */
24         unsigned int otsal;                   /* 0x004 Outbouud start       lower */
25         unsigned int oteau;                   /* 0x008 Outbound end         upper */
26         unsigned int oteal;                   /* 0x00c Outbound end         lower */
27         unsigned int otofu;                   /* 0x010 Outbound translation upper */
28         unsigned int otofl;                   /* 0x014 Outbound translation lower */
29         unsigned int otbs;                    /* 0x018 Outbound translation 2eSST */
30         unsigned int otat;                    /* 0x01c Outbound translation attr  */
31 };
32
33 struct _INBOUND {
34         unsigned int itsau;                   /* 0x000 inbound  start       upper */
35         unsigned int itsal;                   /* 0x004 inbouud  start       lower */
36         unsigned int iteau;                   /* 0x008 inbound  end         upper */
37         unsigned int iteal;                   /* 0x00c inbound  end         lower */
38         unsigned int itofu;                   /* 0x010 inbound  translation upper */
39         unsigned int itofl;                   /* 0x014 inbound  translation lower */
40         unsigned int itat;                    /* 0x018 inbound  translation attr  */
41         unsigned int spare;                   /* 0x01c not used                   */
42 };
43
44 struct _TSI148 {
45         unsigned int pci_id;                  /* 0x000         */
46         unsigned int pci_csr;                 /* 0x004         */
47         unsigned int pci_class;               /* 0x008         */
48         unsigned int pci_misc0;               /* 0x00c         */
49         unsigned int pci_mbarl;               /* 0x010         */
50         unsigned int pci_mbarh;               /* 0x014         */
51         unsigned int spare0[(0x03c-0x018)/4]; /* 0x018         */
52         unsigned int pci_misc1;               /* 0x03c         */
53         unsigned int pci_pcixcap;             /* 0x040         */
54         unsigned int pci_pcixstat;            /* 0x044         */
55         unsigned int spare1[(0x100-0x048)/4]; /* 0x048         */
56         OUTBOUND     outbound[8];             /* 0x100         */
57         unsigned int viack[8];                /* 0x204         */
58         unsigned int rmwau;                   /* 0x220         */
59         unsigned int rmwal;                   /* 0x224         */
60         unsigned int rmwen;                   /* 0x228         */
61         unsigned int rmwc;                    /* 0x22c         */
62         unsigned int rmws;                    /* 0x230         */
63         unsigned int vmctrl;                  /* 0x234         */
64         unsigned int vctrl;                   /* 0x238         */
65         unsigned int vstat;                   /* 0x23c         */
66         unsigned int pcsr;                    /* 0x240         */
67         unsigned int spare2[3];               /* 0x244 - 0x24c */
68         unsigned int vmefl;                   /* 0x250         */
69         unsigned int spare3[3];               /* 0x254 - 0x25c */
70         unsigned int veau;                    /* 0x260         */
71         unsigned int veal;                    /* 0x264         */
72         unsigned int veat;                    /* 0x268         */
73         unsigned int spare4[1];               /* 0x26c         */
74         unsigned int edpau;                   /* 0x270         */
75         unsigned int edpal;                   /* 0x274         */
76         unsigned int edpxa;                   /* 0x278         */
77         unsigned int edpxs;                   /* 0x27c         */
78         unsigned int edpat;                   /* 0x280         */
79         unsigned int spare5[31];              /* 0x284 - 0x2fc */
80         INBOUND      inbound[8];              /* 0x100         */
81         unsigned int gbau;                    /* 0x400         */
82         unsigned int gbal;                    /* 0x404         */
83         unsigned int gcsrat;                  /* 0x408         */
84         unsigned int cbau;                    /* 0x40c         */
85         unsigned int cbal;                    /* 0x410         */
86         unsigned int crgat;                   /* 0x414         */
87         unsigned int crou;                    /* 0x418         */
88         unsigned int crol;                    /* 0x41c         */
89         unsigned int crat;                    /* 0x420         */
90         unsigned int lmbau;                   /* 0x424         */
91         unsigned int lmbal;                   /* 0x428         */
92         unsigned int lmat;                    /* 0x42c         */
93         unsigned int r64bcu;                  /* 0x430         */
94         unsigned int r64bcl;                  /* 0x434         */
95         unsigned int bpgtr;                   /* 0x438         */
96         unsigned int bpctr;                   /* 0x43c         */
97         unsigned int vicr;                    /* 0x440         */
98         unsigned int spare6[1];               /* 0x444         */
99         unsigned int inten;                   /* 0x448         */
100         unsigned int inteo;                   /* 0x44c         */
101         unsigned int ints;                    /* 0x450         */
102         unsigned int intc;                    /* 0x454         */
103         unsigned int intm1;                   /* 0x458         */
104         unsigned int intm2;                   /* 0x45c         */
105         unsigned int spare7[40];              /* 0x460 - 0x4fc */
106         unsigned int dctl0;                   /* 0x500         */
107         unsigned int dsta0;                   /* 0x504         */
108         unsigned int dcsau0;                  /* 0x508         */
109         unsigned int dcsal0;                  /* 0x50c         */
110         unsigned int dcdau0;                  /* 0x510         */
111         unsigned int dcdal0;                  /* 0x514         */
112         unsigned int dclau0;                  /* 0x518         */
113         unsigned int dclal0;                  /* 0x51c         */
114         unsigned int dsau0;                   /* 0x520         */
115         unsigned int dsal0;                   /* 0x524         */
116         unsigned int ddau0;                   /* 0x528         */
117         unsigned int ddal0;                   /* 0x52c         */
118         unsigned int dsat0;                   /* 0x530         */
119         unsigned int ddat0;                   /* 0x534         */
120         unsigned int dnlau0;                  /* 0x538         */
121         unsigned int dnlal0;                  /* 0x53c         */
122         unsigned int dcnt0;                   /* 0x540         */
123         unsigned int ddbs0;                   /* 0x544         */
124         unsigned int r20[14];                 /* 0x548 - 0x57c */
125         unsigned int dctl1;                   /* 0x580         */
126         unsigned int dsta1;                   /* 0x584         */
127         unsigned int dcsau1;                  /* 0x588         */
128         unsigned int dcsal1;                  /* 0x58c         */
129         unsigned int dcdau1;                  /* 0x590         */
130         unsigned int dcdal1;                  /* 0x594         */
131         unsigned int dclau1;                  /* 0x598         */
132         unsigned int dclal1;                  /* 0x59c         */
133         unsigned int dsau1;                   /* 0x5a0         */
134         unsigned int dsal1;                   /* 0x5a4         */
135         unsigned int ddau1;                   /* 0x5a8         */
136         unsigned int ddal1;                   /* 0x5ac         */
137         unsigned int dsat1;                   /* 0x5b0         */
138         unsigned int ddat1;                   /* 0x5b4         */
139         unsigned int dnlau1;                  /* 0x5b8         */
140         unsigned int dnlal1;                  /* 0x5bc         */
141         unsigned int dcnt1;                   /* 0x5c0         */
142         unsigned int ddbs1;                   /* 0x5c4         */
143         unsigned int r21[14];                 /* 0x5c8 - 0x5fc */
144         unsigned int devi_veni_2;             /* 0x600         */
145         unsigned int gctrl_ga_revid;          /* 0x604         */
146         unsigned int semaphore0_1_2_3;        /* 0x608         */
147         unsigned int semaphore4_5_6_7;        /* 0x60c         */
148         unsigned int mbox0;                   /* 0x610         */
149         unsigned int mbox1;                   /* 0x614         */
150         unsigned int mbox2;                   /* 0x618         */
151         unsigned int mbox3;                   /* 0x61c         */
152         unsigned int r22[629];                /* 0x620 - 0xff0 */
153         unsigned int csrbcr;                  /* 0xff4         */
154         unsigned int csrbsr;                  /* 0xff8         */
155         unsigned int cbar;                    /* 0xffc         */
156 };
157
158 #define IRQ_VOWN        0x0001
159 #define IRQ_VIRQ1       0x0002
160 #define IRQ_VIRQ2       0x0004
161 #define IRQ_VIRQ3       0x0008
162 #define IRQ_VIRQ4       0x0010
163 #define IRQ_VIRQ5       0x0020
164 #define IRQ_VIRQ6       0x0040
165 #define IRQ_VIRQ7       0x0080
166 #define IRQ_DMA         0x0100
167 #define IRQ_LERR        0x0200
168 #define IRQ_VERR        0x0400
169 #define IRQ_res         0x0800
170 #define IRQ_IACK        0x1000
171 #define IRQ_SWINT       0x2000
172 #define IRQ_SYSFAIL     0x4000
173 #define IRQ_ACFAIL      0x8000
174
175 struct _TDMA_CMD_PACKET {
176         unsigned int dctl;   /* DMA Control         */
177         unsigned int dtbc;   /* Transfer Byte Count */
178         unsigned int dlv;    /* PCI Address         */
179         unsigned int res1;   /* Reserved            */
180         unsigned int dva;    /* Vme Address         */
181         unsigned int res2;   /* Reserved            */
182         unsigned int dcpp;   /* Pointer to Numed Cmd Packet with rPN */
183         unsigned int res3;   /* Reserved                             */
184 };
185
186 #define VME_AM_A16              0x01
187 #define VME_AM_A24              0x02
188 #define VME_AM_A32              0x03
189 #define VME_AM_Axx              0x03
190 #define VME_AM_USR              0x04
191 #define VME_AM_SUP              0x08
192 #define VME_AM_DATA             0x10
193 #define VME_AM_PROG             0x20
194 #define VME_AM_Mxx              (VME_AM_DATA | VME_AM_PROG)
195
196 #define VME_FLAG_D8             0x01
197 #define VME_FLAG_D16            0x02
198 #define VME_FLAG_D32            0x03
199 #define VME_FLAG_Dxx            0x03
200
201 #endif