tizen 2.4 release
[profile/mobile/platform/kernel/linux-3.10-sc7730.git] / include / soc / sprd / chip_x35lt8 / __regs_ap_apb.h
1 /* the head file modifier:     g   2015-03-19 15:40:29*/
2
3 /*
4 * Copyright (C) 2013 Spreadtrum Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 * GNU General Public License for more details.
15 *
16 *************************************************
17 * Automatically generated C header: do not edit *
18 *************************************************
19 */
20
21 #ifndef __SCI_GLB_REGS_H__
22 #error  "Don't include this file directly, Pls include sci_glb_regs.h"
23 #endif 
24
25
26 #ifndef __H_REGS_AP_APB_HEADFILE_H__
27 #define __H_REGS_AP_APB_HEADFILE_H__ __FILE__
28
29 #define  REGS_AP_APB
30
31 /* registers definitions for AP_APB */
32 #define REG_AP_APB_APB_EB                               SCI_ADDR(REGS_AP_APB_BASE, 0x0000)/*AHB_EB*/
33 #define REG_AP_APB_APB_RST                              SCI_ADDR(REGS_AP_APB_BASE, 0x0004)/*AHB_RST*/
34 #define REG_AP_APB_APB_MISC_CTRL                        SCI_ADDR(REGS_AP_APB_BASE, 0x0008)/*APB_MISC_CTRL*/
35
36
37
38 /* bits definitions for register REG_AP_APB_APB_EB */
39 #define BIT_INTC3_EB                                            ( BIT(22) )
40 #define BIT_INTC2_EB                                            ( BIT(21) )
41 #define BIT_INTC1_EB                                            ( BIT(20) )
42 #define BIT_INTC0_EB                                            ( BIT(19) )
43 #define BIT_CKG_EB                                              ( BIT(18) )
44 #define BIT_AP_CKG_EB                                           ( BIT_CKG_EB )
45 #define BIT_UART4_EB                                            ( BIT(17) )
46 #define BIT_UART3_EB                                            ( BIT(16) )
47 #define BIT_UART2_EB                                            ( BIT(15) )
48 #define BIT_UART1_EB                                            ( BIT(14) )
49 #define BIT_UART0_EB                                            ( BIT(13) )
50 #define BIT_I2C4_EB                                             ( BIT(12) )
51 #define BIT_I2C3_EB                                             ( BIT(11) )
52 #define BIT_I2C2_EB                                             ( BIT(10) )
53 #define BIT_I2C1_EB                                             ( BIT(9) )
54 #define BIT_I2C0_EB                                             ( BIT(8) )
55 #define BIT_SPI2_EB                                             ( BIT(7) )
56 #define BIT_SPI1_EB                                             ( BIT(6) )
57 #define BIT_SPI0_EB                                             ( BIT(5) )
58 #define BIT_IIS3_EB                                             ( BIT(4) )
59 #define BIT_IIS2_EB                                             ( BIT(3) )
60 #define BIT_IIS1_EB                                             ( BIT(2) )
61 #define BIT_IIS0_EB                                             ( BIT(1) )
62 #define BIT_SIM0_EB                                             ( BIT(0) )
63
64 /* bits definitions for register REG_AP_APB_APB_RST */
65 #define BIT_INTC3_SOFT_RST                                      ( BIT(22) )
66 #define BIT_INTC2_SOFT_RST                                      ( BIT(21) )
67 #define BIT_INTC1_SOFT_RST                                      ( BIT(20) )
68 #define BIT_INTC0_SOFT_RST                                      ( BIT(19) )
69 #define BIT_CKG_SOFT_RST                                        ( BIT(18) )
70 #define BIT_AP_CKG_SOFT_RST                             BIT_CKG_SOFT_RST
71 #define BIT_UART4_SOFT_RST                                      ( BIT(17) )
72 #define BIT_UART3_SOFT_RST                                      ( BIT(16) )
73 #define BIT_UART2_SOFT_RST                                      ( BIT(15) )
74 #define BIT_UART1_SOFT_RST                                      ( BIT(14) )
75 #define BIT_UART0_SOFT_RST                                      ( BIT(13) )
76 #define BIT_I2C4_SOFT_RST                                       ( BIT(12) )
77 #define BIT_I2C3_SOFT_RST                                       ( BIT(11) )
78 #define BIT_I2C2_SOFT_RST                                       ( BIT(10) )
79 #define BIT_I2C1_SOFT_RST                                       ( BIT(9) )
80 #define BIT_I2C0_SOFT_RST                                       ( BIT(8) )
81 #define BIT_SPI2_SOFT_RST                                       ( BIT(7) )
82 #define BIT_SPI1_SOFT_RST                                       ( BIT(6) )
83 #define BIT_SPI0_SOFT_RST                                       ( BIT(5) )
84 #define BIT_IIS3_SOFT_RST                                       ( BIT(4) )
85 #define BIT_IIS2_SOFT_RST                                       ( BIT(3) )
86 #define BIT_IIS1_SOFT_RST                                       ( BIT(2) )
87 #define BIT_IIS0_SOFT_RST                                       ( BIT(1) )
88 #define BIT_SIM0_SOFT_RST                                       ( BIT(0) )
89
90 /* bits definitions for register REG_AP_APB_APB_MISC_CTRL */
91 #define BIT_SIM_CLK_POLARITY                                    ( BIT(1) )
92 #define BIT_FMARK_POLARITY_INV                                  ( BIT(0) )
93
94 #endif