2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
9 * This file contains all the macros and symbols which define
10 * a PowerPC assembly language environment.
12 #ifndef __PPC_ASM_TMPL__
13 #define __PPC_ASM_TMPL__
17 /***************************************************************************
19 * These definitions simplify the ugly declarations necessary for GOT
22 * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es
24 * Uses r12 to access the GOT
28 .section ".got2","aw"; \
37 0: .long .LCTOC1-1f ; \
43 #define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME
45 #define GOT(NAME) .L_ ## NAME (r12)
48 /***************************************************************************
85 #if defined(CONFIG_5xx)
86 /* Some special purpose registers */
87 #define DER 149 /* Debug Enable Register */
88 #define COUNTA 150 /* Breakpoint Counter */
89 #define COUNTB 151 /* Breakpoint Counter */
90 #define LCTRL1 156 /* Load/Store Support */
91 #define LCTRL2 157 /* Load/Store Support */
92 #define ICTRL 158 /* I-Bus Support Control Register */
94 #endif /* CONFIG_5xx */
96 #if defined(CONFIG_MPC8260)
100 #define HID0_IFEM (1<<7)
102 #define HID0_ICE_BITPOS 16
103 #define HID0_DCE_BITPOS 17
105 #define IM_REGBASE 0x10000
106 #define IM_SYPCR (IM_REGBASE+0x0004)
107 #define IM_SWSR (IM_REGBASE+0x000e)
108 #define IM_BR0 (IM_REGBASE+0x0100)
109 #define IM_OR0 (IM_REGBASE+0x0104)
110 #define IM_BR1 (IM_REGBASE+0x0108)
111 #define IM_OR1 (IM_REGBASE+0x010c)
112 #define IM_BR2 (IM_REGBASE+0x0110)
113 #define IM_OR2 (IM_REGBASE+0x0114)
114 #define IM_MPTPR (IM_REGBASE+0x0184)
115 #define IM_PSDMR (IM_REGBASE+0x0190)
116 #define IM_PSRT (IM_REGBASE+0x019c)
117 #define IM_IMMR (IM_REGBASE+0x01a8)
118 #define IM_SCCR (IM_REGBASE+0x0c80)
120 #elif defined(CONFIG_MPC5xxx)
122 #define HID0_ICE_BITPOS 16
123 #define HID0_DCE_BITPOS 17
134 * Macros for storing registers into and loading registers from
137 #define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base)
138 #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
139 #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
140 #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
141 #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
142 #define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
143 #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
144 #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
145 #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
146 #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
149 * GCC sometimes accesses words at negative offsets from the stack
150 * pointer, although the SysV ABI says it shouldn't. To cope with
151 * this, we leave this much untouched space on the stack on exception
154 #define STACK_UNDERHEAD 64
157 * Exception entry code. This code runs with address translation
158 * turned off, i.e. using physical addresses.
159 * We assume sprg3 has the physical address of the current
160 * task's thread_struct.
162 #define EXCEPTION_PROLOG(reg1, reg2) \
166 subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\
167 stw r20,_CCR(r21); /* save registers */ \
168 stw r22,GPR22(r21); \
169 stw r23,GPR23(r21); \
171 stw r20,GPR20(r21); \
173 stw r22,GPR21(r21); \
175 stw r20,_LINK(r21); \
180 mfspr r20, DAR_DEAR; \
188 mr r1,r21; /* set new kernel sp */ \
191 * Note: code which follows this uses cr0.eq (set if from kernel),
192 * r21, r22 (SRR0), and r23 (SRR1).
198 * The data words for `hdlr' and `int_return' are initialized with
199 * OFFSET values only; they must be relocated first before they can
202 #define COPY_EE(d, s) rlwimi d,s,0,16,16
206 #define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee) \
213 rlwimi r20,r23,0,25,25; \
217 addis r23,r23,(hdlr - 1b)@ha; \
218 addi r23,r23,(hdlr - 1b)@l; \
219 b transfer_to_handler
221 #define STD_EXCEPTION(n, label, hdlr) \
224 EXCEPTION_PROLOG(SRR0, SRR1); \
225 addi r3,r1,STACK_FRAME_OVERHEAD; \
226 EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY) \
228 #define CRIT_EXCEPTION(n, label, hdlr) \
231 EXCEPTION_PROLOG(CSRR0, CSRR1); \
232 addi r3,r1,STACK_FRAME_OVERHEAD; \
233 EXC_XFER_TEMPLATE(n, label, hdlr, \
234 MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
236 #define MCK_EXCEPTION(n, label, hdlr) \
239 EXCEPTION_PROLOG(MCSRR0, MCSRR1); \
240 addi r3,r1,STACK_FRAME_OVERHEAD; \
241 EXC_XFER_TEMPLATE(n, label, hdlr, \
242 MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
246 #define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee) \
249 lwz r20,(.L_ ## label)-1b+8(r20); \
253 rlwimi r20,r23,0,25,25; \
256 .long hdlr - _start + _START_OFFSET; \
257 .long int_return - _start + _START_OFFSET; \
258 .long transfer_to_handler - _start + _START_OFFSET
260 #define STD_EXCEPTION(n, label, hdlr) \
263 EXCEPTION_PROLOG(SRR0, SRR1); \
264 addi r3,r1,STACK_FRAME_OVERHEAD; \
265 EXC_XFER_TEMPLATE(label, hdlr, MSR_KERNEL, NOCOPY) \
267 #define CRIT_EXCEPTION(n, label, hdlr) \
270 EXCEPTION_PROLOG(CSRR0, CSRR1); \
271 addi r3,r1,STACK_FRAME_OVERHEAD; \
272 EXC_XFER_TEMPLATE(label, hdlr, \
273 MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
275 #define MCK_EXCEPTION(n, label, hdlr) \
278 EXCEPTION_PROLOG(MCSRR0, MCSRR1); \
279 addi r3,r1,STACK_FRAME_OVERHEAD; \
280 EXC_XFER_TEMPLATE(label, hdlr, \
281 MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
284 #endif /* __PPC_ASM_TMPL__ */