include/power/max77696_pmic.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  *  Copyright (C) 2015 Freescale Semiconductor, Inc.
   4  *  Fabio Estevam <fabio.estevam@freescale.com>
   5  */
   6
   7 #ifndef __MAX77696_PMIC_H__
   8 #define __MAX77696_PMIC_H__
   9
  10 #define CONFIG_POWER_MAX77696_I2C_ADDR  0x3C
  11
  12 enum {
  13         L01_CNFG1 =     0x43,
  14         L01_CNFG2,
  15         L02_CNFG1,
  16         L02_CNFG2,
  17         L03_CNFG1,
  18         L03_CNFG2,
  19         L04_CNFG1,
  20         L04_CNFG2,
  21         L05_CNFG1,
  22         L05_CNFG2,
  23         L06_CNFG1,
  24         L06_CNFG2,
  25         L07_CNFG1,
  26         L07_CNFG2,
  27         L08_CNFG1,
  28         L08_CNFG2,
  29         L09_CNFG1,
  30         L09_CNFG2,
  31         L10_CNFG1,
  32         L10_CNFG2,
  33         LDO_INT1,
  34         LDO_INT2,
  35         LDO_INT1M,
  36         LDO_INT2M,
  37         LDO_CNFG3,
  38         SW1_CNTRL,
  39         SW2_CNTRL,
  40         SW3_CNTRL,
  41         SW4_CNTRL,
  42         EPDCNFG,
  43         EPDINTS,
  44         EPDINT,
  45         EPDINTM,
  46         EPDVCOM,
  47         EPDVEE,
  48         EPDVNEG,
  49         EPDVPOS,
  50         EPDVDDH,
  51         EPDSEQ,
  52         EPDOKINTS,
  53         CID =   0x9c,
  54         PMIC_NUM_OF_REGS,
  55 };
  56
  57 int power_max77696_init(unsigned char bus);
  58
  59 #endif